CN204993131U - Can save switch drive circuit of timer of fan treater - Google Patents

Abstract

The utility model provides a can save switch drive circuit of timer of fan treater, be applied to on the treater, this switch drive circuit includes plural upper arm switch module, connect the plural underarm switch module that corresponds these upper arm switch modules, the 1st a drive control unit and 1 the 2nd drive control unit, these upper arm switch modules are by 1 the 1st pulse width modulation signal and 1 the 2nd pulse width modulation signal driver, it is first to see through this, the 3rd a pulse width modulation signal and a high frequency pulse wave modulation signal are received to two drive accuse units, it switches on to utilize the high of the 3rd pulse width modulation signal or low quasi -phase to trigger these underarm switch modules.

Description

The switch driving circuit of the timer of fan processor can be saved

[technical field]

The utility model has about a kind of fan motor control circuit, and espespecially a kind of have the cost-effective switch driving circuit saving the timer of fan processor.

[background technology]

Along with the progress of science and technology and the development of computer industry, light and handy electronic product, as notebook computer, day by day becomes the market mainstream.In the electronic product that this is compact, the quality of heat-sinking capability often has influence on the stability of system, the usefulness of product, or even the service life of product.With computer system, the heat energy dissipation rapidly produced to enable computer system, usual computer system is equipped with fan using as heat abstractor, is able to normal operation under suitable temperature environment to make computer system.

In general, be used in computer system and driven by Brushless DC motor in order to the fan of heat radiation.Please refer to shown in Fig. 1, known DC fan drive circuit comprise a processor 5 (microcontrolunit; MCU), upper arm two PMOS electric crystals 61,62 and underarm two NMOS electric crystals 63,64, this processor 5 has plural pin and plural timer 50, first and second pin 51,52 of this processor 5 is electrically connected this upper arm two PMOS electric crystals 61,62 relatively respectively, and this first and second pin 51,52 transmits one first pulse width modulation (PulseWidthModulation respectively; PWM) signal and one second pulse width modulation (PWM) signal, this first and second pulse width modulation signal is identical, third and fourth pin 53,54 of this processor 5 is electrically connected this underarm two NMOS electric crystals 63,64 relatively respectively, and third and fourth pin 63,64 of this processor these timers 50 corresponding, this third and fourth pin 63,64 is respectively in order to export the first high frequency pulse wave modulation (PulseWidthModulation through the modulation of these timers 50; PWM) signal and one second high frequency pulse wave modulation (PWM) signal.So utilize the first pulse width modulation signal and the second high frequency pulse wave modulating signal and the second pulse width modulation signal and the first high frequency pulse wave modulating signal to drive four full-bridge type switches (i.e. upper and lower arm two PMOS electric crystals 61,62,63,64), control the object of DC fan rotating speed and running.Wherein connect one end 71 and the other end 72 of corresponding motor coil between upper and lower arm two PMOS electric crystal places of adjoining one another respectively.

Size because of fan adjusting rotary speed depends on first, the size of inside cutting impulse wave duty ratio (Dutycycle) that two high frequency pulse wave modulating signals export, and inner cutting pulse wave frequency is generally greater than 20KHZ (hertz), so first, two high frequency pulse wave modulating signal output accuracies want high, the output accuracy of aforementioned first high frequency pulse wave modulating signal is made to need to rely on processor 5 to modulating the timer 50 of the 3rd pin 53, the output accuracy of this second high frequency pulse wave modulating signal also needs to rely on processor 5 to modulating another timer 50 of the 4th pin 54, in other words, first and second high frequency pulse wave modulating signal that two pins 53,54 that underarm two NMOS electric crystals 63,64 of the motor drive circuit of known exactly single fan must use support timer 50 just can make output accuracy high.

But the pin that well known processor 5 has timer 50 correspondence is limited amount system, as timer 50 quantity in the processor 5 of Fig. 1 only enough supports two pins the (namely the 3rd, four pins 53, 54), this two pin 53, 54 in order to connect corresponding underarm two NMOS electric crystals 63, 64, processor 5 is made to support corresponding pin without unnecessary timer 51, therefore known if desired timer 50 more time, then must select the processor 5 that timer 50 is more, relative cost can significantly increase, body package size also can increase simultaneously, and be also unfavorable for fan design optimization, if such as client proposes the demand of special function (as virtual rotating speed etc.) for fan, the situation that conventional processor 5 timer 50 quantity is inadequate can be run into during fan design.

Therefore how will solve the above-mentioned problem commonly used and disappearance, the utility model people being this case and the relevant manufactures being engaged in the industry desire most ardently the place, direction studying improvement.

[utility model content]

For effectively solving above-mentioned problem, the main purpose of the utility model provide a kind of have reach the cost-effective switch driving circuit saving the timer of fan processor.

Another object of the utility model uses providing one to have to save timer in processor, and is conducive to the switch driving circuit of the timer of the fan the saved processor of fan design.

For reaching above-mentioned purpose, the utility model provides a kind of switch driving circuit saving the timer of fan processor, and be applied on a processor, this switch driving circuit comprises:

Plural number upper arm switch module, is driven by one first pulse width modulation signal and one second pulse width modulation signal; Plural number underarm switch module, is electrically connected with these upper arm switch modules corresponding;

One first driving control unit, with these underarm switch modules relative wherein once arm switch assembly be electrically connected, and this first driving control unit receives one the 3rd pulse width modulation signal and a high frequency pulse wave modulating signal, one second driving control unit, is electrically connected with another underarm switch module of these underarm switch modules relative, and this second driving control unit receives the 3rd pulse width modulation signal and this high frequency pulse wave modulating signal, and wherein this first pulse width modulation signal is that to trigger a wherein upper arm switch module be conducting to high levels, it is low level that this second driving control unit receives the 3rd pulse width modulation signal, then will receive this high frequency pulse wave modulating signal output triggering another underarm switch module relatively aforementioned is conducting, this second pulse width modulation signal is that to trigger this another upper arm switch module be conducting to high levels, it is high levle that this first driving control unit receives the 3rd pulse width modulation signal, then will receive this high frequency pulse wave modulating signal and export that to trigger relatively wherein arm switch assembly be once conducting.

These upper arm switch modules have one first upper arm switch module and one second upper arm switch module, this is first years old, two upper arm switch modules respectively have a first end, one second end and one the 3rd end, the first end of this first upper arm switch module is electrically connected first end and an input voltage of this second upper arm switch module, this is first years old, second end of two upper arm switch modules receives aforementioned first pulse width modulation signal and this second pulse width modulation signal respectively, this is first years old, 3rd end of two upper arm switch modules is electrically connected the two ends of the motor coil of a relative fan respectively.

These underarm switch modules have one first underarm switch module and one second underarm switch module, this is first years old, two underarm switch modules respectively have a first end, one second end and one the 3rd end, this is first years old, the first end of two underarm switch modules is electrically connected the 3rd end of this first upper arm switch module and the 3rd end of this second upper arm switch module relatively respectively, second end and this first driving control unit of this first underarm switch module are electrically connected, 3rd end of this first underarm switch module is electrically connected with the 3rd end of this second underarm switch module relative, second end of this second underarm switch module is electrically connected this second driving control unit relatively.

This first driving control unit is provided with one first electric crystal, one first drives resistance and one second to drive resistance, this first electric crystal has a base terminal, one emitter-base bandgap grading end and a collector terminal, one end of this first driving resistance couples this collector terminal, and this collector terminal is in order to receive this high frequency pulse wave modulating signal, the other end of this first driving resistance then couples an earth terminal, one end of this second driving resistance couples this base terminal, the other end of this second driving resistance is in order to receive aforementioned 3rd pulse width modulation signal, and the emitter-base bandgap grading end of this first electric crystal couples the second end of this first time arm switch resistor relatively.

This second driving control unit is provided with one second electric crystal, one the 3rd electric crystal, one the 3rd drives resistance, one four-wheel drive resistance and one the 5th drives resistance, this is second years old, three electric crystals respectively have a base terminal, one emitter-base bandgap grading end and a collector terminal, the collector terminal and the 3rd that the base terminal of this second electric crystal couples the 3rd electric crystal drives one end of resistance, the collector terminal of this second electric crystal couples one end of this four-wheel drive resistance, in order to receive aforementioned high frequency pulse wave modulating signal, the other end of this four-wheel drive resistance and the emitter-base bandgap grading of the 3rd electric crystal couple this earth terminal, the emitter-base bandgap grading end of this second electric crystal couples the second end of this second time arm switch resistor relatively, and the 3rd drives the other end of resistance to couple an operating voltage, the base terminal of the 3rd electric crystal couples one end that the 5th drives resistance, 5th drives the other end of resistance in order to receive aforementioned 3rd pulse width modulation signal.

This the first upper arm switch module is provided with one the one MOS electric crystal, one first resistance, one second resistance, one the 3rd resistance, one the 4th electric crystal and one first electric capacity, one MOS electric crystal has a gate terminal, one source pole end and a drain end, the gate terminal of the one MOS electric crystal couples one end of one end of this first electric capacity and one end of this first resistance and this second resistance, the drain end of the one MOS electric crystal couples the other end of this first electric capacity and the other end of this first resistance and this input voltage, the source terminal of the one MOS electric crystal couples one end of this motor coil, and the 4th electric crystal has a base terminal, one emitter-base bandgap grading end and a collector terminal, the collector terminal of the 4th electric crystal couples the other end of this second resistance, the emitter-base bandgap grading end of the 4th electric crystal couples this earth terminal, the base terminal of the 4th electric crystal couples one end of the 3rd resistance, the other end of the 3rd resistance is in order to receive aforementioned first pulse width modulation signal.

This the second upper arm switch module is provided with one the 2nd MOS electric crystal, one the 4th resistance, one the 5th resistance, one the 6th resistance, one the 5th electric crystal and one second electric capacity, 2nd MOS electric crystal has a gate terminal, one source pole end and a drain end, the gate terminal of the 2nd MOS electric crystal couples one end of one end of this second electric capacity and one end of the 4th resistance and the 5th resistance, the drain end of the 2nd MOS electric crystal couples the other end of this second electric capacity and the other end of the 4th resistance and this input voltage, the source terminal of the 2nd MOS electric crystal couples the other end of this motor coil, and the 5th electric crystal has a base terminal, one emitter-base bandgap grading end and a collector terminal, the collector terminal of the 5th electric crystal couples the other end of the 5th resistance, the emitter-base bandgap grading end of the 5th electric crystal couples this earth terminal, the base terminal of the 5th electric crystal couples one end of the 4th resistance, the other end of the 4th resistance is in order to receive aforementioned second pulse width modulation signal.

This the first underarm switch module is provided with one the 3rd MOS electric crystal, one the 7th resistance, one the 8th resistance and one the 3rd electric capacity, 3rd MOS electric crystal has a gate terminal, one source pole end and a drain end, the drain end of the 3rd MOS electric crystal couples one end of this motor coil and the source terminal of a MOS electric crystal relatively, the gate terminal of the 3rd MOS electric crystal couples one end and the 7th of the 3rd electric capacity, one end of eight resistance, the other end of the 8th resistance couples the other end and this earth terminal of the 3rd electric capacity, and the other end of the 7th resistance couples the emitter-base bandgap grading end of this first electric crystal relatively, and the source terminal of the 3rd MOS electric crystal couples one end of relative 1 the 9th resistance, the other end of the 9th resistance couples this earth terminal.

This the second underarm switch module is provided with one the 4th MOS electric crystal, 1 the tenth resistance, 1 the 11 resistance and one the 4th electric capacity, 4th MOS electric crystal has a gate terminal, one source pole end and a drain end, the drain end of the 4th MOS electric crystal couples the other end of this motor coil and the source terminal of the 2nd MOS electric crystal relatively, the gate terminal of the 4th MOS electric crystal couples one end and the tenth of the 4th electric capacity, one end of 11 resistance, the other end of the tenth resistance couples the other end and this earth terminal of the 4th electric capacity, and the other end of the 11 resistance couples the emitter-base bandgap grading end of this second electric crystal relatively, and the source terminal of the 4th MOS electric crystal couples one end of the 9th resistance relatively.

This processor has plural pin and plural timer, one first pin couples the second end of this first upper arm switch module, this first pin is in order to export this first pulse width modulation signal, one second pin couples the second end of this second upper arm switch module, this two pin is in order to export this second pulse width modulation signal, one the 3rd pin couple this first, two driving control unit, 3rd pin is in order to export the 3rd pulse width modulation signal, one the 4th pin couple this first, two driving control unit, 4th pin in order to export through correspondence wherein one timer modulation high frequency pulse wave modulating signal.

This high frequency pulse wave modulating signal by the plural timer had in this processor wherein one timer modulate produce, and this first and second pulse width modulation signal is identical with the 3rd pulse width modulation signal, this high frequency pulse wave modulating signal is different from this first, second and third pulse width modulation signal.

The design of this this switch driving circuit of the utility model, obtains and effectively saves timer use in processor, use and reach cost-effective effect, and can be beneficial to the effect of fan design again.

[accompanying drawing explanation]

Fig. 1 is known block schematic diagram;

Fig. 2 is the block schematic diagram of the first embodiment of embodiment of the present utility model;

Fig. 3 is another block schematic diagram of the first embodiment of embodiment of the present utility model;

Fig. 4 is the first embodiment circuit diagram of embodiment of the present utility model;

Fig. 5 is another block schematic diagram of the first embodiment of embodiment of the present utility model;

Fig. 6 is the block schematic diagram of the second embodiment of embodiment of the present utility model;

Fig. 7 is another block schematic diagram of the second embodiment of embodiment of the present utility model;

Fig. 8 A is the exploded perspective schematic diagram of the second embodiment of embodiment of the present utility model;

Fig. 8 B is the combination schematic perspective view of the second embodiment of embodiment of the present utility model;

Fig. 9 is another block schematic diagram of the second embodiment of embodiment of the present utility model.

Assembly in accompanying drawing representated by each sequence number is:

Switch driving circuit ... 1,1 '

First upper arm switch module ... 111

Second upper arm switch module ... 112

3rd upper arm switch module ... 113

4th upper arm switch module ... 114

First end ... 1111,1121,1131,1141

Second end ... 1112,1122,1132,1142

3rd end ... 1113,1123,1133,1143

First underarm switch module ... 131

Second underarm switch module ... 132

3rd underarm switch module ... 133

4th underarm switch module ... 134

First end ... 1311,1321,1331,1341

Second end ... 1312,1322,1332,1342

3rd end ... 1313,1323,1333,1343

First driving control unit ... 14

Second driving control unit ... 15

3rd driving control unit ... 16

Four-wheel drive control unit ... 17

Processor ... 2

Timer ... 20

First pin ... 21

Second pin ... 22

3rd pin ... 23

4th pin ... 24

5th pin ... 25

6th pin ... 26

7th pin ... 27

8th pin ... 28

9th pin ... 29

Tenth pin ... 210

11 pin ... 211

12 pin ... 212

13 pin ... 213

Fan ... 31,32

One end of motor coil ... 311,321

The other end of motor coil ... 312,322

Hall element ... 314,324

Circuit board ... 33

First limiting amplifier ... 41

Second limiting amplifier ... 42

First electric crystal ... Q1

Second electric crystal ... Q2

3rd electric crystal ... Q3

4th electric crystal ... Q4

5th electric crystal ... Q5

First drives resistance ... R1 '

Second drives resistance ... R2 '

3rd drives resistance ... R3 '

Four-wheel drive resistance ... R4 '

5th drives resistance ... R5 '

One MOS electric crystal ... M1

2nd MOS electric crystal ... M2

3rd MOS electric crystal ... M3

4th MOS electric crystal ... M4

First resistance ... R1

Second resistance ... R2

3rd resistance ... R3

4th resistance ... R4

5th resistance ... R5

6th resistance ... R6

7th resistance ... R7

8th resistance ... R8

9th resistance ... R9

Tenth resistance ... R10

11 resistance ... R11

First electric capacity ... C1

Second electric capacity ... C2

3rd electric capacity ... C3

4th electric capacity ... C4

Input voltage ... Vin

Operating voltage ... Vc

Operating voltage ... Vcc

Earth terminal ... GND

[embodiment]

Characteristic on the above-mentioned purpose of the utility model and structure and fuction thereof, will be explained according to the embodiment of institute's accompanying drawings.

The utility model provides a kind of switch driving circuit saving the timer of fan processor, refers to Fig. 2, Fig. 3, the block schematic diagram of first embodiment of display the utility model; This switch driving circuit 1 is applied on a processor 2 of a fan 31, this processor 2 in this better enforcement with microprocessor 2 (microcontrolunit; MCU) explain, but be not limited thereto.And this switch driving circuit 1 comprises plural upper arm switch module, plural underarm switch module, one first driving control unit 14 and one second driving control unit 15, these upper arm switch modules are by one first pulse width modulation (PulseWidthModulation; PWM) signal and one second pulse width modulation (PulseWidthModulation; PWM) signal drives.

And aforementioned complex upper arm switch module has one first upper arm switch module 111 and one second upper arm switch module 112, this is first years old, two upper arm switch modules 111, 112 respectively have a first end 1111, 1121, one second end 1112, 1122 and one the 3rd end 1113, 1123, the first end 1111 of this first upper arm switch module 111 is electrically connected first end 1121 and an input voltage vin of this second upper arm switch module 112, second end 1112 of this first upper arm switch module 111 receives aforementioned first pulse width modulation signal, second end 1122 of this second upper arm switch module 112 receives described second pulse width modulation signal, and this first, two upper arm switch modules 111, 3rd end 1113 of 112, 1123 two ends 311 being electrically connected the motor coil of relatively this fan 31 respectively, 312.

And these underarm switch modules are electrically connected with these upper arm switch modules corresponding, and these underarm switch modules have one first underarm switch module 131 and one second underarm switch module 132, this is first years old, two underarm switch modules 131, 132 respectively have a first end 1311, 1321, one second end 1312, 1322 and one the 3rd end 1313, 1323, this is first years old, two underarm switch modules 131, the first end 1311 of 132, 1321 are electrically connected (or coupling) the 3rd end 1113 of this first upper arm switch module 111 and the 3rd end 1123 of this second upper arm switch module 112 relatively respectively, second end 1312 of this first underarm switch module 131 is electrically connected with this first driving control unit 14, 3rd end 1313 of this first underarm switch module 131 is electrically connected with the 3rd end 1323 of this second underarm switch module 132 relative, second end 1322 of this second underarm switch module 132 is electrically connected this second driving control unit 15 relatively.

Aforementioned first driving control unit 14 and these underarm switch modules relative wherein once arm switch assembly (i.e. aforementioned first underarm switch module 131) be electrically connected, and this first driving control unit 14 receives one the 3rd pulse width modulation (PulseWidthModulation; PWM) signal and a high frequency pulse wave modulation (PulseWidthModulation; PWM) signal, this high frequency pulse wave modulating signal by the plural timer 20 had in this processor 2 wherein a timer 20 modulate generation, in other words, the output accuracy being exactly high frequency pulse wave modulating signal relies on the interior timer 20 of this processor 2 to modulate, make the frequency (Frequency) of this high frequency pulse wave modulating signal and duty ratio (dutycycle) reach accurate, and the size of this fan 31 adjusting rotary speed depend on the size of the inside cutting pulse duty factor that this high frequency pulse wave modulating signal exports.And first and second pulse width modulation signal aforementioned is identical with the 3rd pulse width modulation signal, the frequency being exactly this first, second and third pulse width modulation signal is identical, and the frequency of first, second and third pulse width modulation signal is identical with the frequency that the Hall element 314 that processor 2 connects exports a hall signal, described high frequency pulse wave modulating signal is different from first, second and third pulse width modulation signal, and the frequency being exactly high frequency pulse wave modulating signal is different from the frequency of first, second and third pulse width modulation signal.

Continue and consult Fig. 3, aforementioned second driving control unit 15 is electrically connected with another underarm switch module (i.e. this second underarm switch module 132) of these underarm switch modules relative, and this second driving control unit receives the 3rd pulse width modulation signal and this high frequency pulse wave modulating signal.So when this first pulse width modulation signal is that to trigger a wherein upper arm switch module (i.e. the first upper arm switch module 111) be conducting to high levels, this second driving control unit 15 receives the 3rd pulse width modulation signal when being low level, then this second driving control unit 15 will receive this high frequency pulse wave modulating signal output triggering another underarm switch module relatively aforementioned (i.e. the second underarm switch module 132) is conducting, and now this second upper arm switch module 112 and the first underarm switch module 131 are cut-off state (i.e. non-conducting), if this first pulse width modulation signal is switched to low level from high levels, this the first upper arm switch module 111 is made to be cut-off state, now this second pulse width modulation signal is that to trigger this another upper arm switch module (i.e. the second upper arm switch module 112) be conducting to high levels, and this first driving control unit 14 receives the 3rd pulse width modulation signal when being high levle, then this first driving control unit 14 will receive this high frequency pulse wave modulating signal and export that to trigger relatively wherein arm switch assembly (i.e. the first underarm switch module 131) be once conducting, now this second underarm switch module 132 is cut-off state (i.e. non-conducting), the motor running of aforesaid way conducting fan 31 and the motor rotary speed of control fan 31 by this.

Aforementioned processor 2 explains in this embodiment with 16pin (pin), but is not limited thereto, and other are as 10pin, 12pin, 24pin also applicable the utility model.And this processor 2 has plural pin and aforementioned complex timer 20, wherein one first pin 21 couples the second end 1112 of this first upper arm switch module 111, this first pin 21 is in order to export this first pulse width modulation signal, one second pin 22 couples the second end 1122 of this second upper arm switch module 112, this second pin 22 is in order to export this second pulse width modulation signal, one the 3rd pin 23 couple this first, two driving control unit, 3rd pin 23 is in order to export the 3rd pulse width modulation signal, one the 4th pin 24 couple this first, two driving control unit, 4th pin 24 is in order to export the high frequency pulse wave modulating signal through corresponding one of them timer 20 modulation, one the 5th pin 25 couples aforementioned Hall element 314, 5th pin 25 responds to the hall signal of the rotor-position generation of this fan 31 in order to receive Hall element 314, one the 6th pin 26 another timer 20 corresponding, and the 6th pin 26 is not with on these, underarm switch module 11, 13 and first, two driving control unit 14, 15 couple (or electric connection), exportable another high frequency pulse wave modulation (PulseWidthModulation through corresponding another timer 20 modulation of this six pin, PWM) signal.The wherein stable operating voltage Vcc (as 5 volt) of 1 the 13 pin 213 in order to receive that this input voltage vin provides of this processor 2.

And in these timer 20 quantity of the processor 2 of the fan 31 of this this preferred embodiments to support two pins (i.e. the 4th, six pins 24,26), all the other pins (namely the first pin to three pin 21 ~ 23 and the 5th pin 25 and the 7th pin are to the 16 pin 27 ~ 216) are not supported timer 20 and are explained, but are not limited thereto.So fan 31 need of the utility model utilize the 4th pin 24 of interior timer 20 correspondence of this processor 2 to export high frequency pulse wave modulating signal drive this first underarm switch module 131 or this second underarm switch module 132,6th pin 26 of aforementioned processor 2 then can be supplied to the plural underarm switch module use that another fan has the switch driving circuit 1 of the utility model, or the 6th pin 26 also can for demand fan 31 being had to special function (special function like this need rely on timer 20 to complete), as virtual rotating speed.Therefore the design of this switch driving circuit 1 of the utility model, make fan 31 speed-regulating function only need spend the resource of a timer 20 in processor 2, just rotating speed normal regulating can be reached, simultaneously effectively can also save processor 2 timer 20 to use, and escapable cost and the good effect of fan 31 design optimization.

Refer to Fig. 4, and be aided with and consult Fig. 3, put up with each structure and describe in detail:

Aforementioned first driving control unit 14 is provided with one first electric crystal Q1, one first and drives resistance R1 ' and one second to drive resistance R2 ', this first electric crystal Q1 explains in this embodiment with BJT (BipolarJunctionTransistor) electric crystal, but is not limited thereto, this first electric crystal Q1 has a base terminal, one emitter-base bandgap grading end and a collector terminal, one end of this first driving resistance R1 ' couples the collector terminal of this first electric crystal Q1 and the 4th pin 24 of this processor 2, and the collector terminal of this first electric crystal Q1 is in order to receive this high frequency pulse wave modulating signal, the other end of this first driving resistance R1 ' then couples an earth terminal GND, one end of this second driving resistance R2 ' couples this base terminal, this second drives the other end of resistance R2 ') couple the 3rd pin 23 of this processor 2 relatively, the other end of this second driving resistance R2 ' is in order to receive aforementioned 3rd pulse width modulation signal, and the emitter-base bandgap grading end of this first electric crystal Q1 couples the second end of this first time arm switch resistor relatively.

And this second driving control unit 15 is provided with, and one second electric crystal Q2, one the 3rd electric crystal Q3, one the 3rd drive resistance R3 ', a four-wheel drive resistance R4 ' and the 5th drives resistance R5 ', this second and third electric crystal explains in this embodiment with BJT (BipolarJunctionTransistor) electric crystal, but is not limited thereto, this is second years old, three electric crystals respectively have a base terminal, one emitter-base bandgap grading end and a collector terminal, the collector terminal and the 3rd that the base terminal of this second electric crystal Q2 couples the 3rd electric crystal Q3 drives one end of resistance R3 ', the collector terminal of this second electric crystal Q2 couples one end of this four-wheel drive resistance R4 ' and the 4th pin 24 of this processor 2, and the collector terminal of this second electric crystal Q2 is in order to receive aforementioned high frequency pulse wave modulating signal, the other end of this four-wheel drive resistance R4 ' and the emitter-base bandgap grading of the 3rd electric crystal Q3 couple this earth terminal GND, the emitter-base bandgap grading end of this second electric crystal Q2 couples the second end of this second time arm switch resistor relatively, and the 3rd drives the other end of resistance R3 ' to couple an operating voltage Vc (as 5 volts), the base terminal of the 3rd electric crystal Q3 couples one end that the 5th drives resistance R5 ', 5th drives the other end of resistance R5 ' to couple the 3rd pin 23 of this processor 2 relatively, 5th drives the other end of resistance R5 ' in order to receive aforementioned 3rd pulse width modulation signal.

And described first upper arm switch module 111 is provided with one the one MOS electric crystal M1, one first resistance R1, one second resistance R2, one the 3rd resistance R3, one the 4th electric crystal Q4 and one first electric capacity C1, one MOS electric crystal M1 explains in this embodiment with P type MOSFET (PMOS) electric crystal, but is not limited thereto, one MOS electric crystal M1 has a gate terminal, one source pole end and a drain end, the gate terminal of the one MOS electric crystal M1 couples one end of one end of this first electric capacity C1 and one end of this first resistance R1 and this second resistance R2, the drain end (i.e. the first end 1111 of aforementioned first upper arm switch module 111) of the one MOS electric crystal M1 couples the other end of this first electric capacity C1 and the other end of this first resistance R1 and this input voltage vin, the source terminal (i.e. the 3rd end 1113 of aforementioned first upper arm switch module 111) of the one MOS electric crystal M1 couples one end 311 of the motor coil of this fan 31.And the 4th electric crystal Q4 explains in this better enforcement with BJT (BipolarJunctionTransistor) electric crystal, but be not limited thereto; 4th electric crystal Q4 has a base terminal, an emitter-base bandgap grading end and a collector terminal, the collector terminal of the 4th electric crystal Q4 couples the other end of this second resistance R2, the emitter-base bandgap grading end of the 4th electric crystal Q4 couples this earth terminal GND, the base terminal of the 4th electric crystal Q4 couples one end of the 3rd resistance R3, the other end (i.e. the second end of aforementioned first upper arm switch module 111) of the 3rd resistance R3 couples the other end of the first pin the 21, three resistance R3 of this processor 2 relatively in order to receive aforementioned first pulse width modulation signal.

Fig. 4, this the second upper arm switch module 112 is provided with one the 2nd MOS electric crystal M2, one the 4th resistance R4, one the 5th resistance R5, one the 6th resistance R6, one the 5th electric crystal Q5 and one second electric capacity C2,2nd MOS electric crystal M2 explains in this embodiment with P type MOSFET (PMOS) electric crystal, but is not limited thereto, described 2nd MOS electric crystal M2 has a gate terminal, one source pole end and a drain end, the gate terminal of the 2nd MOS electric crystal M2 couples one end of one end of this second electric capacity C2 and one end of the 4th resistance R4 and the 5th resistance R5, the drain end (i.e. the first end 1121 of aforementioned second upper arm switch module 112) of the 2nd MOS electric crystal M2 couples the other end of this second electric capacity C2 and the other end of the 4th resistance R4 and this input voltage vin, the source terminal (i.e. the 3rd end 1123 of aforementioned second upper arm switch module 112) of the 2nd MOS electric crystal M2 couples the other end 312 of the motor coil of this fan 31, and the 5th electric crystal Q5 explains in this better enforcement with BJT (BipolarJunctionTransistor) electric crystal, but be not limited thereto, 5th electric crystal Q5 has a base terminal, an emitter-base bandgap grading end and a collector terminal, the collector terminal of the 5th electric crystal Q5 couples the other end of the 5th resistance R5, the emitter-base bandgap grading end of the 5th electric crystal Q5 couples this earth terminal GND, the base terminal of the 5th electric crystal Q5 couples one end of the 4th resistance R4, the other end (i.e. the second end 1122 of aforementioned second upper arm switch module 112) of the 4th resistance R4 couples the other end of the second pin the 22, four resistance R4 of this processor 2 relatively in order to receive aforementioned second pulse width modulation signal.

And aforementioned first underarm switch module 131 is provided with one the 3rd MOS electric crystal M3, one the 7th resistance R7, one the 8th resistance R8 and the 3rd electric capacity C3,3rd MOS electric crystal M3 explains in this embodiment with N-type MOSFET (NMOS) electric crystal, but is not limited thereto, 3rd MOS electric crystal M3 has a gate terminal, one source pole end and a drain end, the drain end (i.e. the first end 1311 of aforementioned first underarm switch module 131131) of the 3rd MOS electric crystal M3 couples one end 311 of this motor coil relatively and the source terminal of a MOS electric crystal M1, the gate terminal of the 3rd MOS electric crystal M3 couples one end and the 7th of the 3rd electric capacity C3, one end of eight resistance, the other end of the 8th resistance R8 couples the other end and this earth terminal GND of the 3rd electric capacity C3, and the other end of the 7th resistance R7 (the second end of aforementioned first underarm switch module 131) couples the emitter-base bandgap grading end of the first electric crystal Q1 of relatively described first driving control unit 14, , and the source terminal of the 3rd MOS electric crystal M3 (the 3rd end of aforementioned first underarm switch module 131) couples one end of relative 1 the 9th resistance R9, the other end of the 9th resistance R9 couples this earth terminal GND.

And this second underarm switch module 132 is provided with one the 4th MOS electric crystal M4,1 the tenth resistance R10,1 the 11 resistance R11 and the 4th electric capacity C4,4th MOS electric crystal M4 explains in this embodiment with N-type MOSFET (NMOS) electric crystal, but is not limited thereto, 4th MOS electric crystal M4 has a gate terminal, one source pole end and a drain end, the drain end (i.e. the first end 1321 of aforementioned second underarm switch module 132) of the 4th MOS electric crystal M4 couples the other end 312 of this motor coil relatively and the source terminal of the 2nd MOS electric crystal M2, the gate terminal of the 4th MOS electric crystal M4 couples one end and the tenth of the 4th electric capacity C4, one end of 11 resistance, the other end of the tenth resistance R10 couples the other end and this earth terminal GND of the 4th electric capacity C4, and the other end of the 11 resistance R11 (the second end of the second underarm switch module 132) couples the emitter-base bandgap grading end of the second electric crystal Q2 of relatively described second driving control unit 15, and the source terminal of the 4th MOS electric crystal M4 (the 3rd end of aforementioned second underarm switch module 132) couples one end of the 9th resistance R9 and the source terminal of the 3rd MOS electric crystal M3 relatively.

In addition, in time specifically implementing, one first limiting amplifier 41 (as Fig. 5) can be had between 3rd end of this first and second underarm switch module and processor 2, be exactly the 3rd end 1313,1323 that one end of this first limiting amplifier 41 is electrically connected this first and second underarm switch module 131,132, the other end of this first limiting amplifier 41 is electrically connected one the 7th pin 27 of this processor 2.

Therefore through the design of this switch driving circuit 1 of the utility model, obtain and effectively save timer 20 in processor 2 and use, use and reach cost-effective effect, and the effect that fan 31 designs can be beneficial to again.

Refer to Fig. 6, Fig. 7, the block schematic diagram of the second embodiment of display the utility model, and be aided with and consult Fig. 8 A, Fig. 8 B, the switch driving circuit 1 of aforementioned first embodiment is mainly applied to two fans 31 by this this preferred embodiments, on 32 (as serial connection fans), and two fans 31, 32 share same processor 2, and two fans 31, the switch driving circuit 1 of 32, 1 ' is located on a circuit board 33 with processor 2 jointly, and this circuit board 33 is arranged on two fans 31, explain between bottom 32, that is two fans 31, respectively there is on 32 the switch driving circuit 1 of aforementioned first embodiment, and two fans 31, the switch driving circuit 1 of 32, the structure of 1 ' is identical with the switch driving circuit 1 of connection relationship and effect and aforementioned first embodiment, again do not repeat at this.Wherein to connect the structure of relative processor 2 identical with the switch driving circuit 1 connection handling device 2 of connection relationship and effect and aforementioned first embodiment for the switch driving circuit 1 of a fan 31, therefore again do not repeating.And the switch driving circuit 1 ' of another fan 32 has one the 3rd upper arm switch module 113, one the 4th upper arm switch module 114, one the 3rd underarm switch module 133, one the 4th underarm switch module 134, one the 3rd driving control unit 16 and a four-wheel drive control unit 17, 3rd, four upper arm switch modules 113, 114 respectively have a first end 1131, 1141, one second end 1132, 1142 and one the 3rd end 1133, 1143, the first end 1131 of the 3rd upper arm switch module 113 is electrically connected the first end 1141 of the 4th upper arm switch module 114 and aforementioned input voltage vin, second end 1132 of the 3rd upper arm switch module 113 couples one the 9th pin 29 that this processor 2 has, 9th pin 29 is in order to export aforementioned 4th pulse width modulation (PulseWidthModulation, PWM) signal, passes to the second end 1132 of the 3rd upper arm switch module 113.

And the second end of the 4th upper arm switch module 114 couples 1 the tenth pin the 210, ten pin 210 that this processor 2 has in order to export described 5th pulse width modulation (PulseWidthModulation; PWM) signal, sends the second end of the 4th upper arm switch module 114 to, and the 3rd end 1133,1143 of this third and fourth upper arm switch module is electrically connected one end 321 and the other end 322 of the motor coil of this another fan 32 relatively respectively.3rd, four underarm switch modules respectively have a first end 1331, 1341, one second end 1332, 1342 and one the 3rd end 1333, 1343, 3rd, the first end 1331 of four underarm switch modules, 1341 are electrically connected (or coupling) the 3rd end 1131 of the 3rd upper arm switch module 113 and the 3rd end 1143 of the 4th upper arm switch module 114 relatively respectively, second end 1332 of the 3rd underarm switch module 133 is electrically connected with the 3rd driving control unit 16, 3rd end 1333 of the 3rd underarm switch module 133 is electrically connected with the 3rd end 1343 of relative 4th underarm switch module 134, and the second end 1342 of the 4th underarm switch module 134 is electrically connected this four-wheel drive control unit 17 relatively.In each structure and the connection relationship of third and fourth upper arm switch module 113,114 of this present embodiment and effect thereof and corresponding aforementioned first and second upper arm switch module 111,112 identical, and each structure of third and fourth underarm switch module 133,134 and connection relationship and effect thereof and corresponding aforementioned first and second underarm switch module 131,132 identical, therefore again do not repeat at this.

Support two pins (i.e. the 4th, six pins 24,26) in the processor 2 of this better enforcement and interior plural timer 20 thereof identical with the processor 2 of aforementioned first embodiment, again do not repeat at this.And the 6th pin 26 of this processor 2 drives automatic control unit 16,17 with third and fourth of the switch driving circuit 1 ' of another fan 32 to be respectively electrically connected, the 6th pin 26 is in order to export another high frequency pulse wave modulation (PulseWidthModulation through corresponding another timer 20 modulation; PWM) signal, sends this third and fourth driving control unit respectively to.And 1 of this processor 2 the 8th pin 28 couples this third and fourth driving control unit relatively, the 8th pin 28 is in order to export the 6th pulse width modulation (PulseWidthModulation; PWM) signal, sends this third and fourth driving control unit respectively to.Wherein each structure and connection relationship, execution and effect thereof of third and fourth driving control unit 16,17 of this present embodiment and first and second driving control unit aforementioned 14,15 identical, therefore again do not repeat at this.

And one of this processor 2 the 11 pin 211 couples another Hall element 324, the 11 pin 211 senses a hall signal of the rotor-position generation of this another fan 32 in order to receive this another Hall element 324.In addition, in time specifically implementing, in Fig. 9, one second limiting amplifier 42 can be had between 3rd end of this third and fourth underarm switch module 133,134 and processor 2, be exactly the 3rd end 1333,1343 that one end of this second limiting amplifier 42 is electrically connected this third and fourth underarm switch module 133,134, the other end of this second limiting amplifier 42 is electrically connected 1 the 12 pin 212 of this processor 2.Wherein aforementioned fourth, fifth pulse width modulation signal is identical with the 6th pulse width modulation signal, the frequency being exactly this fourth, fifth, six pulse width modulation signal is identical, and then the frequency of this fourth, fifth, six pulse width modulation signal is also identical with the frequency of the hall signal of this another Hall element 324, and another high frequency pulse wave modulating signal aforementioned is different from fourth, fifth, six pulse width modulation signal, be exactly the frequency and fourth, fifth of another high frequency pulse wave modulating signal, six pulse width modulation signal frequency different.

So when this first pulse width modulation signal is that high levels triggers the first upper arm switch module 111 for conducting, this second driving control unit 15 receives the 3rd pulse width modulation signal when being low level, then this second driving control unit 15 will receive the relative second underarm switch module 132 of this high frequency pulse wave modulating signal output triggering is conducting, now this second upper arm switch module 112 and the first underarm switch module 131 are cut-off state (i.e. non-conducting), simultaneously aforementioned 4th pulse width modulation signal is that to trigger the 3rd upper arm switch module 113 be conducting to high levels, this four-wheel drive control unit 17 receives the 6th pulse width modulation signal when being low level, then this four-wheel drive control unit 17 will receive the relative 4th underarm switch module 134 of this another high frequency pulse wave modulating signal output triggering is conducting, now the 4th upper arm switch module 114 and the 3rd underarm switch module 133 are cut-off state (i.e. non-conducting).

If this first pulse width modulation signal is switched to low level from high levels, this the first upper arm switch module 111 is made to be cut-off state, now this second pulse width modulation signal is that high levels triggers the second upper arm switch module 112 for conducting, and this first driving control unit 14 receives the 3rd pulse width modulation signal when being high levle, then this first driving control unit 14 will receive the relative first underarm switch module 131 of this high frequency pulse wave modulating signal output triggering is conducting, now this second underarm switch module 132 is cut-off state (i.e. non-conducting), 4th pulse width modulation signal is switched to low level from high levels simultaneously, the 3rd upper arm switch module 113 is made to be cut-off state, now the 5th pulse width modulation signal is that high levels triggers the 4th upper arm switch module 114 for conducting, and the 3rd driving control unit 16 receives the 6th pulse width modulation signal when being high levle, then the 3rd driving control unit 16 will receive the relative 3rd underarm switch module 133 of this another high frequency pulse wave modulating signal output triggering is conducting, now the 4th underarm switch module 134 is cut-off state (i.e. non-conducting), aforesaid way can simultaneously conducting two fans 31 by this, the motor running of 32 and simultaneously (or synchronous) control two fans 31, the motor rotary speed of 32, in other words two fans 31 are just through, 32 are all respectively provided with switch driving circuit 1 of the present utility model, 1 ' design, make to control two fans 31 by single processor 2 simultaneously, the motor running of 32, and by the 4th of processor 2, six pins 24, 26 control two fans 31 simultaneously, the effect of the motor rotary speed of 32.

Therefore, the design on two fans 31,32 is applied to through this switch driving circuit 1,1 ' of the utility model, obtain and effectively save circuit part materials (as saved processor and another circuit board of another fan 32), and timer 20 uses in saving processor 2, use and reach cost-effective effect, and the effect of fan design can be beneficial to again.

Only the above, the only better feasible embodiment of the utility model, such as utilizes the above-mentioned method of the utility model, shape, structure, device to change for it, all should be contained in the interest field of this case.

Claims (11)

1. can save a switch driving circuit for the timer of fan processor, be applied on a processor, it is characterized in that, this switch driving circuit comprises:

Plural number upper arm switch module, is driven by one first pulse width modulation signal and one second pulse width modulation signal;

Plural number underarm switch module, is electrically connected with these upper arm switch modules corresponding;

One first driving control unit, with these underarm switch modules relative wherein once arm switch assembly be electrically connected, and this first driving control unit receives one the 3rd pulse width modulation signal and a high frequency pulse wave modulating signal;

One second driving control unit, is electrically connected with another underarm switch module of these underarm switch modules relative, and this second driving control unit receives the 3rd pulse width modulation signal and this high frequency pulse wave modulating signal; And

Wherein this first pulse width modulation signal is that to trigger a wherein upper arm switch module be conducting to high levels, it is low level that this second driving control unit receives the 3rd pulse width modulation signal, then will receive this high frequency pulse wave modulating signal output triggering another underarm switch module relatively aforementioned is conducting, this second pulse width modulation signal is that to trigger this another upper arm switch module be conducting to high levels, it is high levle that this first driving control unit receives the 3rd pulse width modulation signal, then will receive this high frequency pulse wave modulating signal and export that to trigger relatively wherein arm switch assembly be once conducting.

2. the switch driving circuit saving the timer of fan processor according to claim 1, it is characterized in that, described upper arm switch module has one first upper arm switch module and one second upper arm switch module, this is first years old, two upper arm switch modules respectively have a first end, one second end and one the 3rd end, the first end of this first upper arm switch module is electrically connected first end and an input voltage of this second upper arm switch module, this is first years old, second end of two upper arm switch modules receives aforementioned first pulse width modulation signal and this second pulse width modulation signal respectively, this is first years old, 3rd end of two upper arm switch modules is electrically connected the two ends of the motor coil of a relative fan respectively.

3. the switch driving circuit saving the timer of fan processor according to claim 2, it is characterized in that, described underarm switch module has one first underarm switch module and one second underarm switch module, this is first years old, two underarm switch modules respectively have a first end, one second end and one the 3rd end, this is first years old, the first end of two underarm switch modules is electrically connected the 3rd end of this first upper arm switch module and the 3rd end of this second upper arm switch module relatively respectively, second end and this first driving control unit of this first underarm switch module are electrically connected, 3rd end of this first underarm switch module is electrically connected with the 3rd end of this second underarm switch module relative, second end of this second underarm switch module is electrically connected this second driving control unit relatively.

4. the switch driving circuit saving the timer of fan processor according to claim 3, it is characterized in that, described first driving control unit is provided with one first electric crystal, one first drives resistance and one second to drive resistance, this first electric crystal has a base terminal, one emitter-base bandgap grading end and a collector terminal, one end of this first driving resistance couples this collector terminal, and this collector terminal is in order to receive this high frequency pulse wave modulating signal, the other end of this first driving resistance then couples an earth terminal, one end of this second driving resistance couples this base terminal, the other end of this second driving resistance is in order to receive aforementioned 3rd pulse width modulation signal, and the emitter-base bandgap grading end of this first electric crystal couples the second end of this first time arm switch resistor relatively.

5. the switch driving circuit saving the timer of fan processor according to claim 4, it is characterized in that, described second driving control unit is provided with one second electric crystal, one the 3rd electric crystal, one the 3rd drives resistance, one four-wheel drive resistance and one the 5th drives resistance, this is second years old, three electric crystals respectively have a base terminal, one emitter-base bandgap grading end and a collector terminal, the collector terminal and the 3rd that the base terminal of this second electric crystal couples the 3rd electric crystal drives one end of resistance, the collector terminal of this second electric crystal couples one end of this four-wheel drive resistance, in order to receive aforementioned high frequency pulse wave modulating signal, the other end of this four-wheel drive resistance and the emitter-base bandgap grading of the 3rd electric crystal couple this earth terminal, the emitter-base bandgap grading end of this second electric crystal couples the second end of this second time arm switch resistor relatively, and the 3rd drives the other end of resistance to couple an operating voltage, the base terminal of the 3rd electric crystal couples one end that the 5th drives resistance, 5th drives the other end of resistance in order to receive aforementioned 3rd pulse width modulation signal.

6. the switch driving circuit saving the timer of fan processor according to claim 5, it is characterized in that, described first upper arm switch module is provided with one the one MOS electric crystal, one first resistance, one second resistance, one the 3rd resistance, one the 4th electric crystal and one first electric capacity, one MOS electric crystal has a gate terminal, one source pole end and a drain end, the gate terminal of the one MOS electric crystal couples one end of one end of this first electric capacity and one end of this first resistance and this second resistance, the drain end of the one MOS electric crystal couples the other end of this first electric capacity and the other end of this first resistance and this input voltage, the source terminal of the one MOS electric crystal couples one end of this motor coil, and the 4th electric crystal has a base terminal, one emitter-base bandgap grading end and a collector terminal, the collector terminal of the 4th electric crystal couples the other end of this second resistance, the emitter-base bandgap grading end of the 4th electric crystal couples this earth terminal, the base terminal of the 4th electric crystal couples one end of the 3rd resistance, the other end of the 3rd resistance is in order to receive aforementioned first pulse width modulation signal.

7. the switch driving circuit saving the timer of fan processor according to claim 6, it is characterized in that, described second upper arm switch module is provided with one the 2nd MOS electric crystal, one the 4th resistance, one the 5th resistance, one the 6th resistance, one the 5th electric crystal and one second electric capacity, 2nd MOS electric crystal has a gate terminal, one source pole end and a drain end, the gate terminal of the 2nd MOS electric crystal couples one end of one end of this second electric capacity and one end of the 4th resistance and the 5th resistance, the drain end of the 2nd MOS electric crystal couples the other end of this second electric capacity and the other end of the 4th resistance and this input voltage, the source terminal of the 2nd MOS electric crystal couples the other end of this motor coil, and the 5th electric crystal has a base terminal, one emitter-base bandgap grading end and a collector terminal, the collector terminal of the 5th electric crystal couples the other end of the 5th resistance, the emitter-base bandgap grading end of the 5th electric crystal couples this earth terminal, the base terminal of the 5th electric crystal couples one end of the 4th resistance, the other end of the 4th resistance is in order to receive aforementioned second pulse width modulation signal.

8. the switch driving circuit saving the timer of fan processor according to claim 7, it is characterized in that, described first underarm switch module is provided with one the 3rd MOS electric crystal, one the 7th resistance, one the 8th resistance and one the 3rd electric capacity, 3rd MOS electric crystal has a gate terminal, one source pole end and a drain end, the drain end of the 3rd MOS electric crystal couples one end of this motor coil and the source terminal of a MOS electric crystal relatively, the gate terminal of the 3rd MOS electric crystal couples one end and the 7th of the 3rd electric capacity, one end of eight resistance, the other end of the 8th resistance couples the other end and this earth terminal of the 3rd electric capacity, and the other end of the 7th resistance couples the emitter-base bandgap grading end of this first electric crystal relatively, and the source terminal of the 3rd MOS electric crystal couples one end of relative 1 the 9th resistance, the other end of the 9th resistance couples this earth terminal.

9. the switch driving circuit saving the timer of fan processor according to claim 8, it is characterized in that, described second underarm switch module is provided with one the 4th MOS electric crystal, 1 the tenth resistance, 1 the 11 resistance and one the 4th electric capacity, 4th MOS electric crystal has a gate terminal, one source pole end and a drain end, the drain end of the 4th MOS electric crystal couples the other end of this motor coil and the source terminal of the 2nd MOS electric crystal relatively, the gate terminal of the 4th MOS electric crystal couples one end and the tenth of the 4th electric capacity, one end of 11 resistance, the other end of the tenth resistance couples the other end and this earth terminal of the 4th electric capacity, and the other end of the 11 resistance couples the emitter-base bandgap grading end of this second electric crystal relatively, and the source terminal of the 4th MOS electric crystal couples one end of the 9th resistance relatively.

10. the switch driving circuit of the timer of the fan the saved processor according to claim 3 or 9, it is characterized in that, described processor has plural pin and plural timer, one first pin couples the second end of this first upper arm switch module, this first pin is in order to export this first pulse width modulation signal, one second pin couples the second end of this second upper arm switch module, this two pin is in order to export this second pulse width modulation signal, one the 3rd pin couple this first, two driving control unit, 3rd pin is in order to export the 3rd pulse width modulation signal, one the 4th pin couple this first, two driving control unit, 4th pin in order to export through correspondence wherein one timer modulation high frequency pulse wave modulating signal.

The switch driving circuit of the timer of 11. fan saved processors according to claim 3 or 9, it is characterized in that, described high frequency pulse wave modulating signal by the plural timer had in this processor wherein one timer modulate produce, and this first and second pulse width modulation signal is identical with the 3rd pulse width modulation signal, this high frequency pulse wave modulating signal is different from this first, second and third pulse width modulation signal.