CN204989279U - Digit split -core type meter - Google Patents
Digit split -core type meter Download PDFInfo
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- CN204989279U CN204989279U CN201520537201.5U CN201520537201U CN204989279U CN 204989279 U CN204989279 U CN 204989279U CN 201520537201 U CN201520537201 U CN 201520537201U CN 204989279 U CN204989279 U CN 204989279U
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Abstract
The utility model discloses a digit split -core type meter, this digit split -core type meter include the public input of measured signal, voltage / resistance input, current transformer, voltage resistance detection circuit, alternating current detection circuitry, microprocessor and display, the public input ground connection of measured signal, voltage resistance detection circuit's test input end is connected with voltage / resistance input, and its detection output and microprocessor's signal input part is connected, and its controlled end is connected with microprocessor's control output, alternating current detection circuitry's test input end and current transformer's inferior limit winding connection, its measuring output and microprocessor's signal input part is connected, and its controlled end is connected with microprocessor's control output, microprocessor's signal output part and display are connected. The utility model discloses digit split -core type meter has automatic selection measurement function's advantage, and simultaneously, the utility model discloses digit split -core type meter still has the high and advantage with low costs of security.
Description
Technical field
The utility model relates to electric detection technique field, particularly the digital split-core type meter of one.
Background technology
At present, the measurement safety of electric measurement is more and more valued by the people.Current, the U.S. on average has 9 every day, and 000 workman is caused injury residual in electric measurement work, and occurs that the reason more than 80% of accident is all because workman causes the maloperation of electric measurement instrument.In prior art, common split-core type meter must select correct measurement function could measure corresponding measured signal, otherwise the generation of security incident can be caused, such as, use the ac voltage measurement function of split-core type meter to go to measure DC voltage circuit, or use its resistance measurement function to go to measure alternating voltage circuit etc.
Utility model content
Fundamental purpose of the present utility model is to provide a kind of digital split-core type meter automatically selecting measurement function.
For achieving the above object, the utility model provides a kind of digital split-core type meter, and described digital split-core type meter comprises:
The public input end of measured signal;
Voltage/resistance input end, matches with the public input end of described measured signal, for inputting tested voltage or measured resistance;
Voltage/resistance testing circuit, for carrying out input process to described tested voltage or measured resistance;
Current transformer, carries out induction to described alternating current during for being alternating current to measured signal and detects;
Alternating current testing circuit, carries out input process for the induction current produced the secondary winding of described current transformer;
Display, for showing the current value of the magnitude of voltage of described tested voltage, the resistance of described measured resistance or described tested alternating current; And
Microprocessor, for controlling the work of described voltage/resistance testing circuit and processing the output signal of described voltage/resistance testing circuit, control described display to show the magnitude of voltage of described tested voltage or the resistance of described measured resistance, control the work of described alternating current testing circuit and the output signal of described alternating current testing circuit is processed, and controlling the current value of described display to described alternating current and show; Wherein,
The detection input end of described voltage/resistance testing circuit is connected with described voltage/resistance input end, the detection output terminal of described voltage/resistance testing circuit is connected with the signal input part of described microprocessor, and the controlled end of described voltage/resistance testing circuit is connected with described microprocessor-based control output terminal; The signal output part of described microprocessor is connected with described display; The public input end grounding of described measured signal; The detection input end of described alternating current testing circuit is connected with the secondary winding of described current transformer, the detection output terminal of described alternating current testing circuit is connected with the signal input part of described microprocessor, and the controlled end of described alternating current testing circuit is connected with described microprocessor-based control output terminal.
Preferably, described voltage/resistance testing circuit comprises resistance detecting circuit and voltage detecting circuit; The detection input end of described resistance detecting circuit and the detection input end of described voltage detecting circuit are all connected with described voltage/resistance input end, the detection output terminal of described resistance detecting circuit and the detection output terminal of described voltage detecting circuit are all connected with the signal input part of described microprocessor, and the controlled end of described resistance detecting circuit and the controlled end of described voltage detecting circuit are all connected with described microprocessor-based control output terminal.
Preferably, described digital split-core type meter also comprises the warning device for sending alarm sound when the resistance of described measured resistance is less than predetermined resistance value; Described warning device is connected with described microprocessor.
Preferably, described resistance detecting circuit comprises constant-current source circuit, electronic switch, high tension protection circuit and voltage signal processing circuit; Wherein,
Described constant-current source circuit is connected with described voltage signal processing circuit through described high tension protection circuit, and described constant-current source circuit is also connected with the input end of described electronic switch; The channel selecting control end of described electronic switch is connected with described microprocessor.
Preferably, described constant-current source circuit comprises operating voltage input end, reference voltage input terminal, the first operational amplifier, NMOS tube, the first resistance, the second resistance, the 3rd resistance, the 4th resistance, the 5th resistance, the 6th resistance and the 7th resistance; Wherein,
The power end of described first operational amplifier is connected with described operating voltage input end, the ground end ground connection of described first operational amplifier; First in-phase input end of described first operational amplifier is connected with the first end of the first end of the first end of described first resistance, described second resistance, the first end of described 3rd resistance and described 4th resistance respectively; Second end of described first resistance is connected with the first end of first group of input end of described electronic switch, second end of described second resistance is connected with the second end of first group of input end of described electronic switch, the three-terminal link of described second end of the 3rd resistance and first group of input end of described electronic switch, described second end of the 4th resistance is connected with the 4th end of first group of input end of described electronic switch; The common port of described electronic switch, hold, Enable Pin and NC hold equal ground connection, the power end of described electronic switch is connected with described operating voltage input end; The channel selecting control end of described electronic switch is connected with described microprocessor-based control output terminal; First inverting input of described first operational amplifier is connected with the first end of described 5th resistance and the first end of described 6th resistance respectively; Second end ground connection of described 5th resistance; Second end of described 6th resistance is connected with described reference voltage input terminal; First output terminal of described first operational amplifier is connected with the grid of described NMOS tube and the first end of described 7th resistance respectively; Second end ground connection of described 7th resistance; The source electrode of described NMOS tube is connected with described high tension protection circuit, and the drain electrode of described NMOS tube is connected with the first in-phase input end of described first operational amplifier.
Preferably, described high tension protection circuit comprise the first diode, voltage dependent resistor (VDR) and described NMOS tube self with diode; Wherein,
The negative electrode and described NMOS tube of described first diode self with the negative electrode of diode be connected, the anode of described first diode is connected with the first end of described voltage dependent resistor (VDR) and described voltage signal processing circuit respectively; Second end ground connection of described voltage dependent resistor (VDR).
Preferably, described voltage signal processing circuit comprises the second operational amplifier, the 8th resistance, the 9th resistance, the tenth resistance and the 11 resistance; Wherein,
The first end of described 8th resistance is connected with the anode of described first diode, and the second end of described 8th resistance is connected with described voltage/resistance input end; The first end of described 9th resistance is connected with described voltage/resistance input end, and the second end of described 9th resistance is connected with the first inverting input of described second operational amplifier through described tenth resistance; First in-phase input end of described second operational amplifier is connected with the first output terminal of described second operational amplifier and the first end of described 11 resistance respectively; First output terminal of described second operational amplifier is also connected with the signal input part of described microprocessor; Second end ground connection of described 11 resistance; The power end of described second operational amplifier is connected with described operating voltage input end, the ground end ground connection of described second operational amplifier.
Preferably, described voltage detecting circuit comprises the 12 resistance, the 13 resistance, the 14 resistance, the 15 resistance, the 16 resistance, the 17 resistance, described 9th resistance, described tenth resistance, described 11 resistance, described second operational amplifier and described electronic switch; Wherein,
The first end of described 9th resistance is connected with described voltage/resistance input end, and the second end of described 9th resistance is connected with the first inverting input of described second operational amplifier through described tenth resistance; First in-phase input end of described second operational amplifier is connected with the first output terminal of described second operational amplifier and the first end of described 11 resistance respectively; First output terminal of described second operational amplifier is also connected with the signal input part of described microprocessor; Second end ground connection of described 11 resistance;
The first end of the described first end of the 12 resistance, the first end of the 13 resistance and the 14 resistance is all connected with the first inverting input of described second operational amplifier; Described second end of the 12 resistance is connected with the first end of second group of input end of described electronic switch; Described second end of the 13 resistance is connected with the second end of second group of input end of described electronic switch; The three-terminal link of described second end of the 14 resistance and second group of input end of described electronic switch;
Second in-phase input end ground connection of described second operational amplifier, second inverting input of described second operational amplifier is connected with the first output terminal of described second operational amplifier through described 15 resistance, second inverting input of described second operational amplifier is also connected with the second output terminal of described second operational amplifier through described 16 resistance, and the second output terminal of described second operational amplifier is also connected with the signal input part of described microprocessor through described 17 resistance.
Preferably, described alternating current testing circuit comprises the 3rd operational amplifier, duodiode, NPN triode, PNP triode, the 18 resistance, the 19 resistance, the 20 resistance, the 21 resistance, the 22 resistance, the 23 resistance, the 24 resistance, the 25 resistance, the 26 resistance, the 27 resistance, the 28 resistance, the 29 resistance, the 30 resistance, the first electric capacity and the second electric capacity; Wherein,
The first end of the first end of the first end of described 18 resistance, the first end of the 19 resistance, the 20 resistance, the first end of the 21 resistance, the first end of the 22 resistance and the 23 resistance is all connected with the Same Name of Ends of the secondary coil of described current transformer, the different name end ground connection of the secondary coil of described current transformer; Described second end of the 18 resistance and the second end of the 19 resistance are all connected with the emitter of described PNP triode; The base stage of described PNP triode and the base stage of described NPN triode are all connected with described microprocessor-based control output terminal; The collector of described PNP triode is connected with the collector of described NPN triode; The grounded emitter of described NPN triode; The equal ground connection of second end of described second end of the 20 resistance, the second end of the 21 resistance and the 22 resistance; Second end of described 23 resistance is connected with the first end of the 24 resistance and the first in-phase input end of the 3rd operational amplifier respectively; First reverse inter-input-ing ending grounding of described 3rd operational amplifier, its first output terminal is connected with the second end of the 24 resistance, its first output terminal is also connected with the signal input part of described microprocessor through the 25 resistance, its power end is connected with described operating voltage input end, its ground end ground connection, its the second in-phase input end ground connection, its second inverting input is connected with the first end of the 26 resistance, the first end of the 27 resistance and the first end of the 28 resistance respectively; Second end of described 26 resistance is connected with the first end of the 22 resistance; Second end of the 27 resistance is connected with the first end of duodiode; Second end of the 28 resistance is connected with the second end of duodiode and the first end of the 29 resistance respectively; 3rd end of duodiode is connected with the second output terminal of the 3rd operational amplifier; Second end of the 29 resistance is connected with the signal input part of described microprocessor, and the second end of the 29 resistance is also through the 30 resistance eutral grounding; First electric capacity and the 28 resistor coupled in parallel; Second electric capacity and the 30 resistor coupled in parallel.
The digital split-core type meter that the utility model provides, the detection input end of described voltage/resistance testing circuit is connected with described voltage/resistance input end, the detection output terminal of described voltage/resistance testing circuit is connected with the signal input part of described microprocessor, and the controlled end of described voltage/resistance testing circuit is connected with described microprocessor-based control output terminal; The signal output part of described microprocessor is connected with described display; The public input end grounding of described measured signal; The detection input end of described alternating current testing circuit is connected with the secondary winding of described current transformer, the detection output terminal of described alternating current testing circuit is connected with the signal input part of described microprocessor, and the controlled end of described alternating current testing circuit is connected with described microprocessor-based control output terminal.The utility model numeral split-core type meter has the advantage automatically selecting measurement function, and namely the utility model numeral split-core type meter does not need the switching carrying out any measurement function to select, and automatically can identify the signal type of measured signal, and measurement result is shown; Meanwhile, the utility model numeral split-core type meter also has the advantage that security is high and cost is low.
Accompanying drawing explanation
Fig. 1 is the modular structure schematic diagram of the utility model numeral split-core type meter one embodiment;
Fig. 2 is the electrical block diagram of resistance detecting circuit in the utility model numeral split-core type meter one embodiment;
Fig. 3 is the electrical block diagram of voltage detecting circuit in the utility model numeral split-core type meter one embodiment;
Fig. 4 is the electrical block diagram of alternating current testing circuit in the utility model numeral split-core type meter one embodiment.
Fig. 5 is the flow chart of steps that the utility model numeral split-core type meter realizes the embodiment that alternating current is measured automatically.
Fig. 6 is the flow chart of steps that the utility model numeral split-core type meter realizes the embodiment that voltage/resistance is measured automatically.
The realization of the utility model object, functional characteristics and advantage will in conjunction with the embodiments, are described further with reference to accompanying drawing.
Embodiment
Should be appreciated that specific embodiment described herein only in order to explain the utility model, and be not used in restriction the utility model.
The utility model provides a kind of digital split-core type meter.
With reference to the modular structure schematic diagram that Fig. 1, Fig. 1 are the utility model numeral split-core type meter one embodiments.
In the present embodiment, this digital split-core type meter comprises the public input end 101 of measured signal, voltage/resistance input end 102, voltage/resistance testing circuit 103, microprocessor 104, display 105, current transformer 106, alternating current testing circuit 107 and warning device 108.
Wherein, the public input end 101 of described measured signal is the public input end of detection of measured signal;
Described voltage/resistance input end 102, for matching to input tested voltage or measured resistance with the public input end of described measured signal 101;
Described voltage/resistance testing circuit 103, for carrying out input process to described tested voltage or measured resistance.In the present embodiment, described voltage/resistance testing circuit 103 comprises resistance detecting circuit 1031 and voltage detecting circuit 1032;
Described microprocessor 104, work for controlling described voltage/resistance testing circuit 103 and the output signal of described voltage/resistance testing circuit 103 is processed, control described display 105 to show the magnitude of voltage of described tested voltage or the resistance of described measured resistance, control described alternating current testing circuit 107 work and process the output signal of described alternating current testing circuit 107, and control the current value of described display 105 to described alternating current and show;
Described display 105, for showing the current value of the magnitude of voltage of described tested voltage, the resistance of described measured resistance or described tested alternating current;
Described current transformer 106, carries out induction to described alternating current during for being alternating current to measured signal and detects.In the present embodiment, described current transformer 106 is forcipated mutual-inductor.
Described alternating current testing circuit 107, carries out input process for the induction current produced the secondary winding of described current transformer 106.
Described warning device 108, for sending alarm sound when the resistance of described measured resistance is less than predetermined resistance value.In the present embodiment, described warning device 108 is hummer.
Particularly, described measured signal public input end 101 ground connection; The detection input end of described resistance detecting circuit 1031 and the detection input end of described voltage detecting circuit 1032 are all connected with described voltage/resistance input end 102, the detection output terminal of described resistance detecting circuit 1031 and the detection output terminal of described voltage detecting circuit 1032 are all connected with the signal input part of described microprocessor 104, and the controlled end of described resistance detecting circuit 1031 is connected (not shown) with the control output end of described microprocessor 104; The controlled end of described voltage detecting circuit 1032 is connected with the control output end of described microprocessor 104; The signal output part of described microprocessor 104 is connected with described display 105; The detection input end of described alternating current testing circuit 107 is connected with the secondary winding of described current transformer 106, the detection output terminal of described alternating current testing circuit 107 is connected with the signal input part of described microprocessor 104, and the controlled end of described alternating current testing circuit 107 is connected with the control output end of described microprocessor 104; Described warning device 108 is connected with described microprocessor 104.
Fig. 2 is the electrical block diagram of resistance detecting circuit in the utility model numeral split-core type meter one embodiment.
See figures.1.and.2 in the lump, in the present embodiment, described resistance detecting circuit 1031 comprises constant-current source circuit 201, electronic switch 202, high tension protection circuit 203 and voltage signal processing circuit 204.In the present embodiment, the model of described electronic switch 202 is SGM4582.
Particularly, described constant-current source circuit 201 is connected with described voltage signal processing circuit 204 through described high tension protection circuit 203, and described constant-current source circuit 201 is also connected with the input end of described electronic switch 202; The channel selecting control end (the 9th pin and the 10th pin of electronic switch 202 described in corresponding diagram 2) of described electronic switch 202 is connected with described microprocessor 104 (namely described microprocessor 104 exports control signal S4 and control signal S5 to described electronic switch 202 to control the selection of the input channel of described electronic switch 202).
In the present embodiment, described constant-current source circuit 201 comprises operating voltage input end VDD, reference voltage input terminal REFO, the first operational amplifier U1, NMOS tube Q1, the first resistance R1, the second resistance R2, the 3rd resistance R3, the 4th resistance R4, the 5th resistance R5, the 6th resistance R6 and the 7th resistance R7.In the present embodiment, the model of described first operational amplifier U1 is TP358.
Particularly, the power end VCC of described first operational amplifier U1 is connected with described operating voltage input end VDD, the ground end GND ground connection of described first operational amplifier U1; The first in-phase input end 1A+ of described first operational amplifier U1 is connected with the first end of the first end of the first end of described first resistance R1, described second resistance R2, the first end of described 3rd resistance R3 and described 4th resistance R4 respectively; Second end of described first resistance R1 is connected with the first end Y0 of first group of input end of described electronic switch 202, second end of described second resistance R2 is connected with the second end Y1 of first group of input end of described electronic switch 202, second end of described 3rd resistance R3 is connected with the 3rd end Y2 of first group of input end of described electronic switch 202, and second end of described 4th resistance R4 is connected with the 4th end Y3 of first group of input end of described electronic switch 202; The common port Y of described electronic switch 202, hold GND, Enable Pin EN and NC to hold equal ground connection, the power end V+ of described electronic switch 202 is connected with described operating voltage input end VDD; Channel selecting control end A, B of described electronic switch 202 are connected with the control output end of described microprocessor 104.
The first inverting input 1A-of described first operational amplifier U1 is connected with the first end of described 5th resistance R5 and the first end of described 6th resistance R6 respectively; The second end ground connection of described 5th resistance R5; Second end of described 6th resistance R6 is connected with described reference voltage input terminal REFO; The first output terminal OA of described first operational amplifier U1 is connected with the grid of described NMOS tube Q1 and the first end of described 7th resistance R7 respectively; The second end ground connection of described 7th resistance R7; The source electrode of described NMOS tube Q1 is connected with described high tension protection circuit 203, and the drain electrode of described NMOS tube Q1 is connected with the first in-phase input end 1A+ of described first operational amplifier U1.
In the present embodiment, described high tension protection circuit 203 comprise the first diode D1, voltage dependent resistor (VDR) S1 and described NMOS tube Q1 self with diode D0;
Particularly, the negative electrode and described NMOS tube Q1 of described first diode D1 self with the negative electrode of diode D0 be connected, the anode of described first diode D1 is connected with the first end of described voltage dependent resistor (VDR) S1 and described voltage signal processing circuit 204 respectively; The second end ground connection of described voltage dependent resistor (VDR) S1.
Described voltage signal processing circuit 204 comprises the second operational amplifier U2, the 8th resistance R8, the 9th resistance R9, the tenth resistance R10 and the 11 resistance R11.In the present embodiment, described 8th resistance R8 is thermistor, and the model of described second operational amplifier U2 is TP358.
Particularly, the first end of described 8th resistance R8 is connected with the anode of described first diode D1, and second end of described 8th resistance R8 is connected with described voltage/resistance input end V/OHM (the described voltage/resistance input end 102 namely in Fig. 1); The first end of described 9th resistance R9 is connected with described voltage/resistance input end V/OHM, and second end of described 9th resistance R9 is connected with the first inverting input 1A-of described second operational amplifier U2 through described tenth resistance R10; The first in-phase input end 1A+ of described second operational amplifier U2 is connected with the first output terminal OA of described second operational amplifier U2 and the first end of described 11 resistance R11 respectively; The first output terminal OA of described second operational amplifier U2 is also connected with the signal input part of described microprocessor 104 (namely in the present embodiment, the first output terminal OA of described second operational amplifier U2 exports the signal input part of the voltage signal ADIN corresponding to measured resistance to described microprocessor 104); The second end ground connection of described 11 resistance R11; The power end VCC of described second operational amplifier U2 is connected with described operating voltage input end VDD, the ground end GND ground connection of described second operational amplifier U2.
See figures.1.and.2 in the lump, in the present embodiment, the method for described resistance detecting circuit 1031 measuring resistance is different from the method for traditional split-core type meter measuring resistance, and the method for traditional split-core type meter measuring resistance adopts constant voltage resistance measurement method.In the present embodiment, measured resistance is by described voltage/resistance input end V/OHM (the described voltage/resistance input end 102 in corresponding diagram 1) and measured signal public input end COM (the public input end 101 of the described measured signal in corresponding diagram 1) input, the method of described resistance detecting circuit 1031 measuring resistance is the principle that the low side making full use of described NMOS tube Q1 drives, utilize described first operational amplifier U1, described NMOS tube Q1 and described first resistance R1, described second resistance R2, described 3rd resistance R3, described 4th resistance R4, described 5th resistance R5, described 6th resistance R6 and described 7th resistance R7 (i.e. described constant-current source circuit 201) realizes resistance constant current and measures (namely in the present embodiment, the method of described resistance detecting circuit 1031 measuring resistance adopts constant current resistance measurement method).Meanwhile, in described resistance detecting circuit 1031, utilize described first diode D1 and described NMOS tube Q1 self with diode D0 and described voltage dependent resistor (VDR) S1 form low cost effective high tension protection circuit 203.
Fig. 3 is the electrical block diagram of voltage detecting circuit in the utility model numeral split-core type meter one embodiment.
In the lump with reference to Fig. 1, Fig. 2 and Fig. 3, in the present embodiment, described voltage detecting circuit 1032 comprises the 12 resistance R12, 13 resistance R13, 14 resistance R14, 15 resistance R15, 16 resistance R16, 17 resistance R17, described 9th resistance R9, described tenth resistance R10, described 11 resistance R11, described second operational amplifier U2 and described electronic switch 202, i.e. described 9th resistance R9, described tenth resistance R10, described 11 resistance R11, the components and parts that described second operational amplifier U2 and described electronic switch 202 are described voltage detecting circuit 1032 and described resistance detecting circuit 1031 shares.
Particularly, the first end of described 9th resistance R9 is connected with described voltage/resistance input end V/OHM, and second end of described 9th resistance R9 is connected with the first inverting input 1A-of described second operational amplifier U2 through described tenth resistance R10, the first in-phase input end 1A+ of described second operational amplifier U2 is connected with the first output terminal OA of described second operational amplifier U2 and the first end of described 11 resistance R11 respectively, the first output terminal OA of described second operational amplifier U2 is also connected with the signal input part of described microprocessor 104 (namely in the present embodiment, the first output terminal OA of described second operational amplifier U2 exports the signal input part of the voltage signal VOUT corresponding to tested voltage to described microprocessor 104), the second end ground connection of described 11 resistance R11, the first end of the described first end of the 12 resistance R12, the first end of the 13 resistance R13 and the 14 resistance R14 is all connected with the first inverting input 1A-of described second operational amplifier U2, second end of described 12 resistance R12 is connected with the first end X0 of second group of input end of described electronic switch 202, second end of described 13 resistance R13 is connected with the second end X1 of second group of input end of described electronic switch 202, second end of described 14 resistance R14 is connected with the 3rd end X2 of second group of input end of described electronic switch 202, the second in-phase input end 1B+ ground connection of described second operational amplifier U2, the second inverting input 1B-of described second operational amplifier U2 is connected with the first output terminal OA of described second operational amplifier U2 through described 15 resistance R15, the second inverting input 1B-of described second operational amplifier U2 is also connected with the second output terminal OB of described second operational amplifier U2 through described 16 resistance R16, the second output terminal OB of described second operational amplifier U2 is also connected (namely in the present embodiment through described 17 resistance R17 with the signal input part of described microprocessor 104, the second output terminal OB of described second operational amplifier U2 exports the frequency signal VFreq of tested voltage, this frequency signal Vfreq exports the signal input part of described microprocessor 104 to through described 17 resistance R17).
In the lump with reference to Fig. 1, Fig. 2 and Fig. 3, in the present embodiment, tested voltage is by described voltage/resistance input end V/OHM (the described voltage/resistance input end 102 in corresponding diagram 1) and measured signal public input end COM (the public input end 101 of the described measured signal in corresponding diagram 1) input, the tested voltage inputted is by described 9th resistance R9, tenth resistance R10 and the 12 resistance R12, 13 resistance R13, 14 resistance R14 forms potential-divider network, then by described second operational amplifier U2, the voltage signal VOUT corresponding to described tested voltage is delivered to described microprocessor 104, described microprocessor 104 is by judging that to voltage signal VOUT high-speed sampling described tested voltage is that ac voltage signal is still as d. c. voltage signal, meanwhile, described microprocessor 104 by calculating the sampling rate to ac voltage signal optimum to the frequency signal VFreq analysis meter of described tested voltage, and is sampled to ac voltage signal according to the sampling rate of this optimum.
Fig. 4 is the electrical block diagram of alternating current testing circuit in the utility model numeral split-core type meter one embodiment.
In the lump with reference to Fig. 1 and Fig. 4, in the present embodiment, described alternating current testing circuit 107 comprises the 3rd operational amplifier U3, duodiode Q2, NPN triode Q3, PNP triode Q4, 18 resistance R18, 19 resistance R19, 20 resistance R20, 21 resistance R21, 22 resistance R22, 23 resistance R23, 24 resistance R24, 25 resistance R25, 26 resistance R26, 27 resistance R27, 28 resistance R28, 29 resistance R29, 30 resistance R30, first electric capacity C1 and the second electric capacity C2.In the present embodiment, the model of described 3rd operational amplifier U3 is TP358.
Particularly, the first end of the first end of the first end of described 18 resistance R18, the first end of the 19 resistance R19, the 20 resistance R20, the first end of the 21 resistance R21, the first end of the 22 resistance R22 and the 23 resistance R23 is all connected with the Same Name of Ends of the secondary coil S2 of described current transformer T1 (the described current transformer 106 namely in Fig. 1), the different name end ground connection of the secondary coil of described current transformer T1; Described second end of the 18 resistance R18 and second end of the 19 resistance R19 are all connected with the emitter of described PNP triode Q4; The base stage of described PNP triode Q4 and the base stage of described NPN triode Q3 are all connected (namely in the present embodiment with the control output end of described microprocessor 104, described microprocessor 104 exports control signal CTRL signal to the base stage of described PNP triode Q4 and the base stage of described NPN triode Q3, to control described PNP triode Q4 and described NPN triode Q3 whether conducting); The collector of described PNP triode Q4 is connected with the collector of described NPN triode Q3; The grounded emitter of described NPN triode Q3; The equal ground connection of second end of described second end of the 20 resistance R20, second end of the 21 resistance R21 and the 22 resistance R22; Second end of described 23 resistance R23 is connected with the first end of the 24 resistance R24 and the first in-phase input end 1A+ of the 3rd operational amplifier U3 respectively; the first inverting input 1A-ground connection of described 3rd operational amplifier U3, the first output terminal OA of described 3rd operational amplifier U3 is connected with second end of the 24 resistance R24, the first output terminal OA of described 3rd operational amplifier U3 is also connected (namely in the present embodiment through the 25 resistance R25 with the signal input part of described microprocessor 104, the first output terminal OA of described 3rd operational amplifier U3 exports the frequency signal ACAFreq of tested alternating current, this frequency signal ACAFreq exports the signal input part of described microprocessor 104 to through the 25 resistance R25), the power end VCC of described 3rd operational amplifier U3 is connected with described operating voltage input end VDD, the ground end GND ground connection of described 3rd operational amplifier U3, the second in-phase input end 1B+ ground connection of described 3rd operational amplifier U3, the second inverting input 1B-of described 3rd operational amplifier U3 respectively with the first end of the 26 resistance R26, the first end of the 27 resistance R27 and the first end of the 28 resistance R28 connect, second end of described 26 resistance R26 is connected with the first end of the 22 resistance R22, second end of the 27 resistance R27 is connected with the first end (namely duodiode Q2 label is that end of 1) of duodiode Q2, second end of the 28 resistance R28 is connected with second end (namely duodiode Q2 label is that end of 2) of duodiode Q2 and the first end of the 29 resistance R29 respectively, 3rd end (namely duodiode Q2 label is that end of 3) of described duodiode Q2 is connected with the second output terminal OB of described 3rd operational amplifier U3, second end of the 29 resistance R29 is connected (namely in the present embodiment with the signal input part of described microprocessor 104, second end of described 29 resistance R29 exports the signal input part of corresponding d. c. voltage signal ACAOUT to described microprocessor 104 of tested alternating current), second end of the 29 resistance R29 is also through the 30 resistance R30 ground connection, first electric capacity C1 is in parallel with the 28 resistance R28, second electric capacity C2 is in parallel with the 30 resistance R30.
In the lump with reference to Fig. 1 and Fig. 4, in the present embodiment, tested alternating current is by producing induction current at the secondary winding S2 of described current transformer T1 after described current transformer T1 (i.e. forcipated mutual-inductor), this induction current is by described 18 resistance R18, described 19 resistance R19, described 20 resistance R20, described 21 resistance R21 and described 22 resistance R22 produces different induction alternating voltages, produced induction alternating voltage is transformed into the frequency signal ACAFreq of tested alternating current and the d. c. voltage signal ACAOUT corresponding to tested alternating current by described 3rd operational amplifier U3, and export this frequency signal ACAFreq and this d. c. voltage signal ACAOUT to described microprocessor 104, described microprocessor 104 differentiates frequency and the voltage of tested alternating current by detecting this frequency signal ACAFreq and this d. c. voltage signal ACAOUT.
The digital split-core type meter that the present embodiment provides, comprises the public input end of measured signal, voltage/resistance input end, current transformer, voltage/resistance testing circuit, alternating current testing circuit, microprocessor, display and warning device; The public input end grounding of described measured signal; The detection input end of described voltage/resistance testing circuit is connected with described voltage/resistance input end, the detection output terminal of described voltage/resistance testing circuit is connected with the signal input part of described microprocessor, and the controlled end of described voltage/resistance testing circuit is connected with described microprocessor-based control output terminal; The detection input end of described alternating current testing circuit is connected with the secondary winding of described current transformer, described alternating current testing circuit detects output terminal and is connected with the signal input part of described microprocessor, and described alternating current testing circuit controlled end is connected with described microprocessor-based control output terminal; The signal output part of described microprocessor is connected with described display and described warning device.The present embodiment numeral split-core type meter has the advantage automatically selecting measurement function, measured resistance and tested voltage (comprising alternating voltage and DC voltage) are all by same detection input port input, namely the present embodiment numeral split-core type meter does not need the switching carrying out any measurement function to select, automatically can identify the signal type of measured signal, and measurement result is shown; Further, the present embodiment numeral split-core type meter also has the advantage that security is high and cost is low.
Simultaneously, in production operation, when needing to monitor different measuring-signals, existing common hand range measurement instrument, need ceaselessly to switch to select correct function range in tens gears, even the measurement instrument of automatic range, also will press function selection key frequently, switch frequently in several driving switch, waste the production time greatly.And the present embodiment numeral split-core type meter does not need the switching carrying out any measurement function to select, just automatically can identify the signal type of measured signal, and measurement result is shown, namely the present embodiment numeral split-core type meter can greatly be enhanced productivity.
With reference to Fig. 5 and Fig. 6, realize in an embodiment of method for automatic measurement at digital split-core type meter of the present utility model, the method for automatic measurement of described digital split-core type meter comprises ac current measurement step and voltage/resistance measuring process, wherein,
With reference to Fig. 5, described ac current measurement step comprises:
Step S51, described processor 104 controls the induction current that the secondary winding of described alternating current testing circuit 107 to described current transformer 106 produce and carries out input process, produced induction alternating voltage is transformed into the first d. c. voltage signal corresponding to the frequency signal of tested alternating current and tested alternating current by described alternating current testing circuit 107; And
Step S52, described processor 104 receives the frequency signal of described tested alternating current and the first d. c. voltage signal corresponding to tested alternating current, when the magnitude of voltage of described first d. c. voltage signal exceedes first threshold voltage, described microprocessor 104 differentiates frequency values and the current value of tested alternating current by detecting this frequency signal and this first d. c. voltage signal, and exports the frequency values of described tested alternating current and current value to described display 105 and show.
Particularly, with reference to Fig. 1 and Fig. 4, the particular circuit configurations example of composition graphs 4, produced induction alternating voltage is transformed into the frequency signal ACAFreq of tested alternating current and the first d. c. voltage signal ACAOUT corresponding to tested alternating current by alternating current testing circuit 107, and exports the signal input part of described microprocessor 104 to.Described microprocessor 104 differentiates frequency values and the current value of tested alternating current by detecting this frequency signal ACAFreq and this first d. c. voltage signal ACAOUT.
In step S52, when the magnitude of voltage of described first d. c. voltage signal ACAOUT exceedes first threshold voltage, described microprocessor 104 differentiates frequency values and the current value of tested alternating current by detecting this frequency signal ACAFreq and this first d. c. voltage signal ACAOUT.In the present embodiment, the first threshold voltage preset is 100 μ V, but the first threshold voltage preset does not limit to so, suitably can adjust according to embody rule demand.
When the magnitude of voltage of described first d. c. voltage signal ACAOUT does not exceed first threshold voltage, then indicate without alternating current or alternating current small and weak to considering, then now do not shown by display 105.
With reference to Fig. 6, described voltage/resistance measuring process comprises:
Step S10, described voltage/resistance testing circuit 103 carries out output voltage signal after input process to the tested voltage of input or measured resistance;
Step S20, described microprocessor 104 receives the voltage signal that described voltage/resistance testing circuit 103 exports, and judges whether the magnitude of voltage of described voltage signal exceedes default Second Threshold voltage;
When the magnitude of voltage of described voltage signal exceedes default Second Threshold voltage, perform step S31, described microprocessor 104 judges that described voltage signal represents tested voltage, judge that described tested voltage is that ac voltage signal is still as d. c. voltage signal by carrying out high-speed sampling to described voltage signal, if the magnitude of voltage that high-speed sampling voltage signal obtains exceedes the 3rd default threshold voltage, then judge that described tested voltage is ac voltage signal, if the magnitude of voltage that high-speed sampling voltage signal obtains does not exceed the 3rd default threshold voltage, then judge that described tested voltage is d. c. voltage signal, wherein said 3rd threshold voltage is greater than described Second Threshold voltage,
When judging that described tested voltage is d. c. voltage signal, perform step S311, described microprocessor 104 calculates corresponding DC voltage value according to described voltage signal and described DC voltage value is exported to described display 105 and shows;
When judging that described tested voltage is ac voltage signal, perform step S312, described microprocessor 104 is by calculating the sampling rate to ac voltage signal optimum to the frequency signal analysis meter of described tested voltage, sample to calculate ac voltage to ac voltage signal according to the sampling rate of this optimum, and described ac voltage is exported to described display 105 and show;
When described voltage signal does not exceed default Second Threshold voltage, perform step S32, described microprocessor 104 judges to be input as measured resistance, and described microprocessor 104 calculates corresponding resistance value according to described voltage signal;
Particularly; with reference to Fig. 1, Fig. 2 and Fig. 3; particular circuit configurations example in composition graphs 2 and Fig. 3; voltage/resistance testing circuit 103 comprises resistance detecting circuit 1031 and voltage detecting circuit 1032, and resistance detecting circuit 1031 comprises constant-current source circuit 201, electronic switch 202, high tension protection circuit 203 and voltage signal processing circuit 204.
In step slo, when the public input end COM of measured signal and voltage/resistance input end V/OHM is input as measured resistance, the constant-current source circuit 201 of resistance detecting circuit 1031 is by constant current resistance measurement method, can detect that this measured resistance inputs, and export the signal input part of the voltage signal ADIN corresponding to measured resistance to microprocessor 104.
And when the public input end COM of measured signal and voltage/resistance input end V/OHM is input as tested voltage, voltage detecting circuit 1032 can detect this tested voltage input, and exports the signal input part of the voltage signal VOUT corresponding to tested voltage to microprocessor 104.Described microprocessor 104 is by judging that to voltage signal VOUT high-speed sampling described tested voltage is that ac voltage signal is still as d. c. voltage signal; Meanwhile, described microprocessor 104 by calculating the sampling rate to ac voltage signal optimum to the frequency signal VFreq analysis meter of described tested voltage, and is sampled to ac voltage signal according to the sampling rate of this optimum.
In step S20, microprocessor 104 receives the voltage signal that described voltage/resistance testing circuit 103 exports, by judging whether the magnitude of voltage of described voltage signal exceedes default Second Threshold voltage and judge to be input as measured resistance or tested voltage, and compared by magnitude of voltage that high-speed sampling voltage signal is obtained and the 3rd threshold voltage and judge that tested voltage is ac voltage signal or d. c. voltage signal.In the present embodiment, the Second Threshold voltage preset is 0.3V, and the 3rd default threshold voltage is 0.8V, but the Second Threshold voltage preset and the 3rd threshold voltage do not limit to so, suitably can adjust according to embody rule demand.
In the present embodiment, described microprocessor 104 comprises step calculate the step (i.e. described step 32) of corresponding resistance value according to described voltage signal after further:
Step S40, described microprocessor 104 judges whether described resistance value is less than preset resistive value;
When described resistance value is not less than described preset resistive value, perform step S41, described resistance value is exported to described display 105 and shows by described microprocessor 104; When described resistance value is less than described preset resistive value, perform step S42, described microprocessor 104 controls warning device 106 and reports to the police.
In step s 40, described microprocessor 104 judges whether described resistance value is less than preset resistive value.In the present embodiment, preset resistive value is 50 ohm, but preset resistive value does not limit to so, suitably can adjust according to embody rule demand.
The method for automatic measurement of the digital split-core type meter of the present embodiment, can realize the automatic identification to alternating current, voltage/resistance and measurement, makes the measurement of digital split-core type meter extremely convenient.
These are only preferred embodiment of the present utility model; not thereby the scope of the claims of the present utility model is limited; every utilize the utility model instructions and accompanying drawing content to do equivalent structure or equivalent flow process conversion; or be directly or indirectly used in other relevant technical fields, be all in like manner included in scope of patent protection of the present utility model.
Claims (9)
1. a digital split-core type meter, is characterized in that, described digital split-core type meter comprises:
The public input end of measured signal;
Voltage/resistance input end, matches with the public input end of described measured signal, for inputting tested voltage or measured resistance;
Voltage/resistance testing circuit, for carrying out input process to described tested voltage or measured resistance;
Current transformer, carries out induction to described alternating current during for being alternating current to measured signal and detects;
Alternating current testing circuit, carries out input process for the induction current produced the secondary winding of described current transformer;
Display, for showing the current value of the magnitude of voltage of described tested voltage, the resistance of described measured resistance or described tested alternating current; And
Microprocessor, for controlling the work of described voltage/resistance testing circuit and processing the output signal of described voltage/resistance testing circuit, control described display to show the magnitude of voltage of described tested voltage or the resistance of described measured resistance, control the work of described alternating current testing circuit and the output signal of described alternating current testing circuit is processed, and controlling the current value of described display to described alternating current and show; Wherein,
The detection input end of described voltage/resistance testing circuit is connected with described voltage/resistance input end, the detection output terminal of described voltage/resistance testing circuit is connected with the signal input part of described microprocessor, and the controlled end of described voltage/resistance testing circuit is connected with described microprocessor-based control output terminal; The signal output part of described microprocessor is connected with described display; The public input end grounding of described measured signal; The detection input end of described alternating current testing circuit is connected with the secondary winding of described current transformer, the detection output terminal of described alternating current testing circuit is connected with the signal input part of described microprocessor, and the controlled end of described alternating current testing circuit is connected with described microprocessor-based control output terminal.
2. digital split-core type meter as claimed in claim 1, is characterized in that, described voltage/resistance testing circuit comprises resistance detecting circuit and voltage detecting circuit; The detection input end of described resistance detecting circuit and the detection input end of described voltage detecting circuit are all connected with described voltage/resistance input end, the detection output terminal of described resistance detecting circuit and the detection output terminal of described voltage detecting circuit are all connected with the signal input part of described microprocessor, and the controlled end of described resistance detecting circuit and the controlled end of described voltage detecting circuit are all connected with described microprocessor-based control output terminal.
3. digital split-core type meter as claimed in claim 1 or 2, is characterized in that, described digital split-core type meter also comprises the warning device for sending alarm sound when the resistance of described measured resistance is less than predetermined resistance value; Described warning device is connected with described microprocessor.
4. digital split-core type meter as claimed in claim 2, is characterized in that, described resistance detecting circuit comprises constant-current source circuit, electronic switch, high tension protection circuit and voltage signal processing circuit; Wherein,
Described constant-current source circuit is connected with described voltage signal processing circuit through described high tension protection circuit, and described constant-current source circuit is also connected with the input end of described electronic switch; The channel selecting control end of described electronic switch is connected with described microprocessor.
5. digital split-core type meter as claimed in claim 4, it is characterized in that, described constant-current source circuit comprises operating voltage input end, reference voltage input terminal, the first operational amplifier, NMOS tube, the first resistance, the second resistance, the 3rd resistance, the 4th resistance, the 5th resistance, the 6th resistance and the 7th resistance; Wherein,
The power end of described first operational amplifier is connected with described operating voltage input end, the ground end ground connection of described first operational amplifier; First in-phase input end of described first operational amplifier is connected with the first end of the first end of the first end of described first resistance, described second resistance, the first end of described 3rd resistance and described 4th resistance respectively; Second end of described first resistance is connected with the first end of first group of input end of described electronic switch, second end of described second resistance is connected with the second end of first group of input end of described electronic switch, the three-terminal link of described second end of the 3rd resistance and first group of input end of described electronic switch, described second end of the 4th resistance is connected with the 4th end of first group of input end of described electronic switch; The common port of described electronic switch, hold, Enable Pin and NC hold equal ground connection, the power end of described electronic switch is connected with described operating voltage input end; The channel selecting control end of described electronic switch is connected with described microprocessor-based control output terminal; First inverting input of described first operational amplifier is connected with the first end of described 5th resistance and the first end of described 6th resistance respectively; Second end ground connection of described 5th resistance; Second end of described 6th resistance is connected with described reference voltage input terminal; First output terminal of described first operational amplifier is connected with the grid of described NMOS tube and the first end of described 7th resistance respectively; Second end ground connection of described 7th resistance; The source electrode of described NMOS tube is connected with described high tension protection circuit, and the drain electrode of described NMOS tube is connected with the first in-phase input end of described first operational amplifier.
6. digital split-core type meter as claimed in claim 5, is characterized in that, described high tension protection circuit comprise the first diode, voltage dependent resistor (VDR) and described NMOS tube self with diode; Wherein,
The negative electrode and described NMOS tube of described first diode self with the negative electrode of diode be connected, the anode of described first diode is connected with the first end of described voltage dependent resistor (VDR) and described voltage signal processing circuit respectively; Second end ground connection of described voltage dependent resistor (VDR).
7. digital split-core type meter as claimed in claim 6, is characterized in that, described voltage signal processing circuit comprises the second operational amplifier, the 8th resistance, the 9th resistance, the tenth resistance and the 11 resistance; Wherein,
The first end of described 8th resistance is connected with the anode of described first diode, and the second end of described 8th resistance is connected with described voltage/resistance input end; The first end of described 9th resistance is connected with described voltage/resistance input end, and the second end of described 9th resistance is connected with the first inverting input of described second operational amplifier through described tenth resistance; First in-phase input end of described second operational amplifier is connected with the first output terminal of described second operational amplifier and the first end of described 11 resistance respectively; First output terminal of described second operational amplifier is also connected with the signal input part of described microprocessor; Second end ground connection of described 11 resistance; The power end of described second operational amplifier is connected with described operating voltage input end, the ground end ground connection of described second operational amplifier.
8. digital split-core type meter as claimed in claim 7, it is characterized in that, described voltage detecting circuit comprises the 12 resistance, the 13 resistance, the 14 resistance, the 15 resistance, the 16 resistance, the 17 resistance, described 9th resistance, described tenth resistance, described 11 resistance, described second operational amplifier and described electronic switch; Wherein,
The first end of described 9th resistance is connected with described voltage/resistance input end, and the second end of described 9th resistance is connected with the first inverting input of described second operational amplifier through described tenth resistance; First in-phase input end of described second operational amplifier is connected with the first output terminal of described second operational amplifier and the first end of described 11 resistance respectively; First output terminal of described second operational amplifier is also connected with the signal input part of described microprocessor; Second end ground connection of described 11 resistance;
The first end of the described first end of the 12 resistance, the first end of the 13 resistance and the 14 resistance is all connected with the first inverting input of described second operational amplifier; Described second end of the 12 resistance is connected with the first end of second group of input end of described electronic switch; Described second end of the 13 resistance is connected with the second end of second group of input end of described electronic switch; The three-terminal link of described second end of the 14 resistance and second group of input end of described electronic switch;
Second in-phase input end ground connection of described second operational amplifier, second inverting input of described second operational amplifier is connected with the first output terminal of described second operational amplifier through described 15 resistance, second inverting input of described second operational amplifier is also connected with the second output terminal of described second operational amplifier through described 16 resistance, and the second output terminal of described second operational amplifier is also connected with the signal input part of described microprocessor through described 17 resistance.
9. digital split-core type meter as claimed in claim 5, it is characterized in that, described alternating current testing circuit comprises the 3rd operational amplifier, duodiode, NPN triode, PNP triode, the 18 resistance, the 19 resistance, the 20 resistance, the 21 resistance, the 22 resistance, the 23 resistance, the 24 resistance, the 25 resistance, the 26 resistance, the 27 resistance, the 28 resistance, the 29 resistance, the 30 resistance, the first electric capacity and the second electric capacity; Wherein,
The first end of the first end of the first end of described 18 resistance, the first end of the 19 resistance, the 20 resistance, the first end of the 21 resistance, the first end of the 22 resistance and the 23 resistance is all connected with the Same Name of Ends of the secondary coil of described current transformer, the different name end ground connection of the secondary coil of described current transformer; Described second end of the 18 resistance and the second end of the 19 resistance are all connected with the emitter of described PNP triode; The base stage of described PNP triode and the base stage of described NPN triode are all connected with described microprocessor-based control output terminal; The collector of described PNP triode is connected with the collector of described NPN triode; The grounded emitter of described NPN triode; The equal ground connection of second end of described second end of the 20 resistance, the second end of the 21 resistance and the 22 resistance; Second end of described 23 resistance is connected with the first end of the 24 resistance and the first in-phase input end of the 3rd operational amplifier respectively; First reverse inter-input-ing ending grounding of described 3rd operational amplifier, its first output terminal is connected with the second end of the 24 resistance, its first output terminal is also connected with the signal input part of described microprocessor through the 25 resistance, its power end is connected with described operating voltage input end, its ground end ground connection, its the second in-phase input end ground connection, its second inverting input is connected with the first end of the 26 resistance, the first end of the 27 resistance and the first end of the 28 resistance respectively; Second end of described 26 resistance is connected with the first end of the 22 resistance; Second end of the 27 resistance is connected with the first end of duodiode; Second end of the 28 resistance is connected with the second end of duodiode and the first end of the 29 resistance respectively; 3rd end of duodiode is connected with the second output terminal of the 3rd operational amplifier; Second end of the 29 resistance is connected with the signal input part of described microprocessor, and the second end of the 29 resistance is also through the 30 resistance eutral grounding; First electric capacity and the 28 resistor coupled in parallel; Second electric capacity and the 30 resistor coupled in parallel.
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| CN201520537201.5U CN204989279U (en) | 2015-07-23 | 2015-07-23 | Digit split -core type meter |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105092928A (en) * | 2015-07-23 | 2015-11-25 | 高超 | Digital clamp meter and automatic measurement method |
| CN109884351A (en) * | 2019-03-02 | 2019-06-14 | 西安培华学院 | A kind of computer detection of electrons board |
| CN110763908A (en) * | 2019-11-11 | 2020-02-07 | 绵阳市维博电子有限责任公司 | Digital display DC meter |
-
2015
- 2015-07-23 CN CN201520537201.5U patent/CN204989279U/en not_active Withdrawn - After Issue
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105092928A (en) * | 2015-07-23 | 2015-11-25 | 高超 | Digital clamp meter and automatic measurement method |
| CN105092928B (en) * | 2015-07-23 | 2018-04-20 | 深圳市华谊智测科技股份有限公司 | Digital split-core type meter and its method for automatic measurement |
| US10267823B2 (en) | 2015-07-23 | 2019-04-23 | Shenzhen New Huayi Instrument Co., Ltd. | Digital clamp meter and automatic measurement method thereof |
| CN109884351A (en) * | 2019-03-02 | 2019-06-14 | 西安培华学院 | A kind of computer detection of electrons board |
| CN110763908A (en) * | 2019-11-11 | 2020-02-07 | 绵阳市维博电子有限责任公司 | Digital display DC meter |
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