CN204927275U - Packaging structure of low -cost silica -based module - Google Patents
Packaging structure of low -cost silica -based module Download PDFInfo
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- CN204927275U CN204927275U CN201520695949.8U CN201520695949U CN204927275U CN 204927275 U CN204927275 U CN 204927275U CN 201520695949 U CN201520695949 U CN 201520695949U CN 204927275 U CN204927275 U CN 204927275U
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
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Abstract
The utility model relates to a packaging structure of low -cost silica -based module belongs to the semiconductor packaging technology field. It includes silica -based carrier, silica -based chip and metal -cored solder ball, the front of silica -based chip is equipped with a plurality of electrode, the back is equipped with the metal level, more than two or two metal -cored solder ball sets up in the side of silica -based chip, silica -based carrier bears the silica -based chip of metal -cored solder ball and flip -chip connection with it, optionally sets up the metal level that lays wire again on the silica -based carrier, the front electrode of metal -cored solder ball, silica -based chip links firmly with the metal level that lays wire again respectively, just the metal level that lays wire again breaks off insulatingly between two adjacent each other electrodes, the rising of back metal level and the rising at the coplanar of metal -cored solder ball of silica -based chip. The utility model provides a structure is succinct, compact, choose metal -cored solder ball for use and adopt lay wire the again packaging structure of technology of ripe chip flip -chip technology and metal.
Description
Technical field
The utility model relates to a kind of encapsulating structure of silica-based module of low cost, belongs to technical field of semiconductor encapsulation.
Background technology
Along with the development of electronics industry, device integrated on printing board PCB gets more and more, and therefore the miniaturization of individual devices has become the inexorable trend of device package technological development.
Wherein, MOSFET(metal oxide semiconductor field effect tube) be utilize field effect to control the field-effect transistor of semiconductor.Because MOSFET has the characteristic that can realize low power consumption voltage and control, receive increasing concern in recent years.The source electrode (Source) of MOSFET chip and grid (Gate) are positioned at the front of chip, and its drain electrode (Drain) is arranged on the back side of chip usually.
The encapsulation of MOSFET chip requires it is the bearing capacity of big current, the efficient capacity of heat transmission.Common method for packing is directly connected with lead frame or substrate drain electrode, source electrode and grid are connected with lead frame or substrate indirectly by the thick metal lead wire of routing or wide aluminium with, but the encapsulating structure of this kind of packing forms is often larger, and the heat radiation of one side can only be realized, the decline of current carrying capacity is often caused because heat radiation can not meet demand.Certainly also have minority product to adopt clamping Clip encapsulating structure to encapsulate, can realize two-side radiation, but its encapsulating structure is numerous and diverse and encapsulation yield is on the low side, production cost is higher.Therefore, industry needs constantly to find new encapsulating structure technology, to reduce packaging technology difficulty while guarantee property indices, and reduces production cost.
Summary of the invention
The purpose of this utility model is to overcome above-mentioned deficiency, provides a kind of encapsulating structure reducing the silica-based module of the low cost of packaging technology difficulty while ensureing property indices.
the utility model is achieved in that
The encapsulating structure of the silica-based module of a kind of low cost of the utility model, it comprises silicon substrate carrier, and the upper surface of described silicon substrate carrier arranges insulating barrier,
Also comprise silicon base chip and metal-cored soldered ball, the front of described silicon base chip is provided with several electrodes, the back side is provided with metal level, the passivation layer of the front coverage diagram patterning of described silicon base chip also offers the passivation layer opening of the upper surface exposing electrode, in described passivation layer opening, arrange metal bump structure, the top of described metal bump structure arranges solder layer;
Two or more described metal-cored soldered balls are arranged at the side of silicon base chip, and the inner core of described metal-cored soldered ball is metal-cored, its outermost layer parcel weld layer;
The cross sectional dimensions of described silicon substrate carrier is greater than the cross sectional dimensions of silicon base chip, the silicon base chip that described silicon substrate carrier bearing metal core soldered ball is connected with upside-down mounting with it, the insulating barrier of described silicon substrate carrier optionally arranges interconnection metal layer again, described metal-cored soldered ball is connected by its weld layer and interconnection metal layer again, the electrode in the front of silicon base chip is connected by the solder layer of metal bump structure and interconnection metal layer again, and described interconnection metal layer is again in the separated insulation of adjacent one another are two electrodes, rising of metal layer on back and the rising at same plane of metal-cored soldered ball of described silicon base chip.
Alternatively, described metal bump structure comprises ni/au layers, and described ni/au layers is arranged in passivation layer opening.
Alternatively, described metal bump structure comprises the solder bump at titanium or titanium tungsten metal level, metal column and top thereof, and described titanium or titanium tungsten metal level are arranged in passivation layer opening, and described metal column is arranged at the surface of titanium or titanium tungsten metal level.
Alternatively, the rising of metal layer on back of described silicon base chip and rising in same level of metal-cored soldered ball.
Alternatively, between described metal-cored and weld layer, metal nickel dam or ni/au layers are set.
Alternatively, described metal-cored in spherical.
Alternatively, the electrode of described silicon base chip comprises source electrode and grid, and the metal level at the back side of this silicon base chip is drain electrode.
Alternatively, the metal level at the back side of described silicon base chip is the three-layer metal structure of titanium/nickel/gold or titanium/nickel/silver.
Alternatively, described passivation layer opening is array-like distribution.
Alternatively, also comprise filler, metal-cored soldered ball, silicon base chip, silicon substrate carrier space each other filled by described filler.
the beneficial effects of the utility model are:
1, the metal-cored soldered ball that encapsulating structure of the present utility model selects diameter dimension suitable mates with silica-based module, as the input/output terminal of the signal of telecommunication, directly be fixedly welded on target location, easy to use, overcome the defects such as printed and formed ball height size is inadequate, shape is unstable, forming technology is loaded down with trivial details, reduce technology difficulty, reduce packaging cost simultaneously;
2, the silica-based module that encapsulating structure of the present utility model is connected with upside-down mounting with it with silicon substrate carrier bearing metal core soldered ball, silicon substrate carrier, the back side of metal-cored soldered ball and silica-based module provides the channel that enough effectively dispels the heat, ensure that the heat conductivility of whole encapsulating structure, build silica-based module and metal-cored soldered ball dexterously simultaneously, telecommunication channel again between interconnection metal layer, the signal of telecommunication of the silica-based module front electrode of upside-down mounting is caused the front of whole encapsulating structure, make whole encapsulating structure succinct, compact, meet small-sized encapsulated requirement, ensure that its property indices simultaneously,
3, the flip chip mounting process that method for packing employing of the present utility model is ripe and the high-precision layer process of wiring metal again carry out the silicon base chip that package dimension reduces further, as MOSFET chip, overcome existing complex procedures and various semiconductor packaging defect, also contribute to the reduction of packaging cost.
Accompanying drawing explanation
Fig. 1 is the Facad structure schematic diagram of the encapsulating structure of the silica-based module of a kind of low cost of the utility model;
Fig. 2 is the schematic diagram of the A-A cross-sectional embodiments one of Fig. 1;
Fig. 3 is the distortion schematic diagram of Fig. 1;
Fig. 4 is the schematic diagram of the A-A cross-sectional embodiments two of Fig. 1;
In figure:
Silicon base chip 100
Chip body 102
Source electrode 121
Grid 122
Drain electrode 123
Passivation layer 130
Passivation layer opening 131
Ni/au layers 140
Solder layer 151,152
Titanium or titanium tungsten metal level 160
Metal column 171
Solder bump 172
Silicon substrate carrier 202
Interconnection metal layer I 210 again
Interconnection metal layer II 220 again
Insulating barrier 230
Metal-cored soldered ball 600
Metal-cored 610
Weld layer 620
Filler 700.
Embodiment
The encapsulating structure of the silica-based module of low cost of the present utility model is described more fully hereinafter with reference to accompanying drawing now, exemplary embodiment of the present utility model shown in the drawings, thus scope of the present utility model is conveyed to those skilled in the art by the disclosure fully.But the utility model can realize in many different forms, and should not be interpreted as being limited to the embodiment set forth here.Below especially exemplified by going out embodiment of the present utility model, and accompanying drawing is coordinated to elaborate.Element and the design of following examples are to simplify disclosed invention, and are not used to limit the utility model.
Embodiment one, see Fig. 1 and Fig. 2
Fig. 1 is the Facad structure schematic diagram of the encapsulating structure of the silica-based module of a kind of low cost of the utility model, and Fig. 2 is the A-A generalized section of Fig. 1.As can be seen from Fig. 1 and Fig. 2, the encapsulating structure of the silica-based module of low cost of the present utility model comprises silicon base chip 100, metal-cored soldered ball 600 and silicon substrate carrier 202, silicon base chip 100, metal-cored soldered ball 600 is arranged on the top of silicon substrate carrier 202, silicon substrate carrier 202 bearing metal core soldered ball 600 and silicon base chip 100, therefore the cross sectional dimensions of silicon substrate carrier 202 is greater than the cross sectional dimensions of silicon base chip 100, but by the rational deployment of silicon base chip 100 with metal-cored soldered ball 600, the cross sectional dimensions of silicon substrate carrier 202 needs again little as much as possible, to reduce the size of whole encapsulating structure.Silicon substrate carrier 202 has certain thickness, and except carrying effect, it also has heat conduction, thermolysis, and controls warping effect, to improve the performance of the encapsulating structure of the silica-based module of whole low cost, and extends the useful life of encapsulating structure.
The silicon base chip 100 of the encapsulating structure of the silica-based module of low cost of the present utility model is for power mosfet chip, the front of the chip body 102 of its silica-base material is provided with source electrode 121 and grid 122, wherein grid 122 is less, it is generally positioned at one jiao of chip body 102, and the back side of its chip body 102 arranges metal level as drain electrode 123.The material of this metal level is the titanium/nickel/gold, titanium/nickel/silver etc. of three-decker.The passivation layer 130 of the patterning of the front capping oxidation silicon of silicon base chip 100, silicon nitride or resinae dielectric material; the passivation layer opening 131 that this passivation layer 130 is offered exposes the upper surface of source electrode 121 and grid 122; as shown in Figure 2; and the first chemical Ni-plating layer golden ni/au layers 140 forming double-layer structure of chemistry leaching is again set in passivation layer opening 131; its thickness is generally 1 ~ 3 micron; with protect source electrode 121 and grid 122 is not oxidized or corrosion; be easy to welding simultaneously, and do not affect overall electric heating property.
At the upper surface of silicon substrate carrier 202, insulating barrier 230 is set, optionally arrange on insulating barrier 230 again and adopt the wafer level metal discontinuous interconnection metal layer again that is shaped of Wiring technique again, so that interconnection metal layer I 210, again interconnection metal layer II 220 are illustrated again in Fig. 2, both are in the source electrode 121 of correspondence and the separated insulation of grid 122, and respectively pad I 211, pad III 213 are set at the upper surface of interconnection metal layer I 210 again, at the upper surface of interconnection metal layer II 220 again, pad II 222, pad IV 224 are set.Wherein, the cross section of pad I 211 is comparatively large, for the source electrode 121 of fixing silicon base chip 100; The cross section of pad II 222 is less, for the grid 122 of fixing silicon base chip 100; Pad III 213, pad IV 224 all can have multiple, are respectively used to fixing metal core soldered ball 600, and therefore the required number of metal-cored soldered ball 600 is at least two, are communicated with interconnection metal layer I 210 and interconnection metal layer II 220 more respectively again.When reality uses, according to actual needs to interconnection metal layer I 210 and again the interconnection metal layer II 220 rational pad III 213 of magnitude setting, pad IV 224 respectively again, and mate the metal-cored soldered ball 600 of corresponding number.
The inner core of metal-cored soldered ball 600 is spherical metal-cored 610, the material of metal-cored 610 is can conducting metal, is generally metallic copper, or outside copper core, wraps up in the suitable metal nickel dam of a layer thickness or ni/au layers, to prevent the migration of copper ion, and possess certain hardness and good anti-wear performance.The outermost layer parcel weld layer 620 of metal-cored 610, the material of weld layer 620 is the alloy etc. of tin, tin.Size according to metal-cored 610 can make the metal-cored soldered ball 600 that diameter dimension differs, is applicable to various service condition.Metal-cored 610 intensity enhancing metal-cored soldered ball 600, and make this metal-cored soldered ball 600 have good conduction, the performance of heat conduction.Metal-cored soldered ball 600 is arranged at the side of silicon base chip 100.Usually, according to nearby principle, metal-cored soldered ball 600 is arranged at the side of the grid 122 of silicon base chip 100, as shown in Figure 1, or the relative position of arrange according to actual needs metal-cored soldered ball 600 and silicon base chip 100.
Particularly, silicon base chip 100 is connected with silicon substrate carrier 202 upside-down mounting.As depicted in figs. 1 and 2, the source electrode 121 of silicon base chip 100 is fixedly connected with pad I 211 by solder layer 151, and grid 122 is fixedly connected with pad II 222 by solder layer 152.
Metal-cored soldered ball 600 is fixedly connected with pad III 213, pad IV 224 respectively by its weld layer 620.By adjusting the size of metal-cored soldered ball 600 and/or solder layer 151, solder layer 152, weld layer 620 make the rising of back-side drain 123 of silicon base chip 100 and rising at grade of metal-cored soldered ball 600 with the contact thickness of interconnection metal layer again, and with the back-side drain 123 of silicon base chip 100 rise with metal-cored soldered ball 600 to rise in same level be good.
For the silicon base chip 100 of the complexity of the more how metal-cored soldered ball 600 of needs, metal-cored soldered ball 600 can be arranged at the both sides of silicon base chip 100, and as shown in Figure 3, or metal-cored soldered ball 600 can be arranged at four sides of silicon base chip 100.
Filler 700 fills metal-cored soldered ball 600, space between silicon base chip 100 and silicon substrate carrier 202, it is highly no more than the drain electrode 123 of silicon base chip 100, the material of filler 700 is the most conventional with epoxy resin, phenolic resins, organic siliconresin and unsaturated polyester resin at present, and add the inserts such as silica, aluminium oxide wherein, to improve the performance such as intensity, electrical property, viscosity of filler, and promote the thermomechanical reliability of encapsulating structure.After filler 700 has solidified, in solid shape, the protective effects such as waterproof, protection against the tide, shockproof, dust-proof, heat radiation, insulation can be played.
The encapsulating structure of the silica-based module of low cost of the present utility model, adopt silicon base chip 100 upside-down mounting in silicon substrate carrier 202, by multiple metal-cored soldered ball 600, the source electrode 121 of silicon base chip 100 and the signal of telecommunication of grid 122 are caused the front of whole encapsulating structure again, with the drain electrode 123 at silicon base chip 100 back side at same plane, realize mounting to facilitate the encapsulating structure of the silica-based module of low cost and circuit board and be connected.
Embodiment two, see Fig. 1 and Fig. 4
Fig. 1 is the Facad structure schematic diagram of the encapsulating structure of the silica-based module of a kind of low cost of the utility model, and Fig. 4 is the A-A generalized section of Fig. 1.As can be seen from Fig. 1 and Fig. 4, the encapsulating structure of the silica-based module of low cost of the present utility model comprises silicon base chip 100, metal-cored soldered ball 600 and silicon substrate carrier 202, silicon base chip 100, metal-cored soldered ball 600 is arranged on the top of silicon substrate carrier 202, silicon substrate carrier 202 bearing metal core soldered ball 600 and silicon base chip 100, therefore the cross sectional dimensions of silicon substrate carrier 202 is greater than the cross sectional dimensions of silicon base chip 100, but by the rational deployment of silicon base chip 100 with metal-cored soldered ball 600, the cross sectional dimensions of silicon substrate carrier 202 needs again little as much as possible, to reduce the size of whole encapsulating structure.Silicon substrate carrier 202 has certain thickness, and except carrying effect, it also has heat conduction, thermolysis, and controls warping effect, to improve the performance of the encapsulating structure of the silica-based module of whole low cost, and contributes to the useful life extending encapsulating structure.
The silicon base chip 100 of the encapsulating structure of the silica-based module of low cost of the present utility model is for power mosfet chip, the front of the chip body 102 of its silica-base material is provided with source electrode 121 and grid 122, wherein grid 122 is less, it is generally positioned at one jiao of chip body 102, and the back side of its chip body 102 arranges metal level as drain electrode 123.The material of this metal level is the titanium/nickel/gold, titanium/nickel/silver etc. of three-decker.The passivation layer 130 of the patterning of the front capping oxidation silicon of silicon base chip 100, silicon nitride or resinae dielectric material, this passivation layer 130 offers the passivation layer opening 131 of array-like to expose the surface of source electrode 121 and grid 122, as shown in Figure 4, and in passivation layer opening 131, be arranged on the titanium or titanium tungsten metal level 160 that source electrode 121 and grid 122 place formed by physical gas-phase deposite method, its thickness is generally less than 0.3 micron, as barrier layer to protect source electrode 121 and grid 122, do not affect overall electric heating property simultaneously; Form metal projection cube structure on titanium or titanium tungsten metal level 160, it comprises the solder bump 172 at metal column 171 and top thereof, and the material of metal column 171 includes but not limited to metallic copper.
At the upper surface of silicon substrate carrier 202, insulating barrier 230 is set, optionally arrange on insulating barrier 230 again and adopt the wafer level metal discontinuous interconnection metal layer again that is shaped of Wiring technique again, so that interconnection metal layer I 210, again interconnection metal layer II 220 are illustrated again in Fig. 4, both are in the source electrode 121 of correspondence and the separated insulation of grid 122, and respectively pad I 211, pad III 213 are set at the upper surface of interconnection metal layer I 210 again, at the upper surface of interconnection metal layer II 220 again, pad II 222, pad IV 224 are set.Wherein, the cross section of pad I 211 is comparatively large, for the source electrode 121 of fixing silicon base chip 100; The cross section of pad II 222 is less, for the grid 122 of fixing silicon base chip 100; Pad III 213, pad IV 224 all can have multiple, are respectively used to fixing metal core soldered ball 600, and therefore the required number of metal-cored soldered ball 600 is at least two, are communicated with interconnection metal layer I 210 and interconnection metal layer II 220 more respectively again.When reality uses, according to actual needs to interconnection metal layer I 210 and again the interconnection metal layer II 220 rational pad III 213 of magnitude setting, pad IV 224 respectively again, and mate the metal-cored soldered ball 600 of corresponding number.
The inner core of metal-cored soldered ball 600 is spherical metal-cored 610, the material of metal-cored 610 is can conducting metal, is generally metallic copper, or outside copper core, wraps up in the suitable metal nickel dam of a layer thickness or ni/au layers, to prevent the migration of copper ion, and possess certain hardness and good anti-wear performance.The outermost layer parcel weld layer 620 of metal-cored 610, the material of weld layer 620 is the alloy etc. of tin, tin.Size according to metal-cored 610 can make the metal-cored soldered ball 600 that diameter dimension differs, is applicable to various service condition.Metal-cored 610 intensity enhancing metal-cored soldered ball 600, and make this metal-cored soldered ball 600 have good conduction, the performance of heat conduction.Metal-cored soldered ball 600 is arranged at the side of silicon base chip 100.Usually, according to nearby principle, metal-cored soldered ball 600 is arranged at the side of the grid 122 of silicon base chip 100, as shown in Figure 1, or the relative position of arrange according to actual needs metal-cored soldered ball 600 and silicon base chip 100.
Particularly, silicon base chip 100 is connected with silicon substrate carrier 202 upside-down mounting.As shown in Figure 1 and Figure 4, when the upside-down mounting of MOSFET chip monomer is to interconnection metal layer again, through reflux technique, the metal bump structure of the source electrode 121 of silicon base chip 100 is fixedly connected with pad I 211 by solder bump 172, the metal bump structure of grid 122 is connected by solder bump 172 and pad II 222.
Metal-cored soldered ball 600 is fixedly connected with pad III 213, pad IV 224 respectively by its weld layer 620.By adjusting the size of metal-cored soldered ball 600 and/or solder layer 151, solder layer 152, weld layer 620 make the rising of back-side drain 123 of silicon base chip 100 and rising at grade of metal-cored soldered ball 600 with the contact thickness of interconnection metal layer again, and with the back-side drain 123 of silicon base chip 100 rise with metal-cored soldered ball 600 to rise in same level be good.
For the silicon base chip 100 of the complexity of the more how metal-cored soldered ball 600 of needs, metal-cored soldered ball 600 can be arranged at the both sides of silicon base chip 100, and as shown in Figure 3, or metal-cored soldered ball 600 can be arranged at four sides of silicon base chip 100.
Filler 700 fills metal-cored soldered ball 600, space between silicon base chip 100 and silicon substrate carrier 202, it is highly no more than the drain electrode 123 of silicon base chip 100, the material of filler 700 is the most conventional with epoxy resin, phenolic resins, organic siliconresin and unsaturated polyester resin at present, and add the inserts such as silica, aluminium oxide wherein, to improve the performance such as intensity, electrical property, viscosity of filler, and promote the thermomechanical reliability of encapsulating structure.After filler 700 has solidified, in solid shape, the protective effects such as waterproof, protection against the tide, shockproof, dust-proof, heat radiation, insulation can be played.
The encapsulating structure of the silica-based module of low cost of the present utility model, adopt silicon base chip 100 upside-down mounting in silicon substrate carrier 202, by multiple metal-cored soldered ball 600, the source electrode 121 of silicon base chip 100 and the signal of telecommunication of grid 122 are caused the front of whole encapsulating structure again, with the drain electrode 123 at silicon base chip 100 back side at same plane, realize mounting to facilitate the encapsulating structure of the silica-based module of low cost and circuit board and be connected.
The encapsulating structure of the silica-based module of a kind of low cost of the utility model is not limited to above preferred embodiment, the silicon base chip 100 of the encapsulating structure of silica-based module of the present utility model can also be IC chip, Low-k chip etc., interconnection metal layer can be individual layer again, as shown in Figure 2, interconnection metal layer also can be multilayer again, to adapt to the extraction of the signal of telecommunication of the source electrode of small or microminiature MOSFET, grid or other functions.
Therefore; any those skilled in the art are not departing from spirit and scope of the present utility model; the any amendment done above embodiment according to technical spirit of the present utility model, equivalent variations and modification, all fall in protection range that the utility model claim defines.
Claims (10)
1. an encapsulating structure for the silica-based module of low cost, it comprises silicon substrate carrier (202), and the upper surface of described silicon substrate carrier (202) arranges insulating barrier (230),
It is characterized in that: also comprise silicon base chip (100) and metal-cored soldered ball (600), the front of described silicon base chip (100) is provided with several electrodes, the back side is provided with metal level, the passivation layer (130) of the front coverage diagram patterning of described silicon base chip (100) also offers the passivation layer opening (131) of the upper surface exposing electrode, in described passivation layer opening (131), arrange metal bump structure, the top of described metal bump structure arranges solder layer;
Two or more described metal-cored soldered balls (600) are arranged at the side of silicon base chip (100), and the inner core of described metal-cored soldered ball (600) is metal-cored (610), its outermost layer parcel weld layer (620);
The cross sectional dimensions of described silicon substrate carrier (202) is greater than the cross sectional dimensions of silicon base chip (100), the silicon base chip (100) that described silicon substrate carrier (202) bearing metal core soldered ball (600) is connected with upside-down mounting with it, the insulating barrier (230) of described silicon substrate carrier (202) optionally arranges interconnection metal layer again, described metal-cored soldered ball (600) is connected by its weld layer (620) and interconnection metal layer again, the electrode in the front of silicon base chip (100) is connected by the solder layer of metal bump structure and interconnection metal layer again, and described interconnection metal layer is again in the separated insulation of adjacent one another are two electrodes, rising of metal layer on back and the rising at same plane of metal-cored soldered ball (600) of described silicon base chip (100).
2. the encapsulating structure of the silica-based module of a kind of low cost according to claim 1, is characterized in that: described metal bump structure comprises ni/au layers (140), and described ni/au layers (140) is arranged in passivation layer opening (131).
3. the encapsulating structure of the silica-based module of a kind of low cost according to claim 1, it is characterized in that: described metal bump structure comprises the solder bump (172) at titanium or titanium tungsten metal level (160), metal column (171) and top thereof, described titanium or titanium tungsten metal level (160) are arranged in passivation layer opening (131), and described metal column (171) is arranged at the surface of titanium or titanium tungsten metal level (160).
4. the encapsulating structure of the silica-based module of a kind of low cost according to Claims 2 or 3, is characterized in that: rising of metal layer on back and the rising in same level of metal-cored soldered ball (600) of described silicon base chip (100).
5. the encapsulating structure of the silica-based module of a kind of low cost according to Claims 2 or 3, is characterized in that: arrange metal nickel dam or ni/au layers between described metal-cored (610) and weld layer (620).
6. the encapsulating structure of the silica-based module of a kind of low cost according to claim 5, is characterized in that: described metal-cored (610) are in spherical.
7. the encapsulating structure of the silica-based module of a kind of low cost according to Claims 2 or 3, it is characterized in that: the electrode of described silicon base chip (100) comprises source electrode (121) and grid (122), the metal level at the back side of this silicon base chip (100) is drain electrode (123).
8. the encapsulating structure of the silica-based module of a kind of low cost according to claim 7, is characterized in that: the metal level at the back side of described silicon base chip (100) is the three-layer metal structure of titanium/nickel/gold or titanium/nickel/silver.
9. the encapsulating structure of the silica-based module of a kind of low cost according to Claims 2 or 3, is characterized in that: described passivation layer opening (131) distributes in array-like.
10. the encapsulating structure of the silica-based module of a kind of low cost according to Claims 2 or 3, it is characterized in that: also comprise filler (700), described filler (700) fills metal-cored soldered ball (600), silicon base chip (100), silicon substrate carrier (202) space each other.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105118817A (en) * | 2015-09-10 | 2015-12-02 | 江阴长电先进封装有限公司 | Encapsulation structure of low-cost silicon-based module and encapsulation method of encapsulation structure |
| CN108364920A (en) * | 2018-03-01 | 2018-08-03 | 颀中科技（苏州）有限公司 | Flip-chip assembly, flip chip packaging structure and preparation method |
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2015
- 2015-09-10 CN CN201520695949.8U patent/CN204927275U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105118817A (en) * | 2015-09-10 | 2015-12-02 | 江阴长电先进封装有限公司 | Encapsulation structure of low-cost silicon-based module and encapsulation method of encapsulation structure |
| CN105118817B (en) * | 2015-09-10 | 2017-09-19 | 江阴长电先进封装有限公司 | A kind of encapsulating structure and its method for packing of inexpensive silicon substrate module |
| CN108364920A (en) * | 2018-03-01 | 2018-08-03 | 颀中科技（苏州）有限公司 | Flip-chip assembly, flip chip packaging structure and preparation method |
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