CN204926071U - Double nip NFC label - Google Patents

Double nip NFC label Download PDF

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Publication number
CN204926071U
CN204926071U CN201520623896.9U CN201520623896U CN204926071U CN 204926071 U CN204926071 U CN 204926071U CN 201520623896 U CN201520623896 U CN 201520623896U CN 204926071 U CN204926071 U CN 204926071U
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China
Prior art keywords
data
interface
sram
buffer storage
storage register
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Withdrawn - After Issue
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CN201520623896.9U
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Chinese (zh)
Inventor
赵旺
许登科
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Zhuhai Amicro Semiconductor Co Ltd
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Zhuhai Amicro Semiconductor Co Ltd
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Abstract

The utility model provides a double nip NFC label, the RF interface that includes, SDA pin, SCL pin, VCC pin, SRAM, arbitration controller, RF data buffering register and I2C data buffering register, SRAM, the arbitration controller, RF data buffering register and I2C data buffering register are through inside bus connection, SDA pin and SCL pin are defined as the I2C interface, and the SDA pin is used for transmit data and address, and the SCL pin is used for conveying clock signal, and clock signal is used for confirming the transmission speed of I2C interface. The utility model discloses an arbitration controller is controlled SRAM's visit, can be with RF interface communication equipment transfer to the communication equipment with I2C interface of data from the double nip label. Especially, RF interface and I2C interface respectively provide two data buffering registers, have prevented loss of data, and two interfaces can the simultaneous working when transmitting data, has guaranteed higher data transmission efficiency.

Description

Double nip NFC label
Technical field
The utility model relates to NFC (NearFieldCommunication, near-field communication) technical field, particularly double nip NFC label.
Background technology
NFC (NearFieldCommunication, near-field communication) be developed by RFID (radio-frequency (RF) identification) and the Technology Integration that interconnects, combining induction card reader, induction type card and point-to-point function on one chip, can carry out identifying and exchanges data with compatible equipment in short distance.Work in 13.56MHz frequency range, operating distance 10 cm, it makes communication that can be directly perceived, quick, safe between the equipment of two compatible NFC.
According to ISO18092 standard, NFC can be operated in aggressive mode and Passive Mode, has 106Kbps, 212Kbps, 424Kbps, 848Kbps tetra-kinds of message transmission rates at present.NFC has three kinds of mode of operations: snap gauge simulation models, read-write mode and point-to-point communication pattern.Based on above three kinds of mode of operations, NFC is widely used in the fields such as gate inhibition, public transport, mobile payment, smart poster, data transmission.
In order to promote the development of NFC and popularize, Philip, Sony and Nokia create a non-profit employer's organization (NFC forum), promote enforcement and the standardization of NFC technique, guarantee cooperative cooperating between equipment and service.NFC forum provides the operative technique specification of many definition NFC device.NFC forum has defined the Label specifications of Four types, is called as NFC forum label.
Application publication number is that the patent of invention of CN103678189A discloses a kind of SRAM handshake mechanism, but, this arbitration mechanism makes RF interface and I2C interface introduce unnecessary wait when accessing SRAM, wherein during communications interface transmission data, another communication interface will quit work, make two communication interfaces can not transmit data simultaneously, thus affect communication efficiency.With bus arbitration mechanism, the data transmission that the utility model adopts can ensure that internal bus is when accessing SRAM, RF interface and I2C interface can also carry out transmission or the reception of data simultaneously.Like this, improve transfer efficiency, with the obvious advantage when carrying out the transmission of large exchanges data.
Utility model content
The purpose of this utility model is to provide a kind of NFC label with RF interface and I2C interface, makes to carry out data transmission more fast and effectively between communication facilities.The purpose of this utility model is realized by following technical scheme:
A kind of double nip NFC label, is characterized in that, the RF interface comprised, SDA pin, SCL pin, VCC pin, SRAM, arbitration controller, RF data buffer storage register and I2C data buffer storage register; SRAM, arbitration controller, RF data buffer storage register and I2C data buffer storage register are connected by internal bus; Described SDA pin and SCL pin are defined as I2C interface, and SDA pin is for transmitting data and address, and SCL pin is used for transmission clock signal, and clock signal can determine the transmission speed of I2C interface; VCC pin is used for for double nip is tag-powered.
As concrete technical scheme, described RF data buffer storage register comprises RF data buffer storage register 1 and RF data buffer storage register 2; Described I2C data buffer storage register comprises I2C data buffer storage register 1 and I2C data buffer storage register 2.
As further technical scheme, described double nip NFC label also comprises counter register, is connected to described internal bus, for indicating the full state of SRAM sky; As data write SRAM, counter register adds 1, and as data reading SRAM, counter register subtracts 1; Counter register can be read by RF interface and I2C interface; According to the count value read, judging to remain how many spaces in SRAM when being write by one of them interface, judging that when being read by one of them interface remaining how many data in SRAM does not read.
The double nip NFC label that the utility model provides, is controlled by the access of arbitration controller to SRAM, data can be transferred to the communication facilities with I2C interface from the RF interface communicating device of double nip label.Particularly, RF interface and I2C interface respectively provide two data cache registers, prevent loss of data, and when transmitting data, two interfaces can work simultaneously, ensure that higher data transmission efficiency.
Accompanying drawing explanation
The formation block diagram of the double nip NFC label that Fig. 1 provides for the utility model embodiment.
The state transition graph of double nip NFC label when reading and writing data that Fig. 2 provides for the utility model embodiment.
Fig. 3 carries out the process flow diagram of data transmission for double nip NFC label that the utility model embodiment provides.
Embodiment
Below in conjunction with accompanying drawing, the utility model is elaborated.
As shown in Figure 1, the double nip NFC label that the present embodiment provides, comprising: RF interface, SDA pin, SCL pin, VCC pin, SRAM, arbitration controller, RF data buffer storage register, I2C data buffer storage register and counter register (not showing in Fig. 1).SRAM, arbitration controller, RF data buffer storage register, I2C data buffer storage register and counter register are connected by internal bus.SDA pin and SCL pin are defined as I2C interface, and SDA pin is for transmitting data and address, and SCL pin is used for transmission clock signal, and clock signal can determine the transmission speed of I2C interface; VCC pin is used for for double nip is tag-powered; RF data buffer storage register comprises RF data buffer storage register 1 and RF data buffer storage register 2; I2C data buffer storage register comprises I2C data buffer storage register 1 and I2C data buffer storage register 2.
Particularly, the SRAM size in the present embodiment is 64 bytes (64 address spaces, each address space 1 bytes).RF data buffer storage register 1 is 16 bytes with RF data buffer storage register 2, I2C data buffer storage register 1 with the size of I2C data buffer storage register 2, and during work, two data cache register one after the others of each interface use.In 106Kbps, 212Kbps, 424Kbps, 848Kbps tetra-kinds that the transfer rate alternatives of RF interface specifies any one; In 100Kbps, 400Kbps, 3.4Mbps tri-kinds that the transfer rate alternatives of I2C interface specifies any one.Wherein, the clock frequency of internal bus is 1.69MHz, SRAM interface bit wide 8bit, so the transfer rate of SRAM is 1.69*8Mbps=13.52Mbps; The transfer rate of such internal bus is much larger than the transfer rate of external interface, and meanwhile, RF interface and I2C interface respectively provide two data cache registers, ensure that data can not be lost in transmitting procedure.
Arbitration controller is for preventing RF interface and I2C interface to the access conflict of SRAM, ensure that data transmission is effectively carried out fast, arbitration controller one of being configured to lock in RF interface and two, I2C interface according to the first indicator signal, the second indicator signal, the 3rd indicator signal, the 4th indicator signal and counter register takies bus (described below).Counter register is for indicating the full state of SRAM sky; As data write SRAM, counter register adds 1, and as data reading SRAM, counter register subtracts 1; Counter register can be read by RF interface and I2C interface; According to the count value read, judging to remain how many spaces in SRAM when being write by one of them interface, judging that when being read by one of them interface remaining how many data in SRAM does not read.
As shown in Figure 1, RF interface meets the specification of NFC forum, comprises the hardware for being transmitted and receive data by radiofrequency signal.NFC device beyond double nip NFC label can use RF interface to the data read in SRAM or write data in SRAM.Main frame beyond double nip NFC label can use I2C interface to the data read in SRAM or write data in SRAM.Wherein, main frame can be any equipment with I2C bus.
As shown in Figure 1, the NFC label of this present embodiment can be used as data transmission set, and data can flow to another interface from an interface.When RF interface data, send data by I2C interface; When I2C interface data, send data by RF interface.
As shown in Figure 1, when RF interface sends data, receive after sending instruction, mark the first indicator signal (rf_rd_req) carries out read request to SRAM bus; Arbitration controller is after response RF interface read request, and data from SRAM write to RF data buffer storage register 1, data write rear release bus; Data in data buffer storage register 1 are sent by RF interface.
As shown in Figure 1, when RF interface data, first the data received are stored in RF data buffer storage register 1, and then mark the second indicator signal (rf_wr_req) carries out write request to SRAM bus; Arbitration controller is after response RF interface write request, and the data in RF data buffer storage register 1 are write SRAM, and data write rear release bus; Meanwhile, RF interface can also continue to receive new data, and the data received are put into RF data buffer storage register 2, and then mark the second indicator signal (rf_wr_req) carries out write request to SRAM bus; Arbitration controller is after response RF interface write request, and the data in RF data buffer storage register 2 are write SRAM, and data write rear release bus; Like this, RF data buffer storage register 1 and the one after the other of RF data buffer storage register 2 receive the data of RF interface, then write in SRAM and go.
As shown in Figure 1, when I2C interface sends data, receive after sending instruction, mark the three indicator signal (i2c_rd_req) carries out read request to SRAM bus; Arbitration controller is after response I2C interface read request, and data from SRAM write to I2C data buffer storage register 1, data write rear release bus; Data in data buffer storage register 1 are sent by I2C interface.
As shown in Figure 1, when I2C interface data, first the data received are stored in I2C data buffer storage register 1, and then mark the four indicator signal (i2c_wr_req) carries out write request to SRAM bus; Arbitration controller is after response I2C interface write request, and the data in I2C data buffer storage register 1 are write SRAM, and data write rear release bus; Meanwhile, I2C interface can also continue to receive new data, and the data received are put into I2C data buffer storage register 2, and then mark the four indicator signal (i2c_wr_req) carries out write request to SRAM bus; Arbitration controller is after response I2C interface write request, and the data in I2C data buffer storage register 2 are write SRAM, and data write rear release bus; Like this, I2C data buffer storage register 1 and the one after the other of I2C data buffer storage register 2 receive the data of I2C interface, then write in SRAM and go.
The state transition graph of double nip NFC label when reading and writing data that Fig. 2 provides for the present embodiment, concrete switch condition comprises:
S01, when IDLE state, the first indicator signal (rf_rd_req) carries out read request to SRAM bus, and during bus free, arbitration controller response request, enters RF_RD_SRAM state;
S02, when RF_RD_SRAM state, in SRAM after data write RF cache register, enters IDLE state;
S03, when IDLE state, the second indicator signal (rf_wr_req) carries out write request to SRAM bus, bus free, there is no read request and SRAM is not fully written time, arbitration controller response request, enters RF_WR_SRAM state;
S04, when RF_WR_SRAM state, in RF cache register after data write SRAM, enters IDLE state;
S05, when IDLE state, the 3rd indicator signal (i2c_rd_req) carries out read request to SRAM bus, and during bus free, arbitration controller response request, enters I2C_RD_SRAM state;
S06, when I2C_RD_SRAM state, in SRAM after data write I2C cache register, enters IDLE state;
S07, when IDLE state, the 4th indicator signal (i2c_wr_req) carries out write request to SRAM bus, bus free, there is no read request and SRAM is not fully written time, arbitration controller response request, enters I2C_WR_SRAM state;
S08, when I2C_WR_SRAM state, in I2C cache register after data write SRAM, enters IDLE state.
As shown in Figure 3, the data transmission method of the double nip NFC label that the present embodiment provides is from step S001 and proceed to step S014 and terminate, and concrete steps comprise:
S001, starts, and label prepares to carry out data transmission;
S002, RF interface or I2C interface, have read request or write request, and request takies bus access SRAM;
S003, judges whether bus is in idle condition, if in idle condition, to step S004, otherwise gets back to step S002;
S004, judges whether the request of reading SRAM, if for reading SRAM request, to step S006, otherwise to step S005;
S005, RF interface or I2C interface receive data, have write request to SRAM;
S006, judgement is that RF interface has read request or I2C interface has read request, if RF interface has read request then to arrive step S007, if I2C interface has read request then to arrive step S008;
In S007, SRAM, data write RF data buffer storage register, and data run through rear release bus;
In S008, SRAM, data write I2C data buffer storage register, and data run through rear release bus;
S009, (as data write SRAM, counter register adds 1, and as data reading SRAM, counter register subtracts 1, and by the value of counter register and the space size of SRAM, just can judge whether SRAM has write expires to judge whether SRAM is fully written; When count register value equals 64, show that SRAM has write full, when count register value is less than 64, show that SRAM is not fully written), if SRAM is fully written, then arrive state S013, otherwise to state S010;
S010, judgement is that RF interface has write request or I2C interface has write request, if RF interface has write request then to arrive step S011, if I2C interface has write request then to arrive step S012;
In S011, RF data buffer storage register, data write SRAM, and data write rear release bus;
In S012, I2C data buffer storage register, data write SRAM, and data write rear release bus;
S013, completes the once access of SRAM, release bus;
S014, terminates an arbitrated procedure.
As mentioned above, according to concrete exemplary enforcement of the present utility model, provide double nip NFC label and utilize double nip label to transmit the method for data between devices.Particularly, control the access to SRAM by arbitration, data can be transferred to the I2C interfacing equipment of double nip label from the RF interfacing equipment of double nip label.
Above embodiment is only the utility model preferred embodiment, can not limit interest field of the present utility model with this, and every equivalent variations done according to the utility model claim, still belongs to the scope that utility model contains.

Claims (3)

1. a double nip NFC label, is characterized in that, the RF interface comprised, SDA pin, SCL pin, VCC pin, SRAM, arbitration controller, RF data buffer storage register and I2C data buffer storage register; SRAM, arbitration controller, RF data buffer storage register and I2C data buffer storage register are connected by internal bus; Described SDA pin and SCL pin are defined as I2C interface, and SDA pin is for transmitting data and address, and SCL pin is used for transmission clock signal, and clock signal can determine the transmission speed of I2C interface; VCC pin is used for for double nip is tag-powered.
2. double nip NFC label according to claim 1, is characterized in that, described RF data buffer storage register comprises RF data buffer storage register 1 and RF data buffer storage register 2; Described I2C data buffer storage register comprises I2C data buffer storage register 1 and I2C data buffer storage register 2.
3. double nip NFC label according to claim 1 and 2, is characterized in that, described double nip NFC label also comprises counter register, is connected to described internal bus, for indicating the full state of SRAM sky; As data write SRAM, counter register adds 1, and as data reading SRAM, counter register subtracts 1; Counter register can be read by RF interface and I2C interface; According to the count value read, judging to remain how many spaces in SRAM when being write by one of them interface, judging that when being read by one of them interface remaining how many data in SRAM does not read.
CN201520623896.9U 2015-08-18 2015-08-18 Double nip NFC label Withdrawn - After Issue CN204926071U (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105159852A (en) * 2015-08-18 2015-12-16 珠海市一微半导体有限公司 Dual-interface NFC label circuit and data transmission method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105159852A (en) * 2015-08-18 2015-12-16 珠海市一微半导体有限公司 Dual-interface NFC label circuit and data transmission method thereof

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Granted publication date: 20151230

Effective date of abandoning: 20180515