CN204886199U - Adapt to power electronic transformer uneven and non - linear load - Google Patents

Abstract

The utility model provides an adapt to power electronic transformer uneven and non - linear load, an adapt to power electronic transformer uneven and non - linear load, power electronic transformer topological structure include input stage, middle isolation level and output stage, the output stage is the dc -to -ac converter of three -phase four -leg structure, preceding three -phase bridge arm adopts based on the output voltage outer loop of PIR controller with based on endocyclic pair of closed -loop control tactics of inductive current of PI controller, four -bridge -arm adopts the well line current independent control ware based on PR. The utility model discloses the control outer loop adopts proportional integral resonance voltage controller, can effectively solve dq rotating coordinate system under the PI controller to the limited problem of of ac gain, reduce steady state error, the control inner ring adopts pi controller, has improved the dynamic behavior of system effectively, four -bridge -arm independently adopts improvement proportion resonance controller, can carry out the effective control to base frequency unbalance current.

Description

Power electronic transformer adaptive to unbalanced and nonlinear loads

Technical Field

The utility model relates to a power equipment technical field especially relates to power electronic transformer.

Background

The Power Electronic Transformer (PET) is also called a solid-state transformer, is an intelligent power electronic device which realizes multiple functions of voltage transformation, electrical isolation, reactive compensation, renewable energy grid-connected access and the like, has the functions of an alternating-current/direct-current hybrid interface and relay protection, and has a very wide application prospect. The low-voltage distribution network system is generally of a three-phase four-wire system structure, loads of the low-voltage distribution network system are mostly unbalanced nonlinear mixed loads, and the loads can generate fundamental positive-sequence current and can inject negative-sequence, zero-sequence and harmonic current into the system. The power electronic transformer can form a supporting effect on the voltage of the distribution network through proper control, inhibit the influence of negative sequence, zero sequence and harmonic current on the distribution network, and simultaneously can save a harmonic reactive power compensation device in the traditional distribution network. For the control of the unbalanced nonlinear load, the existing mainstream method is to convert the direct current into the direct current under the dq positive sequence rotation coordinate system for control. After the positive sequence coordinate transformation, the positive sequence harmonic component is represented as descending alternating current, and the negative sequence fundamental component is represented as ascending alternating current. The traditional proportional-integral controller has limited gain to alternating current, can not well realize unsteady state error control, and even can reduce the output voltage performance of the power electronic transformer of the power distribution network. Therefore, the adoption of a proper control strategy is very important for the power distribution network power electronic transformer, and the reasonable design of the parameters of the adopted controller becomes an urgent problem to be solved.

The prior technical scheme I is as follows: aiming at the negative sequence and harmonic components generated by the unbalanced nonlinear mixed load, the negative sequence control loop of the unbalanced load and the harmonic compensation control loop of the nonlinear load are superposed on the basis of a fundamental voltage current loop. After the load output three-phase voltage passes through the low-pass filter under the dq rotating coordinate system with different angular frequencies, fundamental positive sequence, negative sequence and harmonic components can be completely converted into direct current, and static-error-free control of the PI controller can be achieved. In addition, the controller parameters adopt a method of firstly calculating inner loop PI parameters and then outer loop PI parameters. However, this solution has the following disadvantages: (1) the use of more rotation coordinate transformation and low-pass filters increases the complexity of control and generates time delay, which affects the control precision. (2) The inner ring and the outer ring of the controller are mutually related, and the performance of the system cannot be ensured by singly designing the parameters of the inner ring or the outer ring. The prior technical scheme II is as follows: and (3) converting positive sequence components, negative sequence components and zero sequence components generated by unbalanced load into an alpha beta 0 coordinate system and still obtaining alternating current. The characteristic that the proportional resonant controller has large gain to the alternating current component can be utilized, and the proportional resonant controllers are respectively adopted on an alpha axis, a beta axis and a 0 axis to realize the non-differential control of the alternating current quantity, but the technical scheme has the following defects: (1) harmonic components are still same-frequency alternating current under an alpha beta 0 coordinate system, and the influence of nonlinear load is not considered. (2) The alpha beta 0 axis only adopts a proportional resonant voltage loop controller, and the dynamic response of the system is influenced by the lack of a current closed loop.

SUMMERY OF THE UTILITY MODEL

An object of the utility model is to overcome above-mentioned current existing problem, provide a power electronic transformer output level high power quality control tactics and parameter design method thereof, realized the good control performance to distribution network unbalance and nonlinear load.

The utility model provides a technical scheme as follows:

a power electronic transformer adaptive to unbalanced and nonlinear loads is characterized in that the topological structure of the power electronic transformer comprises an input stage, a middle isolation stage and an output stage, the output stage is an inverter with a three-phase four-leg structure, the inverter comprises a four-leg inverter circuit and an LC filter circuit, the four-leg inverter circuit is composed of a direct-current electrolytic capacitor and eight IGBTs with anti-parallel diodes, the LC filter circuit is composed of a three-phase LC filter and a fourth-leg neutral line inductor, and a load neutral point is connected with the midpoint of a fourth leg through the neutral line inductor; the method is characterized in that: the control circuit of the front three-phase bridge arm is provided with a voltage outer ring PIR controller and a current inner ring PI controller, and the control circuit of the fourth bridge arm is provided with a neutral current PR controller.

The control circuit of the output stage includes:

a first sampling circuit for obtaining the low-voltage DC side bus voltage u_dc(ii) a And the low-voltage DC side bus voltage u_dcSending the data to a DSP core processor;

a second sampling circuit for obtaining three-phase output voltage u of the inverter_oa、u_ob、u_ocAnd outputs the three-phase output voltage u_oa、u_ob、u_ocSending the data to a DSP core processor;

a third sampling circuit for obtaining three-phase inductive current i of the inverter_La、i_Lb、i_LcThree-phase load current i_oa、i_ob、i_ocAnd neutral current i_nAnd the three-phase inductive current i_La、i_Lb、i_LcThree-phase load current i_oa、i_ob、i_ocAnd neutral current i_nSending the data to a DSP core processor;

the DSP core processor is used for carrying out control algorithm calculation on the acquired input signals, outputting PWM (pulse-width modulation) driving pulses to the IGBT driving unit through a comparison unit in the event manager, and simultaneously carrying out program protection on electrical sampling values;

the IGBT driving circuit is used for receiving the PWM pulse sent by the DSP core processor and amplifying the signal to drive the IGBT;

and the hardware protection circuit is used for performing hardware circuit protection on related voltage and current values, simultaneously performing fault signal summarization by combining software protection and IGBT protection, and controlling the secondary protection of the main circuit by triggering the optocoupler.

Each input stage adopts a cascade H-bridge topology, each cascade H-bridge is composed of n single-phase PWM rectifier modules, and a neutral point adopts a star connection mode.

The intermediate isolation level is of a double-driving-bridge structure.

Compared with the prior art, the utility model discloses beneficial effect that technical scheme brought:

(1) the control outer ring adopts a proportional integral resonance voltage controller, so that the problem that the AC gain of a PI controller under a dq rotation coordinate system is limited can be effectively solved, and the steady-state error is reduced; the control inner ring adopts a proportional-integral controller, so that the dynamic performance of the system is effectively improved;

(2) the fourth bridge arm independently adopts an improved proportional resonant controller, and can effectively control the fundamental frequency unbalanced current;

drawings

Fig. 1 is a structural diagram of an inverter of a preferred embodiment of the present invention;

fig. 2 is a control flow chart of an inverter of a preferred embodiment of the present invention;

fig. 3 is a control strategy for an inverter of a preferred embodiment of the present invention;

fig. 4 is a d-axis control block diagram of the inverter control system of the preferred embodiment of the present invention;

FIG. 5 is a logarithmic frequency characteristic of a preferred embodiment of the invention;

FIG. 6 is a time domain step response curve of a preferred embodiment of the present invention;

FIG. 7 is K of the preferred embodiment of the present invention_RhPole distribution trend at increase;

FIG. 8 is a system Bode diagram of a preferred embodiment of the present invention.

Detailed Description

The invention will be further described with reference to the following examples:

the utility model discloses the technical scheme who takes as follows: the utility model discloses a distribution network three-phase power electronic transformer main circuit structure includes input stage, middle isolation stage and output stage three part, the input stage adopts cascaded H bridge multilevel structure for each phase, and the connection mode is star connection; the intermediate isolation stage adopts a double-driving-bridge structure to realize bidirectional flow of energy; the output stage adopts a three-phase four-bridge arm inverter topological structure, and unbalanced current can be flexibly controlled. The front three-phase bridge arm adopts a double closed-loop control method based on an output voltage outer loop and an inductive current inner loop, and the fourth bridge arm adopts an independent control method based on a neutral inductive current.

The utility model discloses use three-phase rectification type nonlinear load such as unbalanced load and switching power supply commonly used, converter as an example, mainly consider wherein main 5 negative sequences, 7 positive sequences harmonic component, also can do similar processing to the nonlinear load that contains other subharmonics. The fundamental positive sequence, the negative sequence, the 5 th harmonic component and the 7 th harmonic component in the output voltage are converted by the fundamental positive sequence dq to obtain a direct current component, a 2-time fundamental frequency component and a 6-time fundamental frequency component respectively. The utility model discloses preceding three-phase bridge arm adopts the output voltage outer loop based on proportional-integral resonance and controls based on proportional-integral's inductive current inner ring, and the fourth bridge arm adopts the central line electric current independent control method based on proportional-integral resonance. Meanwhile, related methods such as a frequency characteristic curve, a root track and the like in a frequency domain theory are used for carrying out sub-band setting on the parameters of the controller, so that the requirements of stability and steady-state error and robustness of the system are met.

The control circuit of the output stage comprises a first sampling circuit for acquiring the low-voltage DC side bus voltage u_dc(ii) a A second sampling circuit for obtaining three-phase output voltage u of the inverter_oa、u_ob、u_ocI.e. the capacitor voltage; a third sampling circuit for obtaining three-phase inductive current i of the inverter_La、i_Lb、i_LcThree-phase load current i_oa、i_ob、i_ocAnd neutral current i_n(ii) a The DSP core processor is used for carrying out control algorithm calculation on the acquired input signals, outputting corresponding PWM driving pulses and carrying out program protection on the electrical sampling values; the IGBT driving circuit is used for amplifying the signal of the control circuit to drive the IGBT; and the hardware protection circuit is used for performing hardware circuit protection on the related voltage and current values and simultaneously performing main circuit protection by combining the software protection fault signal and the IGBT fault signal.

The specific implementation process comprises the following steps:

(1) at the initial point of each sampling period, a DSP (digital signal processor) controller respectively outputs voltage u to the three-phase load of the inverter through an A/D sampling circuit_oau_obu_ocInductor current i_Lai_Lbi_LcLoad current i_oai_obi_ocAnd neutral current i_nSampling is carried out, and the sampled data are sent to a controller for processing.

(2) And the inverter adopts a fourth bridge arm independent control mode. The front three-phase bridge arm selects a double closed-loop control strategy of an outer ring inductive current inner ring of an output voltage, wherein the voltage outer ring adopts a proportional-integral resonance controller based on 2-6 times of resonance frequency, and the fourth bridge arm adopts an improved PR controller based on fundamental frequency. The PIR controller transfer function is: $G_{PIR}\left(s\right)=K_P+\frac{K_I}{s}+\underset{h=2,6}{\Σ}\frac{2K_{Rh}{\mathrm{\ω}}_{c}s}{s^2+2{\mathrm{\ω}}_{c}s+{\mathrm{\ω}}_h^2}$

in the formula, K_P、K_I、K_RhProportional, integral and resonance coefficients, omega_cTo cut-off frequency (compromise gain and bandwidth at resonance point), ω_hIs the resonant angular frequency;

the PR controller transfer function is: $G_{PR}\left(s\right)=K_P+\frac{2K_R{\mathrm{\ω}}_{c}s}{s^2+2{\mathrm{\ω}}_{c}s+{\mathrm{\ω}}_0^2}$

in the formula, K_P、K_RRespectively a proportionality coefficient and a resonance coefficient, omega_cTo cut-off frequency, ω₀Is the fundamental angular frequency.

(3) Due to the duality of the d and q axes, a d-axis system control block diagram can be obtained as shown in fig. 4. Wherein Andrespectively outputting d-axis components of a voltage reference value, an inductive current reference value and a modulation signal reference value for the control system; u shape_d、I_Ld、U_odAnd I_odD-axis components of the inverter alternating-current side phase voltage, the inductor current, the load output voltage and the output current are respectively; g_v、G_iRespectively, a voltage outer loop controller transfer function and a current inner loop controller transfer function; k_pwmIs the inverter equivalent gain.

(4) A signal at a given input voltage can be obtainedLoad current disturbance signal I_odUnder the simultaneous action, output voltage U_odHas a closed loop transfer function of

$U_{od}\left(s\right)=\frac{G_v\left(s\right)G_i\left(s\right)K_{pwm}*U_{od}^{*}\left(s\right)-Ls*I_{od}\left(s\right)}{{\mathrm{LCs}}^2+G_i\left(s\right)K_{pwm}Cs+G_v\left(s\right)G_i\left(s\right)K_{pwm}+1}=H_d\left(s\right)U_{od}^{*}\left(s\right)-Z_d\left(s\right)I_{od}\left(s\right)$

(5) The utility model discloses explain the validity of this method with the concrete example, each concrete parameter is as follows: low voltage dc operating voltage U_dcVSI output phase voltage U of 800V_o220V, the switching frequency is 8kHz, the filter inductance L is 2mH, the filter capacitance C is 50uF, and the neutral line inductance L_n1mH, damping coefficient xi 0.707, intermediate frequency bandwidth h 10, and equivalent gain K of inverter_pwm＝0.8。

(6) The controller adopts a sub-band parameter setting method.

(7) Firstly, designing parameters of a voltage-current double closed-loop controller based on a direct current PI. Neglecting the effect of load current disturbance, the open loop transfer function of the system is

$G_o\left(s\right)=\frac{K_{pwm}(K_{1P}s+K_{1I})(K_{2P}s+K_{2I})}{s^2({\mathrm{LCs}}^2+K_{2P}{K}_{pwm}Cs+K_{2I}{K}_{pwm}C+1)}$ Wherein, $G_v=K_{1P}+\frac{K_{1I}}{s},G_i=K_{2P}+\frac{K_{2I}}{s}$ it can be seen that the system is a type II system comprising two first order differential stages and a second order oscillating stage. Let the above open-loop transfer function beWherein,

$K=\frac{K_{1I}{K}_{2I}{K}_{pwm}}{K_{2I}{K}_{pwm}C+1},T_1=\frac{K_{1P}}{K_{1I}},T_2=\frac{K_{2P}}{K_{2I}},T_3^2=\frac{LC}{K_{2I}{K}_{pwm}C+1},2{\mathrm{\ξT}}_3=\frac{K_{2P}{K}_{pwm}C}{K_{2I}{K}_{pwm}C+1}.$

(8) inverter output LC filter resonant angular frequency ofSetting the zero of the inner loop PI controller at the resonance angular frequency of the filter, i.e. with K_2I/K_2P＝ω_resAnd calculating the inner ring PI parameter according to the relation of the damping coefficient xi.

(9) Then selecting proper intermediate frequency bandwidth h ═ T₁/T₂And calculating the outer loop PI parameter by the open loop gain K value.

(10) Selecting a compensation link C(s) ═ K (1.15 multiplied by 10) by using a system design tool SISODesignTool in Matlab software⁵Then, the outer loop parameter K can be obtained_1P＝0.0248，K_1I7.8545 and inner loop parameter K_2P＝21.6，K_2I＝68300。

(11) And verifying the voltage and current double closed loop PI parameters according to the steady-state performance and the dynamic performance indexes of the system. The logarithmic frequency characteristic curve of the developed system is shown in FIG. 5, and the time-domain step response curve is shown in FIG. 6, with a system phase margin of P_MWhen the PI parameter is 51.9 degrees, the overshoot is less than 20%, and the adjustment time is 0.2s, the validity of the PI parameter is shown.

(12) Secondly, the parameters of the resonance controller R are designed, and in order to maintain the stability of the system, the above selected voltage loop PI parameters can be used as the proportional and integral coefficients of the PIR controller.

(13) According to the requirement of the system on stability, determining the resonance coefficient K by using a root track method_RhThe upper limit value range of (2). FIG. 7 shows K_RhAnd (3) corresponding closed loop transfer function pole distribution trend situation during change. It can be seen that with K_RhHas a pair of conjugate poles which are gradually increasedAnd the right half plane of the S domain is included, so that the system is unstable. Therefore, the voltage loop resonance coefficient K_RhThe upper limit of the critical stability is 16.7.

(14) Determining the resonance coefficient K according to the requirement of the system on the steady-state error_RhThe lower limit value range of (2). According to the output voltage U_odWith a given voltage signalCurrent disturbance signal I_odThe relation of (1) shows that harmonic components in the output voltage are only generated by load current harmonics, and the relative steady state amplitude error at the h-th harmonic current is set as epsilon_ih(h-2, 6). Then there is ${\mathrm{\ϵ}}_{ih}=\left|\frac{e\left({\mathrm{j\ω}}_h\right)}{I_{od}\left({\mathrm{j\ω}}_h\right)}\right|=\left|Z_d\left({\mathrm{j\ω}}_h\right)\right|$

(15) Combined with inverter equivalent output impedance Z_d(s) can be obtained by

$\left|G_{PIR}\left({\mathrm{j\ω}}_h\right)\right|\≥\frac{{\mathrm{\ω}}_{h}L}{{\mathrm{\ϵ}}_{ih}{K}_{pwm}\left|G_i\left({\mathrm{j\ω}}_h\right)\right|}-\left|\frac{1-{\mathrm{LC\ω}}_h^2}{K_{pwm}\left|G_i\left({\mathrm{j\ω}}_h\right)\right|}+{\mathrm{j\ω}}_{h}C\right|,$ In the formula | G_PIR(jω_h) I and | G_i(jω_h) I is the gain value of the voltage loop PIR and the current loop PI controller at the h harmonic respectively;

(16) the proportional-integral resonance controller is simplified as follows, the resonance frequency omega_hThe relative gain of (d) can be expressed as | G_PIR(jω_h)|≈K_P+K_Rh

(17) Since the load current harmonics are smaller than the dc component, it can be assumed that the load harmonic output voltage requires an error e relative to the steady state_ih5% (h 2, 6). Can calculate to obtain K_R2≥0.22，K_R6Not less than 2.1. Therefore, the voltage loop resonance parameter K_RhThe lower limit value should be satisfied to ensure that the steady-state error of the harmonic voltage component of the system is within the set requirement.

(18) Taking a resonance coefficient K in the text according to the requirements of stability and steady-state error of the system_R2＝K_R6＝2.5。

(19) From the parameters of the whole controller, the voltage outer loop PIR controller transfer function is obtained

$G_{PIR}\left(s\right)=0.0248+\frac{7.8545}{s}+\frac{50s}{s^2+20s+{628}^2}+\frac{50s}{s^2+20s+{1884}^2}$

The voltage inner loop PI controller transfer function is

(20) Based on the above controller parameters, Bode plotting the system is shown in fig. 8. The phase margin of the system is 40dB, the stability of the system is ensured, and the rationality of parameter design is verified.

The present invention is not limited to the above-described embodiments, but only to the preferred embodiments of the present invention, and the present invention is not limited thereto, and any modifications, equivalent replacements, and improvements made within the spirit and principle of the present invention should be included within the protection scope of the present invention.

Claims (4)

1. A power electronic transformer adaptive to unbalanced and nonlinear loads is characterized in that the topological structure of the power electronic transformer comprises an input stage, a middle isolation stage and an output stage, the output stage is an inverter with a three-phase four-leg structure, the inverter comprises a four-leg inverter circuit and an LC filter circuit, the four-leg inverter circuit is composed of a direct-current electrolytic capacitor and eight IGBTs with anti-parallel diodes, the LC filter circuit is composed of a three-phase LC filter and a fourth-leg neutral line inductor, and a load neutral point is connected with the midpoint of a fourth leg through the neutral line inductor; the method is characterized in that: the control circuit of the front three-phase bridge arm is provided with a voltage outer ring PIR controller and a current inner ring PI controller, and the control circuit of the fourth bridge arm is provided with a neutral current PR controller.

2. A power electronic transformer accommodating unbalanced and non-linear loads as claimed in claim 1 wherein: the control circuit of the output stage includes:

a first sampling circuit for obtaining the low-voltage DC side bus voltage u_dc(ii) a And the low-voltage DC side bus voltage u_dcSending the data to a DSP core processor;

a second sampling circuit for obtaining three-phase output voltage u of the inverter_oa、u_ob、u_ocAnd outputs the three-phase output voltage u_oa、u_ob、u_ocSending the data to a DSP core processor;

a third sampling circuit for obtaining three-phase inductive current i of the inverter_La、i_Lb、i_LcThree-phase load current i_oa、i_ob、i_ocAnd neutral current i_nAnd the three-phase inductive current i_La、i_Lb、i_LcThree-phase load current i_oa、i_ob、i_ocAnd neutral current i_nSending the data to a DSP core processor;

the IGBT driving circuit is used for receiving the PWM pulse sent by the DSP core processor and amplifying the signal to drive the IGBT;

and the hardware protection circuit is used for performing hardware circuit protection on the related voltage and current values.

3. A power electronic transformer accommodating unbalanced and non-linear loads as claimed in claim 1 wherein: each phase of the input stage adopts a cascade H-bridge topology, each phase of the cascade H-bridge is composed of n single-phase PWM rectifier modules, and a neutral point adopts a star connection mode.

4. A power electronic transformer accommodating unbalanced and non-linear loads as claimed in claim 1 wherein: the intermediate isolation level is of a double-driving-bridge structure.