CN204856118U - Communication realizes device based on FPGA - Google Patents

Communication realizes device based on FPGA Download PDF

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Publication number
CN204856118U
CN204856118U CN201520530182.3U CN201520530182U CN204856118U CN 204856118 U CN204856118 U CN 204856118U CN 201520530182 U CN201520530182 U CN 201520530182U CN 204856118 U CN204856118 U CN 204856118U
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China
Prior art keywords
communication
fpga
unit
control module
module
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Expired - Fee Related
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CN201520530182.3U
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Chinese (zh)
Inventor
台明超
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Kaixian County Zhengpin Chengying Science & Technology Development Co Ltd
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Kaixian County Zhengpin Chengying Science & Technology Development Co Ltd
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Priority to CN201520530182.3U priority Critical patent/CN204856118U/en
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Abstract

The utility model belongs to the technical field of the electron, the utility model provides a communication realizes device based on FPGA, including communication instrumentation device (1), still include power module, RF chips (3), FPGA control module (2), bus control module (4), a communication module (5) for man -machine communication, the utility model discloses an adoption FPGA control module singlechip arithmetic operation function is strong, software programming nimble, the degree of freedom is big, and available software programming realizes various algorithms and logic control to because its low power dissipation, small, technology maturation and characteristics such as with low costs make it use extensively in the every field.

Description

A kind of communication implement device based on FPGA
Technical field
The utility model belongs to electronic technology field, especially a kind of communication implement device based on FPGA.
Background technology
FPGA (Field-ProgrammableGateArray), i.e. field programmable gate array, he is the product further developed on the basis of the programming devices such as PAL, GAL, CPLD.It occurs as a kind of semi-custom circuit in special IC (ASIC) field, has both solved the deficiency of custom circuit, overcomes again the shortcoming that original programming device gate circuit number is limited.
Feature is introduced
1) adopt FPGA ASIC design circuit (special IC), user does not need to throw sheet and produces, and just can obtain the chip share.
2) FPGA can do the middle coupons of other full custom or semi-custom ASIC circuit.
3) there are abundant trigger and I/O pin in FPGA inside.
4) FPGA be that in ASIC circuit, the design cycle is the shortest, development cost are minimum, one of the device of least risk.
5) FPGA adopts high-speed cmos technique, low in energy consumption, can be compatible with CMOS, Transistor-Transistor Logic level.
Can say, fpga chip is one of the optimal selection that short run system improves level of integrated system, reliability.FPGA is by the program left in ram in slice to arrange its duty, therefore, needs to programme to the RAM in sheet during work.User according to different configuration modes, can adopt different programming modes.
When powering up, data in EPROM are read in sheet by fpga chip programmes in RAM, and after having configured, FPGA enters duty.After power down, FPGA reverts to white tiles, and internal logic relation disappears, and therefore, FPGA can Reusability.The programming of FPGA need not be special FPGA programmable device, need only with general EPROM, PROM programmable device.When needs amendment FPGA function, only a slice EPROM need be changed.Like this, with a slice FPGA, different programming datas, can produce different circuit functions.Therefore, the use of FPGA is very flexible.
Controller and the single-chip microcomputer of the system of existing communication implement device employing are high due to integrated level, make its high expensive, and simultaneously owing to adopting the pin of chip more, hardware circuit board wiring in kind is complicated, has increased the weight of the work of circuit design and actual welding.
Utility model content
The purpose of this utility model is that to overcome degree of one-tenth in prior art high, makes its high expensive, and simultaneously because the pin of existing chip is more, hardware circuit board wiring in kind is complicated, has increased the weight of the shortcoming of the work of circuit design and actual welding.
For this reason, the utility model provides a kind of communication implement device based on FPGA, and it comprises communication instrument apparatus, also comprises the power module for providing circuit system and communication instrument apparatus power supply in described communication instrument apparatus; For reading and write the radio frequency chip of data to FPGA control module, for the FPGA control module of data sampling and processing, storage and control circuit work; Carry out encoding for gathering FPGA control module data, data preparation, analysis bus control module; For the communication module of man-machine communication;
Described radio frequency chip output terminal is electrically connected with FPGA control module input end; Described FPGA control module output terminal is electrically connected with bus control module input end; Described bus control module output terminal is electrically connected with communication module input end.
Described communication instrument apparatus also comprises power module, and described power module outlet is electrically connected with bus control module input end
Described FPGA control module comprises CPU, SPI unit, SSI unit, ISA unit, EPC unit, GPIO unit, and CPU and SPI unit, SSI unit, ISA unit, EPC unit and GPIO unit are connected by PLB bus; SPI unit is connected with communication instrument apparatus, and SSI unit is connected with the scrambler in bus control module, and EPC unit and GPIO unit are connected with bus control module, and described ISA unit is connected with PC control unit.
Described communication instrument apparatus also comprises communication module, and described communication module input end is electrically connected with bus control module output terminal.
Described a kind of communication implement device based on FPGA also comprises the display screen for showing communication device duty and the keyboard for man-machine interaction; Described display screen is touch-screen, and described keyboard is 3x2 keyboard.
The utility model has the following advantages:
By adopting, FPGA control module single-chip microcomputer arithmetical operation function is strong, software programming is flexible, degree of freedom is large, available software programming realizes various algorithm and logic control, and because it is low in energy consumption, volume is little, technology maturation and the feature such as cost is low, it is made to be widely used in every field, FPGA is the controller that we are familiar with, Programming comparison is familiar with, and is easy to grasp.
Accompanying drawing explanation
Fig. 1 is structural representation of the present utility model;
Fig. 2 is the structural representation of FPGA control module in the utility model.
In figure, 1, communication instrument apparatus; 2, FPGA control module; 3, radio frequency chip; 4, bus control module; 5, communication module.
Embodiment
Be below specific embodiment of the utility model and by reference to the accompanying drawings, the technical solution of the utility model is further described, but the utility model be not limited to these embodiments.
embodiment 1
As shown in Figure 1, in order to overcome the controller of system that existing communication implement device adopts and single-chip microcomputer due to integrated level high, make its high expensive, simultaneously owing to adopting the pin of chip more, hardware circuit board wiring in kind is complicated, increase the weight of the work of circuit design and actual welding, the utility model provides a kind of communication implement device based on FPGA, it comprises communication instrument apparatus 1, also comprises the power module for providing circuit system and communication instrument apparatus 1 power supply in described communication instrument apparatus 1; For reading and write the radio frequency chip 3 of data to FPGA control module, for the FPGA control module 2 of data sampling and processing, storage and control circuit work; Carry out encoding for gathering FPGA control module 2 data, data preparation, analysis bus control module 4; For the communication module 5 of man-machine communication;
Described radio frequency chip 3 output terminal is electrically connected with FPGA control module 2 input end; Described FPGA control module 2 output terminal is electrically connected with bus control module 4 input end; Described bus control module 4 output terminal is electrically connected with communication module 5 input end.
embodiment 2
Job step of the present utility model is:
1), described radio frequency chip 3, communication module 5 send data to FPGA control module 2, gather through FPGA control module 2, process, store after send data to bus control module 4;
2), bus control module 4 pairs of data encode, arrange, analyze after result data be sent to communication module 5 carry out man-machine communication.
This communication implement device, using FPGA as microcontroller, adopts MF-RC500 chip as radio-frequency card read/write modules, adopts DS1302 as system clock, the storer using AT24C64 as not power down.
embodiment 3
As shown in Figure 2, described FPGA control module basic comprising is: described FPGA control module comprises CPU, SPI unit, SSI unit, ISA unit, EPC unit, GPIO unit, and CPU and SPI unit, SSI unit, ISA unit, EPC unit and GPIO unit are connected by PLB bus; SPI unit is connected with communication instrument apparatus 1, and SSI unit is connected with the scrambler in bus control module 4, and EPC unit and GPIO unit are connected with bus control module 4, and described ISA unit is connected with PC control unit.
embodiment 4
The acting as of radio frequency chip in the utility model: radio frequency chip 3 provides the energy carrier wave of 13.56MHz; Modulate to sending data the signal obtaining sending, radio frequency chip 3 internal receipt device detects signal, processes, and then data is sent to parallel interface and is read by FPGA control module 2.
embodiment 5
Described a kind of communication implement device based on FPGA also comprises the display screen for showing communication device duty and the keyboard for man-machine interaction; Described display screen is touch-screen, and described keyboard is 3x2 keyboard.
More than exemplifying is only illustrate of the present utility model, does not form the restriction to protection domain of the present utility model, everyly all belongs within protection domain of the present utility model with the same or analogous design of the utility model.
The parts that the present embodiment does not describe in detail, structure &processes belong to the well-known components of the industry and common structure or conventional means, and do not describe one by one here, we can provide reference if needed.

Claims (5)

1. based on a communication implement device of FPGA, it comprises communication instrument apparatus (1), it is characterized in that: also comprise radio frequency chip (3) in described communication instrument apparatus (1), FPGA control module (2); Bus control module (4); Communication module (5);
Described radio frequency chip (3) output terminal is electrically connected with FPGA control module (2) input end; Described FPGA control module (2) output terminal is electrically connected with bus control module (4) input end.
2. a kind of communication implement device based on FPGA according to claim 1, is characterized in that: described communication instrument apparatus (1) also comprises power module, and described power module outlet is electrically connected with bus control module (4) input end.
3. a kind of communication implement device based on FPGA according to claim 1, it is characterized in that: described FPGA control module comprises CPU, SPI unit, SSI unit, ISA unit, EPC unit, GPIO unit, CPU and SPI unit, SSI unit, ISA unit, EPC unit and GPIO unit are connected by PLB bus; SPI unit is connected with communication instrument apparatus (1), SSI unit is connected with the scrambler in bus control module (4), EPC unit and GPIO unit are connected with bus control module (4), and described ISA unit is connected with PC control unit.
4. a kind of communication implement device based on FPGA according to claim 1, it is characterized in that: described communication instrument apparatus (1) also comprises communication module (5), and described communication module (5) input end is electrically connected with bus control module (4) output terminal.
5. a kind of communication implement device based on FPGA according to claim 1, is characterized in that: described a kind of communication implement device based on FPGA also comprises the display screen for showing communication device duty and the keyboard for man-machine interaction; Described display screen is touch-screen, and described keyboard is 3x2 keyboard.
CN201520530182.3U 2015-07-21 2015-07-21 Communication realizes device based on FPGA Expired - Fee Related CN204856118U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201520530182.3U CN204856118U (en) 2015-07-21 2015-07-21 Communication realizes device based on FPGA

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201520530182.3U CN204856118U (en) 2015-07-21 2015-07-21 Communication realizes device based on FPGA

Publications (1)

Publication Number Publication Date
CN204856118U true CN204856118U (en) 2015-12-09

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201520530182.3U Expired - Fee Related CN204856118U (en) 2015-07-21 2015-07-21 Communication realizes device based on FPGA

Country Status (1)

Country Link
CN (1) CN204856118U (en)

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C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20151209

Termination date: 20160721

CF01 Termination of patent right due to non-payment of annual fee