CN204712991U - A kind of flash driving circuit - Google Patents
A kind of flash driving circuit Download PDFInfo
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- CN204712991U CN204712991U CN201520058073.6U CN201520058073U CN204712991U CN 204712991 U CN204712991 U CN 204712991U CN 201520058073 U CN201520058073 U CN 201520058073U CN 204712991 U CN204712991 U CN 204712991U
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Abstract
The utility model discloses a kind of flash driving circuit, comprise controller, driving circuit and testing circuit, the mouth of controller is connected with the input end of driving circuit, controller controls the control signal of driving circuit for exporting, first mouth of driving circuit is connected with far-end load, second mouth of driving circuit is connected with the input end of testing circuit, driving circuit is used for exporting according to control signal the drive singal driving far-end loaded work piece, the mouth of testing circuit is connected with the input end of controller, the drive singal that testing circuit exports for gathering driving circuit, and the drive singal input control device that will collect, whether the connection that controller detects between the first mouth of driving circuit and far-end load according to the drive singal collected is in normal condition.The utility model can detect the short circuit of wire harness between driving circuit first mouth and far-end load and open-circuit condition, avoid flash driving circuit to be damaged, and cost is lower.
Description
Technical field
The utility model relates to vehicle electric field, is specifically related to a kind of flash driving circuit.
Background technology
In vehicle electronics design ap-plication, a kind of important and conventional mode is flash driving circuit is outer distal end load supplying, and the other end of far-end load is connected for a long time with vehicle body ground.The mouth of flash driving circuit is connected with described far-end load by wire harness, along with the increase of period of service, described wire harness there will be breakage, thus makes the situation of power lead in described flash driving circuit and vehicle body earth short, thus causes the damage of equipment on automobile.In addition, some application also needs the situation that can detect far-end load open circuit.
Generally whether there is short circuit by the load of intelligent drives chip detection far-end in prior art, and whether occur open circuit by the load of intelligent chip detection far-end.
But, the cost of intelligent drives chip is higher, procurement cycle is longer, advantage is not had in automotive electronic industry, particularly for the underaction that specific demand is aobvious, such as: the electric current of far-end loading demand is different in different applications, if the power-handling capability of intelligent drives chip is not enough, then described intelligent drives chip cannot meet far-end load demand in a particular application, if the power-handling capability of intelligent drives chip exceeds far-end load demand in a particular application, then described intelligent drives chip can cause the waste of cost and area.
Utility model content
In view of this, the utility model embodiment provides a kind of flash driving circuit, to solve in prior art the problem adopting intelligent drives chip cost high.
The utility model embodiment provides a kind of flash driving circuit, comprises controller and driving circuit; Wherein,
The mouth of described controller is connected with the input end of described driving circuit, and described controller controls the control signal of described driving circuit for exporting; First mouth of described driving circuit is connected with far-end load, and described driving circuit is used for exporting according to described control signal the drive singal driving far-end loaded work piece;
Described flash driving circuit also comprises testing circuit; The input end of described testing circuit is connected with the second mouth of described driving circuit, the mouth of described testing circuit is connected with the input end of described controller, the drive singal that described testing circuit exports for gathering described driving circuit, and the described drive singal collected is inputted described controller, whether the connection that described controller is used for detecting between the first mouth of described driving circuit and far-end load according to the described drive singal collected is in normal condition.
Further, described driving circuit comprises the first transistor, transistor seconds and the first resistance;
The control end of described the first transistor is connected with the mouth of described controller, the mouth end of described the first transistor is connected with the control end of described transistor seconds and the first end of described first resistance respectively, and the input end of described the first transistor is connected to the ground;
The input end of described transistor seconds is connected with the first power supply, and the mouth of described transistor seconds is respectively with the input end of described testing circuit and be connected with far-end load;
Second end of described first resistance is connected with described first power supply.
Further, described testing circuit comprises the second resistance;
The first end of described second resistance is connected with described first power supply, and the second end of described second resistance is connected with the mouth of described transistor seconds and the input end of described controller respectively.
Further, described testing circuit comprises the 3rd resistance, the 4th resistance, the 5th resistance, third transistor and the 6th resistance;
The first end of described 3rd resistance is connected with described first power supply, and the second end of described 3rd resistance is connected with the mouth of described transistor seconds and the first end of described 4th resistance respectively;
Second end of described 4th resistance is connected with the control end of described third transistor and the first end of described 5th resistance respectively, second end of described 5th resistance is respectively with the input end of described third transistor and be connected to the ground, the mouth of described third transistor is connected with the input end of described controller and the first end of described 6th resistance respectively, and the second end of described 6th resistance is connected with second source.
Further, described the first transistor is NPN aerotron, the control end of described the first transistor is the base stage of described NPN aerotron, and the mouth of described the first transistor is the collecting electrode of described NPN aerotron, and the input end of described the first transistor is the emitter of described NPN aerotron.
Further, described transistor seconds is PMOS, and the control end of described transistor seconds is the grid of described PMOS, and the input end of described transistor seconds is the source electrode of described PMOS, and the mouth of described transistor seconds is the drain electrode of described PMOS.
Further, described third transistor is NPN aerotron, the control end of described third transistor is the base stage of described NPN aerotron, and the mouth of described third transistor is the collecting electrode of described NPN aerotron, and the input end of described third transistor is the emitter of described NPN aerotron.
Further, described controller comprises power end, ground terminal and two universal input/output interfaces, described power end is connected with described second source, described ground terminal is connected to the ground, one of them universal input/output interface is as the mouth interface of described controller, and another universal input/output interface is as the input end interface of described controller.
The flash driving circuit that the utility model embodiment provides; the drive singal of described driving circuit output is gathered by testing circuit; the short circuit of the wire harness be connected between driving circuit with far-end load and open-circuit condition detect according to the described drive singal collected, controller can be detected; thus far-end load is processed accordingly and provides protection for far-end load; avoid flash driving circuit impaired, and cost is lower.
Accompanying drawing explanation
Fig. 1 is the constructional drawing of the flash driving circuit that the utility model embodiment provides;
Fig. 2 is the constructional drawing of the flash driving circuit that another embodiment of the utility model provides;
Fig. 3 is the constructional drawing of the flash driving circuit that the another embodiment of the utility model provides.
Detailed description of the invention
Below in conjunction with drawings and Examples, the utility model is described in further detail.Be understandable that, specific embodiment described herein only for explaining the utility model, but not to restriction of the present utility model.It also should be noted that, for convenience of description, illustrate only the part relevant to the utility model in accompanying drawing but not full content.
Fig. 1 is the constructional drawing of the flash driving circuit that the utility model embodiment provides.As shown in Figure 1, described flash driving circuit comprises controller 11, driving circuit 12 and testing circuit 13.
The mouth of controller 11 is connected with the input end of driving circuit 12, and controller 11 controls the control signal of driving circuit 12 for exporting, controller 11 is generally general microprocessor or microcontroller.
First mouth of driving circuit 12 is connected with far-end load 14, and the second mouth of driving circuit 12 is connected with the input end of testing circuit 13, and driving circuit 12 exports for the control according to described control signal the drive singal driving far-end load 14 to work.Specifically, switch circuit can be comprised in driving circuit 12, when the control signal switch circuit controlled in described driving circuit 12 that controller 11 exports is opened, driving circuit 12 exports the drive singal driving far-end load 14 to work, when the switch circuit that the control signal that controller 11 exports controls in described driving circuit 12 cuts out, driving circuit 12 does not export the drive singal driving far-end load 14 to work, and far-end load 14 is connected by first mouth of wire harness with described driving circuit 12.
The mouth of testing circuit 13 is connected with the input end of controller 11, the drive singal that testing circuit 13 exports for gathering driving circuit 12, and the drive singal collected is inputted described controller 11, whether the first mouth that controller 11 detects driving circuit 12 according to the drive singal collected is in normal condition with the wire harness be connected between far-end load 14.
Specifically, when controller 11 export control signal control described switch circuit open time, first mouth of driving circuit 12 with the wire harness be connected between far-end load 14 under normal condition and short-circuit condition, the drive singal that testing circuit 13 collects there will be difference, according to this difference, controller 11 can find whether the first mouth of driving circuit 12 occurs the situation of shorted to earth with the wire harness be connected between far-end load 14, the switch circuit controlled in driving circuit 12 by control signal cuts out, thus avoids described flash driving circuit to be damaged.Simultaneously, when the switch circuit that controller 11 controls in driving circuit 12 cuts out, the wire harness that first mouth of driving circuit 12 is connected with far-end load 14 is under normal coupled condition and open-circuit condition, the drive singal that testing circuit 13 collects there will be difference, according to this difference, controller 11 can judge whether the first mouth of driving circuit 12 is in open-circuit condition with the wire harness be connected between far-end load 14.
Next the constructional drawing of described flash driving circuit is provided in a preferred manner.
Fig. 2 is the constructional drawing of the another kind of flash driving circuit that the utility model embodiment provides.As shown in Figure 2, described flash driving circuit comprises controller 21, driving circuit 22 and testing circuit 23, and controller 21 is generally microprocessor (uP) or microcontroller (MCU).
Controller 21 comprises power end VCC, ground terminal GND and two universal input/output interface (General Purpose Input Output, be called for short GPIO), power end VCC is connected with second source VCC, the size of the second source voltage of second source VCC is generally 5V or 3.3V, ground terminal GND is connected with ground GND, by the process of described microcontroller or described microcontroller uP, make one of them GPIO as the mouth interface IO_1 of controller 21, another GPIO is as the input end interface IO_2 of controller 21.
Driving circuit 22 comprises the first transistor, transistor seconds and the first resistance R1, preferably, described the first transistor is a NPN aerotron Q1, described transistor seconds is PMOS Q2, the control end (base stage) of the one NPN aerotron Q1 is connected with the mouth IO_1 of controller 21, the mouth (collecting electrode) of the one NPN aerotron Q1 is connected with the control end (grid) of PMOS Q2 and the first end of the first resistance R1 respectively, the input end (emitter) of the one NPN aerotron Q1 is connected with ground GND, the input end (source electrode) of PMOS Q2 is connected with the first power supply VBAT, the mouth (drain electrode) of PMOS Q2 is connected with the input end of testing circuit 23 and far-end load 24 respectively, particularly, the mouth (drain electrode) of PMOS Q2 is connected with far-end load 24 by wire harness, second end of the first resistance R1 is connected with the first power supply VBAT.The size of the first power supply VBAT can be 12V or 18V.
Testing circuit 23 comprises the second resistance R2, and the first end of the second resistance R2 is connected with the first power supply VBAT, and second end of the second resistance R2 is connected with the mouth (drain electrode) of PMOS Q2 and the input end IO_2 of controller 21 respectively.
Below for far-end load 24 for the principle of work of lamp to the flash driving circuit shown in Fig. 2 is further described, wherein, the anode of far-end load 24 is connected with the first mouth of driving circuit 22 by wire harness (in Fig. 2 shown in dotted line), the negativing ending grounding of far-end load 24:
When the control signal that the mouth IO_1 of controller 21 exports is high level, one NPN aerotron Q1 conducting, due to the existence of the first resistance R1 (10K Ω), make A point for low level, thus make the PMOS Q2 conducting as driving circuit 22 breaker in middle circuit, thus start to power to far-end load 24.If the first mouth of driving circuit 22 is in normal condition with the wire harness be connected between far-end load 24, because the input end (source electrode) of PMOS Q2 is connected with the first power supply VBAT, the mouth (drain electrode) making PMOS Q2 is high level, the mouth (C point) of testing circuit 23 exports high level, and by the input end IO_2 of described high level input control device 21, if there is short circuit at B point in the wire harness connecting far-end load 24 and driving circuit 22 first mouth, make mouth (C point) output low level of testing circuit 23, and by the input end IO_2 of described low level input control device 21, when controller 21 exports high level and driving circuit 22 the first mouth according to the first mouth of driving circuit 22 and the wire harness be connected between the far-end load 24 mouth C point of testing circuit 23 when normal condition and the wire harness be connected between far-end load 24 are in short-circuit condition, the difference of the mouth C point output low level of testing circuit 23 judges that described wire harness is in short circuit error state, and then make the mouth IO_1 output low level of controller 21, PMOS Q2 in described driving circuit 22 is closed, thus avoid described flash driving circuit to be damaged.
When the control signal that the mouth IO_1 of controller 21 exports is low level, one NPN aerotron Q1 ends, because the first resistance R1 is connected with the first power supply VBAT, A point is made to be high level, thus PMOS Q2 is closed, if the first mouth of driving circuit 22 is in normal condition with the wire harness be connected between far-end load 24, because the existence of the second resistance R2 carries out dividing potential drop to far-end load 24, the resistance of the second resistance R2 can be 10K Ω, make mouth (C point) output low level of testing circuit 23, and by the input end IO_2 of described low level input control device 21, if when the first mouth of driving circuit 22 is in open-circuit condition with the wire harness be connected between far-end load 24, the mouth (C point) of testing circuit 23 exports high level, and by the input end IO_2 of described high level input control device 21.When the low level that controller 21 exports according to the mouth C point of described wire harness testing circuit 23 when normal condition and described wire harness are at open-circuit condition the difference judgement driving circuit 22 of the high level that the mouth C point of testing circuit 23 exports the first mouth and be connected whether be in open-circuit condition between far-end load 24.
It should be noted that, the first transistor described in the present embodiment is NPN aerotron is only a concrete example, is not limited to the utility model, and in other embodiments of the present utility model, described the first transistor also can be NMOS tube.
The flash driving circuit that the present embodiment provides, when wire harness between the first mouth connecting driving circuit and far-end load is in normal condition and short-circuit condition, there are differences between the high level of the mouth output of described testing circuit and low level, according to described level differences, described controller judges whether the wire harness between the first mouth of described driving circuit and described far-end load is short-circuited, when judging that described far-end load is short-circuited, by the PMOS of closing in driving circuit, far-end load is protected, when wire harness between first mouth and far-end load of driving circuit is in normal condition and open-circuit condition, there are differences between the low level of the mouth output of described testing circuit and high level, according to described level differences, described controller judges whether the wire harness between the first mouth of described driving circuit and far-end load there occurs open circuit, can realize detecting the short circuit of rattail between the first mouth of driving circuit and far-end load and open-circuit condition by circuit layout, cost is lower, and corresponding power-handling capability can be provided according to different demand, there is higher alerting ability.
Fig. 3 is the constructional drawing of the flash driving circuit that the another embodiment of the utility model provides.As shown in Figure 3, described flash driving circuit comprises controller 31, driving circuit 32 and testing circuit 33, and controller 31 is generally microprocessor (uP) or microcontroller (MCU).
Controller 31 comprises power end VCC, ground terminal GND and two GPIO, power end VCC is connected with second source VCC, the size of the second source voltage of second source VCC is generally 5V or 3.3V, ground terminal GND is connected with ground GND, by the process of microprocessor uP or described microcontroller, make one of them GPIO as the mouth interface IO_1 of controller 21, another GPIO is as the input end interface IO_2 of controller 21.
Driving circuit 32 comprises the first transistor, transistor seconds and the first resistance R1, preferably, described the first transistor is a NPN aerotron Q1, described transistor seconds is PMOS Q2, the control end (base stage) of a described NPN aerotron Q1 is connected with the mouth IO_1 of controller 31, the mouth (collecting electrode) of the one NPN aerotron Q1 is connected with the control end (grid) of PMOS Q2 and the first end of the first resistance R1 respectively, the input end (emitter) of the one NPN aerotron Q1 is connected with ground GND, the input end (source electrode) of PMOS Q2 is connected with the first power supply VBAT, the mouth (drain electrode) of PMOS Q2 is connected with the input end of testing circuit 33 and far-end load 34 respectively, particularly, the mouth (drain electrode) of PMOS Q2 is connected with far-end load 34 by wire harness, second end of the first resistance R1 is connected with the first power supply VBAT.The size of the first power supply VBAT can be 12V or 18V.
Testing circuit 33 comprises the 3rd resistance R3, 4th resistance R4, 5th resistance R5, third transistor and the 6th resistance R6, described third transistor is preferably the 2nd NPN aerotron Q3, the first end of the 3rd resistance R3 is connected with second source VCC, second end of the 3rd resistance R3 is connected with the mouth (drain electrode) of PMOS Q2 and the first end of the 4th resistance R4 respectively, second end of the 4th resistance R4 is connected with the control end (base stage) of the 2nd NPN aerotron Q3 and the first end of the 5th resistance R5 respectively, second end of the 5th resistance R5 is respectively with the input end (emitter) of the 2nd NPN aerotron Q3 and be connected with ground GND, the mouth (collecting electrode) of the 2nd NPN aerotron Q3 is connected with the input end IO_2 of controller 31 and the first end of the 6th resistance R6 respectively, second end of the 6th resistance R6 is connected with second source VCC.
Below for far-end load 34 for the principle of work of lamp to the flash driving circuit shown in Fig. 3 is further described, wherein, the anode of far-end load 34 is connected with the first mouth of driving circuit 32 by wire harness (in Fig. 3 shown in dotted line), the negativing ending grounding of far-end load 34:
Before further illustrating, it should be noted that, in the present embodiment, the resistance of the 4th resistance R4 and the 5th resistance R5 can be K Ω magnitude, the intrinsic standoff ratio of the 4th resistance R4 and the 5th resistance R5 can be 1:1, can certainly be other intrinsic standoff ratio, and concrete intrinsic standoff ratio can be determined according to the requirement of the voltage of the first power supply VBAT and the 2nd NPN aerotron Q3, such as: the first power supply VBAT voltage is 12V, and the resistance of the 4th resistance R4 and the 5th resistance R5 is 10K Ω.
When the control signal that the mouth IO_1 of controller 31 exports is high level, one NPN aerotron Q1 conducting, due to the existence of the first resistance R1, make A point for low level, thus make the PMOS Q2 conducting as driving circuit 32 breaker in middle circuit, because the input end (source electrode) of PMOS Q2 is connected with the first power supply VBAT, the mouth (drain electrode) making PMOS Q2 is high level, if the wire harness between the first mouth of driving circuit 32 and far-end load 34 is in normal condition, after the dividing potential drop that the 4th resistance R4 and the 5th resistance R5 is suitable, make C point (voltage of input the 2nd NPN aerotron Q3 base stage) be high level, thus guarantee the 2nd NPN aerotron Q3 conducting, due to input end (emitter) the ground connection GND of the 2nd NPN aerotron Q3, therefore, mouth (collecting electrode) voltage of the 2nd NPN aerotron Q3 is low level, i.e. mouth (D point) output low level of testing circuit, and by the input end IO_2 of described low level input control device 21.
If there is short circuit at B point in the wire harness of the first mouth of driving circuit 32 and far-end load 34, make C point for low level thus the 2nd NPN aerotron Q3 is ended, due to the existence of the 6th resistance R6 (10K Ω), the mouth (collecting electrode) making the 2nd NPN aerotron Q3 is high level, thus the mouth of testing circuit 33 (D point) exports high level, and by the input end IO_2 of described high level input control device 31.Whether the wire harness when low level of the 2nd NPN aerotron Q3 mouth (collecting electrode) and described wire harness are in short-circuit condition when controller 31 is in normal condition according to described wire harness between the first mouth of the diversity judgement driving circuit 32 of the high level of the 2nd NPN aerotron Q3 mouth (collecting electrode) and far-end load 34 is in short-circuit condition, become low level to close the PMOS Q2 in driving circuit 32 by the control signal exported by the mouth IO_1 of controller 31, thus avoid described driving circuit to be damaged.
When the control signal that the mouth IO_1 of controller 31 exports is low level, one NPN aerotron Q1 ends, because the first resistance R1 is connected with the first power supply VBAT, A point is made to be high level, thus PMOS Q2 is in off condition, if the wire harness between the first mouth of driving circuit 32 and far-end load 34 is in normal condition, because the impedance of described far-end load is much smaller than the impedance of the 3rd resistance R3, so C point is low level thus makes the 2nd NPN aerotron Q3 end, because the 6th resistance R6 is connected with second source VCC, the mouth (collecting electrode) making the 2nd NPN aerotron Q3 is high level, namely second mouth (D point) of testing circuit 33 is high level, and by the input end IO_2 of described high level input control device 31.
If the wire harness between the first mouth of driving circuit 32 and far-end load 34 is in open-circuit condition, due to the existence of the 3rd resistance R3, coordinate the intrinsic standoff ratio that the 4th resistance R4 and the 5th resistance R5 is suitable, C point is made to be high level, therefore, 2nd NPN aerotron Q3 conducting, due to input end (emitter) the ground connection GND of the 2nd NPN aerotron Q3, the mouth (collecting electrode) making the 2nd NPN aerotron Q3 is low level, therefore, the mouth (D point) of testing circuit 33 collects low level, and by the input end IO_2 of described low level input control device 31.When controller 31 is in normal condition according to described wire harness, the high level of the mouth (collecting electrode) of the 2nd NPN aerotron Q3 and described wire harness are in open-circuit condition the mouth (collecting electrode) of the 2nd NPN aerotron Q3 low level diversity judgement described in connection between the first end of driving circuit 32 and far-end load whether be in open-circuit condition.
It should be noted that, it is only a concrete example that the first transistor described in the present embodiment and described third transistor are NPN aerotron, be not limited to the utility model, in other embodiments of the present utility model, described the first transistor and described third transistor also can be NMOS tube.
The flash driving circuit that the present embodiment provides, whether short-circuit condition can be in and open-circuit condition judges to the wire harness between the first mouth of driving circuit and far-end load, cost is low, and by the 2nd NPN aerotron in testing circuit and the 3rd resistance, 4th resistance, 5th resistance and the 6th resistance carry out acquisition of signal to driving circuit mouth, due to the voltage of the second source that the voltage of the first power supply generally inputs higher than the power end of controller, the high level exported by testing circuit after the 2nd NPN aerotron is identical with the high level that the power end of controller inputs, therefore, the pin of controller can be prevented to be damaged, and the larger noise that the first power supply can be avoided to bring causes the mistake collection of testing circuit.
It should be noted that; the above is only preferred implementation of the present utility model; should be understood that; for those skilled in the art; the equivalent variations made under the prerequisite of the design and principle that do not depart from the utility model principle, amendment and combination, all should belong to protection domain of the present utility model.
Claims (8)
1. a flash driving circuit, comprises controller and driving circuit; Wherein,
The mouth of described controller is connected with the input end of described driving circuit, and described controller controls the control signal of described driving circuit for exporting; First mouth of described driving circuit is connected with far-end load, and described driving circuit is used for exporting according to described control signal the drive singal driving far-end loaded work piece; It is characterized in that,
Described flash driving circuit also comprises testing circuit; The input end of described testing circuit is connected with the second mouth of described driving circuit, the mouth of described testing circuit is connected with the input end of described controller, the drive singal that described testing circuit exports for gathering described driving circuit, and the described drive singal collected is inputted described controller, whether the connection that described controller is used for detecting between the first mouth of described driving circuit and far-end load according to the described drive singal collected is in normal condition.
2. flash driving circuit according to claim 1, is characterized in that, described driving circuit comprises the first transistor, transistor seconds and the first resistance;
The control end of described the first transistor is connected with the mouth of described controller, and the mouth of described the first transistor is connected with the control end of described transistor seconds and the first end of described first resistance respectively, and the input end of described the first transistor is connected to the ground;
The input end of described transistor seconds is connected with the first power supply, and the mouth of described transistor seconds is respectively with the input end of described testing circuit and be connected with far-end load;
Second end of described first resistance is connected with described first power supply.
3. flash driving circuit according to claim 2, is characterized in that, described testing circuit comprises the second resistance;
The first end of described second resistance is connected with described first power supply, and the second end of described second resistance is connected with the mouth of described transistor seconds and the input end of described controller respectively.
4. flash driving circuit according to claim 2, is characterized in that, described testing circuit comprises the 3rd resistance, the 4th resistance, the 5th resistance, third transistor and the 6th resistance;
The first end of described 3rd resistance is connected with described first power supply, and the second end of described 3rd resistance is connected with the mouth of described transistor seconds and the first end of described 4th resistance respectively;
Second end of described 4th resistance is connected with the control end of described third transistor and the first end of described 5th resistance respectively, second end of described 5th resistance is respectively with the input end of described third transistor and be connected to the ground, the mouth of described third transistor is connected with the input end of described controller and the first end of described 6th resistance respectively, and the second end of described 6th resistance is connected with second source.
5. flash driving circuit according to claim 2, it is characterized in that, described the first transistor is NPN aerotron, the control end of described the first transistor is the base stage of described NPN aerotron, the mouth of described the first transistor is the collecting electrode of described NPN aerotron, and the input end of described the first transistor is the emitter of described NPN aerotron.
6. the flash driving circuit according to any one of claim 2-4, it is characterized in that, described transistor seconds is PMOS, the control end of described transistor seconds is the grid of described PMOS, the input end of described transistor seconds is the source electrode of described PMOS, and the mouth of described transistor seconds is the drain electrode of described PMOS.
7. flash driving circuit according to claim 4, it is characterized in that, described third transistor is NPN aerotron, the control end of described third transistor is the base stage of described NPN aerotron, the mouth of described third transistor is the collecting electrode of described NPN aerotron, and the input end of described third transistor is the emitter of described NPN aerotron.
8. flash driving circuit according to claim 4, it is characterized in that, described controller comprises power end, ground terminal and two universal input/output interfaces, described power end is connected with described second source, described ground terminal is connected to the ground, one of them universal input/output interface is as the mouth interface of described controller, and another universal input/output interface is as the input end interface of described controller.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520058073.6U CN204712991U (en) | 2015-01-28 | 2015-01-28 | A kind of flash driving circuit |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201520058073.6U CN204712991U (en) | 2015-01-28 | 2015-01-28 | A kind of flash driving circuit |
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| CN204712991U true CN204712991U (en) | 2015-10-21 |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105242612A (en) * | 2015-11-05 | 2016-01-13 | 中国船舶重工集团公司第七一六研究所 | Vehicle-mounted display terminal with real-time data storage function and method thereof |
| CN106564447A (en) * | 2016-10-26 | 2017-04-19 | 乐视控股（北京）有限公司 | High-end drive circuit and vehicle-mounted electronic system |
| JP2017124728A (en) * | 2016-01-13 | 2017-07-20 | 日立オートモティブシステムズ株式会社 | On-vehicle control device |
-
2015
- 2015-01-28 CN CN201520058073.6U patent/CN204712991U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105242612A (en) * | 2015-11-05 | 2016-01-13 | 中国船舶重工集团公司第七一六研究所 | Vehicle-mounted display terminal with real-time data storage function and method thereof |
| JP2017124728A (en) * | 2016-01-13 | 2017-07-20 | 日立オートモティブシステムズ株式会社 | On-vehicle control device |
| CN106564447A (en) * | 2016-10-26 | 2017-04-19 | 乐视控股（北京）有限公司 | High-end drive circuit and vehicle-mounted electronic system |
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Address after: 4 / F, building 1, No.14 Jiuxianqiao Road, Chaoyang District, Beijing 100020 Patentee after: Beijing Jingwei Hengrun Technology Co., Ltd Address before: 100101 Beijing city Chaoyang District Anxiang Beili 11 B block 8 layer of Beijing Jingwei Hengrun Technology Co. Ltd. Patentee before: Beijing Jingwei HiRain Technologies Co.,Ltd. |