CN204707140U - Based on the base band signal process platform of software radio - Google Patents

Based on the base band signal process platform of software radio Download PDF

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Publication number
CN204707140U
CN204707140U CN201520216490.9U CN201520216490U CN204707140U CN 204707140 U CN204707140 U CN 204707140U CN 201520216490 U CN201520216490 U CN 201520216490U CN 204707140 U CN204707140 U CN 204707140U
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China
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pin
digital
programmable gate
gate array
field programmable
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CN201520216490.9U
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Chinese (zh)
Inventor
李兴广
陈磊
韩太林
陈殿仁
陈帅坤
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Changchun University of Science and Technology
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Changchun University of Science and Technology
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Abstract

The utility model provides a kind of base band signal process platform based on software radio, the IF interface module comprising digital signal processor, the field programmable gate array be connected with digital signal processor and be connected with field programmable gate array, IF interface module comprises digital up converter and digital down converter; Wherein, digital signal processor is used for carrying out coded modulation or demodulating and decoding to digital baseband signal; Field programmable gate array is used for carrying out programming in logic to the digital baseband signal through coded modulation or demodulating and decoding; Digital up converter is used for the digital baseband signal through programming in logic to be converted to analog intermediate frequency signal; Digital down converter for receiving described analog intermediate frequency signal, and is converted into digital baseband signal.Utilize the utility model, various wireless communication function can be realized by the loading of software, make base band signal process platform have highly versatile, flexible structure, have the scalable and reconfigurable ability of stronger software.

Description

Based on the base band signal process platform of software radio
Technical field
The utility model relates to a kind of communication transmission technology of data radio station, more specifically, relate to a kind of single carrier based on software radio or OFDM (Orthogonal Frequency Division Multiplexing, OFDM) transmission technology.
Background technology
Along with the fast development of science and technology, radiotechnics gets more and more people's extensive concerning as a kind of new communication system.In radiotechnics, digital radio transfer of data radio station (abbreviation data radio station) is widely used, data radio station refers to by DSP (Digital Signal Processing, Digital Signal Processing) the high-performance expert data transmission radio station that realizes of technology and radiotechnics, but there is following problem in existing data radio station:
1, data radio station is all made up of hardware, there is the shortcoming of hardware configuration function singleness, poor expandability;
2, the system band width of data platform, the data type of process is single, and when transmitting different types of data, the error rate is higher, and transmission rate is slow, time delay is high.
Utility model content
In view of the above problems, the purpose of this utility model is to provide a kind of base band signal process platform based on software radio, to solve the problems such as existing data radio station hardware configuration function singleness, poor expandability.
The utility model provides a kind of base band signal process platform based on software radio, comprises
For carrying out the digital signal processor of coded modulation or demodulating and decoding to digital baseband signal, it comprises 15, C [14,0], D [15,0] and A [13,0] pin;
For carrying out the field programmable gate array of programming in logic to the digital baseband signal through coded modulation or demodulating and decoding, it comprises P [20,34], P [39,54], P [70,83], P55, P [0,15], P18, P19, P35, P36, P [85,99], P37, P38, P60 and P62 pin;
For the digital baseband signal through programming in logic being converted to the digital up converter of analog intermediate frequency signal, it comprise D [15,0], 40,41,70,80 and 81 pins;
For receiving analog intermediate frequency signal and being converted into the digital down converter of digital baseband signal, it comprises T4, PA [15,0], A8, A9, B8, N6, AIN+ and AIN-pin; Wherein,
15 pins of digital signal processor are connected with the P55 pin of field programmable gate array;
C [14, the 0] pin of digital signal processor and P [20, the 34] pin of field programmable gate array are connected;
D [15, the 0] pin of digital signal processor and P [39, the 54] pin of field programmable gate array are connected;
A [13, the 0] pin of digital signal processor and P [70, the 83] pin of described field programmable gate array are connected;
P [0, the 15] pin of field programmable gate array and D [15, the 0] pin of digital up converter are connected;
The P18 pin of field programmable gate array is connected with 40 pins of digital up converter;
The P19 pin of field programmable gate array is connected with 41 pins of digital up converter;
The P35 pin of field programmable gate array is connected with 70 pins of digital up converter;
P [85, the 99] pin of field programmable gate array and PA [15, the 0] pin of digital down converter are connected;
The P36 pin of field programmable gate array is connected with the T4 pin of digital down converter;
The P37 pin of field programmable gate array is connected with the A8 pin of digital down converter;
The P38 pin of field programmable gate array is connected with the A9 pin of digital down converter;
The P60 pin of field programmable gate array is connected with the B8 pin of digital down converter;
The P62 pin of field programmable gate array is connected with the N6 pin of digital down converter.
In addition, preferred structure is, digital signal processor has the EMIF interface be connected with field programmable gate array.
In addition, preferred structure is, the type of digital baseband signal is audio frequency, message or image.
Moreover preferred structure is, digital signal processor also comprises PU, DP, DN and USBVDD pin for connection data interface; Digital up converter also comprises analog signal output pin 80 and 81; Digital down converter also comprises analog signal input pin AIN+ and AIN-.
The base band signal process platform based on software radio utilizing the utility model to provide, the beneficial effect that can obtain is as follows:
1, the data type diversity of process, comprises the categorical datas such as image, audio frequency, message;
2, the mode combined based on software and radio technique and DSP technology realizes, and can realize various wireless communication function by the loading of software;
3, software is scalable reconfigurable, highly versatile, flexible structure.
4, the system bandwidth of this processing platform is wider, and the transmission rate of data is fast, time delay is low, the error rate is low.
Accompanying drawing explanation
By reference to the content below in conjunction with the description of the drawings and claims, and understand more comprehensively along with to of the present utility model, other object of the present utility model and result will be understood and easy to understand more.In the accompanying drawings:
Fig. 1 is the structural representation of the base band signal process platform based on software radio according to the utility model embodiment;
Fig. 2 be according to each components and parts of the utility model embodiment between connected mode schematic diagram.
Reference numeral wherein comprises: digital signal processor 1, field programmable gate array 2, IF interface module 3, digital up converter 4, digital down converter 5.
Label identical in all of the figs indicates similar or corresponding feature or function.
Embodiment
In the following description, for purposes of illustration, in order to provide the complete understanding to one or more embodiment, many details have been set forth.But, clearly, also these embodiments can be realized when there is no these details.In other example, one or more embodiment for convenience of description, known structure and equipment illustrate in block form an.
Below with reference to accompanying drawing, specific embodiment of the utility model is described in detail.
First the technical term in the utility model is made explanations:
DSP (digital signal processing): i.e. Digital Signal Processing, be the theory and technology processed signal by the mode of numerical computations, the object of Digital Signal Processing measures or filtering the continuous analog signal of real world.
FPGA (Field-Programmable Gate Array): i.e. field programmable gate array, it is the product further developed on the basis of the programming devices such as PAL, GAL, CPLD, it occurs as a kind of semi-custom circuit in application-specific integrated circuit (ASIC) (ASIC) field, both solve the deficiency of custom circuit, overcome again the shortcoming that original programming device gate circuit number is limited.
General plotting of the present utility model has opening, standardization, modular general hardware platform by the combined structure one of DSP technology and software and radio technique, realize various radio communication function, as working frequency range, modulation /demodulation type, data format, encryption mode, communication protocol etc., come with software programming.The platform that this hardware platform is available software control and defines, selects different software module just can realize different functions, and software can be upgraded renewal, and its hardware also can constantly update module and upgrading as computer.Due to the various function software simulating of software radio, if as long as new business or modulation system will be realized increase a new software module.Meanwhile, because hardware platform can form various modulation waveform and communication protocol, thus can also with the various station telecommunications of old system, the life cycle in radio station can be extended, simultaneously cost-saving spending.
Foregoing contemplates an overall framework of the present utility model, under this framework, the framework mode of dsp chip (digital signal processor)+fpga chip (field programmable gate array) is adopted to form the base band signal process platform based on software radio of the present utility model.
Particularly, Fig. 1 shows the structure of the base band signal process platform based on software radio of the utility model embodiment.
As shown in Figure 1, the base band signal process platform based on software radio of the utility model embodiment comprises digital signal processor 1, field programmable gate array 2 and IF interface module 3, digital signal processor 1 is connected with field programmable gate array 2, and field programmable gate array 2 is connected with IF interface module 3.
Digital signal processor 1 gathers outside digital baseband signal by data-interface, encodes and modulates, then send field programmable gate array 2 to the digital baseband signal collected; Wherein, the coding of digital signal processor 1 pair of digital baseband signal comprises source coding and channel coding, comprise 16QAM modulation and OFDM modulation to the modulation of digital baseband signal, digital signal processor 1 pair of digital baseband signal carries out coded modulation and must perform according to the order of message sink coding, chnnel coding, 16QAM modulation, OFDM modulation.Corresponding with coded modulation, carrying out demodulating and decoding to digital baseband signal must perform according to the order of OFDM demodulation, 16QAM demodulation, channel-decoding, source coding.
The digital baseband signal that field programmable gate array 2 pairs of digital signal processors 1 send carries out programming in logic, programming in logic comprises the restructuring of the conversion of data format, the framing of data and data link, digital baseband signal is being carried out in the process of programming in logic, must according to this operation in tandem of restructuring of the framing of the conversion of data format, data and data link.
IF interface module 3 comprises digital up converter 4 and digital down converter 5, digital up converter 4 can convert digital baseband signal to analog intermediate frequency signal, and analog intermediate frequency signal can be converted to digital baseband signal by digital down converter 5, as can be seen here, the base band signal process platform based on software radio provided of the present utility model can realize two functions:
1, gather outside digital baseband signal, a series of process formation analog intermediate frequency signal is carried out to it and launches;
2, receive aforementioned analog intermediate frequency signal, it is carried out to the inverse process of aforementioned processing, the digital baseband signal required for final formation.
As can be seen from above-mentioned two functions, the base band signal process platform based on software radio provided of the present utility model needs pairing to use, principle is received based on one one, this processing platform can have separately digital up converter or digital down converter, realize single sending out or receive function, also can have digital up converter or digital down converter simultaneously, realize transmitting-receiving difunctional.
For the emission function of the base band signal process platform based on software radio that the utility model provides, its flow chart of data processing is:
1) digital signal processor 1 is by the outside digital baseband signal transmitted of data-interface collection, and carries out message sink coding, chnnel coding, 16QAM modulation, OFDM modulation to digital baseband signal;
2) digital signal processor 1 sends the digital baseband signal processed to field programmable gate array 2;
3) field programmable gate array 2 pairs of digital baseband signals carry out programming in logic, and its order is the restructuring of the conversion of data format, the framing of data and data link;
4) digital baseband signal through programming in logic is sent to digital up converter 4 by field programmable gate array 2;
5) digital up converter 4 pairs of digital baseband signals carry out interpolation, filtering, D/A switch, form analog intermediate frequency signal;
It should be noted that, interpolation refers to that the interpolation filter carried by digital up converter 4 carries out interpolation filtering, moves baseband signal on intermediate-frequency band after mixing.
6) analog intermediate frequency signal of formation is launched by digital up converter 4.
For the receiving function of the base band signal process platform based on software radio that the utility model provides, its flow chart of data processing is:
1) digital down converter 5 receives the analog intermediate frequency signal that digital up converter 4 is launched, and carries out analog/digital conversion, mixing, extraction, filtering process to analog intermediate frequency signal, and analog intermediate frequency signal is converted into digital baseband signal;
2) digital baseband signal converted to is sent to field programmable gate array 2 by digital down converter 5;
3) field programmable gate array 2 pairs of digital baseband signals carry out the conversion of data format, the framing of data, the restructuring process of data link;
4) field programmable gate array 2 pairs of digital baseband signals carry out programming in logic, and order is the restructuring of the conversion of data format, the framing of data and data link;
5) digital baseband signal through programming in logic is sent to digital signal processor 1 by field programmable gate array 2;
6) digital signal processor 1 pair of digital baseband signal carries out OFDM demodulation, 16QAM demodulation, channel-decoding, source coding;
7) digital baseband signal sends out through the data-interface of digital signal processor 1.
Foregoing describes the operation principle of the base band signal process platform based on software radio that the utility model provides in detail, will describe the connected mode of each components and parts in processing platform in detail below.
Connected mode between Fig. 2 shows according to each components and parts of the utility model embodiment.As shown in Figure 2, digital signal processor 1 is the dsp chip (hereinafter referred to as dsp chip) of TMS320VC5509 model, field programmable gate array 2 is the fpga chip (hereinafter referred to as fpga chip) of XC6SLX9 model, digital up converter 4 is AD9957 model (hereinafter referred to as AD9957), digital down converter 5 is AD6654 model (hereinafter referred to as AD6654), it should be noted that, the model of each components and parts is also not only confined to model illustrated in fig. 2.
Dsp chip carries EMIF interface, EMIF interface can realize dsp chip and be connected with dissimilar memory, generally be connected with fpga chip, can realize two way high speed data communications, data communication specifically comprises data/address bus, control bus communicates with address bus.
As shown in Figure 2, dsp chip comprise PU, DP, DN, USBVDD, 15, C [14,0], D [15,0] and A [13,0] pin; Fpga chip comprises P [20,34], P [39,54], P [70,83], P55, P [0,15], P18, P19, P35, P36, P [85,99], P37, P38, P60 and P62 pin; AD9957 comprise D [15,0], 40,41,70,80 and 81 pins; AD6654 comprises T4, PA [15,0], A8, A9, B8, N6, AIN+ and AIN-pin.
Wherein, PU, DP, DN and USBVDD tetra-pins of dsp chip are connected with data-interface (being USB interface in Fig. 2), realize the function that dsp chip and external data are transmitted;
15 pins of dsp chip are connected with the P55 pin of fpga chip, for fpga chip provides time clock feature;
C [14, the 0] pin of dsp chip and P [20, the 34] pin of fpga chip are connected, and are control line, realize the function controlling fpga chip;
D [15, the 0] pin of dsp chip and P [39, the 54] pin of fpga chip are connected, and are the function of data wire, both realizations transfer of data;
A [13, the 0] pin of dsp chip and P [70, the 83] pin of fpga chip are connected, and are address wire, realize addressing function, guarantee that the data of DSP can correctly be stored in fpga chip.
The above-mentioned connected mode describing dsp chip and fpga chip in detail, below by illustrate fpga chip respectively with the connected mode of AD9957 and AD6654.
The connected mode of fpga chip and AD9957 is:
P [0, the 15] pin of fpga chip and D [15, the 0] pin of AD9957 are connected, and realize the function of transfer of data;
The P18 pin of fpga chip is connected with 40 pins of AD9957, is parallel data clock signal;
The P19 pin of fpga chip is connected with 41 pins of AD9957, realizes fpga chip and sends enable signal to AD9957;
The P35 pin of fpga chip is connected with 70 pins of AD9957, is chip selection signal, effective during low level.
It should be noted that, 80,81 pins of AD9957 are analog signal output pin.
The connected mode of fpga chip and AD6654 is:
P [85, the 99] pin of fpga chip and PA [15, the 0] pin of AD6654 are connected, and are parallel data transmission pin;
The P36 pin of fpga chip is connected with the T4 pin (PCLK) of AD6654, is parallel clock signal, for parallel data transmission provides clock;
The P37 pin of fpga chip is connected with the A8 pin of AD6654, is parallel port A orthogonal signalling control pin in the same way;
The P38 pin of fpga chip is connected with the A9 pin of AD6654, is parallel port A gain instruction pin;
The P60 pin of fpga chip is connected with the B8 pin of AD6654, is the answer signal pin of parallel A port, effective during high level;
The P62 pin of fpga chip is connected with the N6 pin of AD6654, is the request signal pin of parallel A port, effective during high level.
It should be noted that, AIN+, AIN-pin of AD6654 is analog signal input pin, is also analog/digital conversion input channel.
Above content describes the base band signal process platform based on software radio that the utility model provides in detail, modularization, standardized hardware cell are connected with bus mode, base band signal process platform is constituted with this, various wireless communication function is realized by the loading of software, base band signal process platform of the present utility model is made to have highly versatile, flexible structure, has stronger software scalable with advantages such as reconfigurable abilities.
In practical application scene, the system bandwidth of the base band signal process platform based on software radio that the utility model provides can rise to 4MHZ to 20MHz, the type of transmission data can be image, audio frequency or message, when wire data type is different, the error rate of audio frequency can be reduced to BER<10 -3~ 10 -2, the error rate of image can be reduced to BER<10 -6, the error rate of message can be reduced to BER<10 -9.The maximum translational speed of receiving terminal can reach 160Km/h, and the catcher speed of user can reach 512kbps, and the maximum multipath time delay of transfer of data is 200ns, and net-working standard uses frequency division multiplexing.
The above; be only embodiment of the present utility model; but protection range of the present utility model is not limited thereto; anyly be familiar with those skilled in the art in the technical scope that the utility model discloses; change can be expected easily or replace, all should be encompassed within protection range of the present utility model.Therefore, protection range of the present utility model should described be as the criterion with the protection range of claim.

Claims (4)

1., based on a base band signal process platform for software radio, it is characterized in that, comprising:
For carrying out the digital signal processor of coded modulation or demodulating and decoding to digital baseband signal, it comprises 15, C [14,0], D [15,0] and A [13,0] pin;
For carrying out the field programmable gate array of programming in logic to the digital baseband signal through coded modulation or demodulating and decoding, it comprises P [20,34], P [39,54], P [70,83], P55, P [0,15], P18, P19, P35, P36, P [85,99], P37, P38, P60 and P62 pin;
For the digital baseband signal through programming in logic being converted to the digital up converter of analog intermediate frequency signal, it comprise D [15,0], 40,41,70,80 and 81 pins;
For receiving described analog intermediate frequency signal and being converted into the digital down converter of digital baseband signal, it comprises T4, PA [15,0], A8, A9, B8, N6, AIN+ and AIN-pin; Wherein,
15 pins of described digital signal processor are connected with the P55 pin of described field programmable gate array;
C [14, the 0] pin of described digital signal processor and P [20, the 34] pin of described field programmable gate array are connected;
D [15, the 0] pin of described digital signal processor and P [39, the 54] pin of described field programmable gate array are connected;
A [13, the 0] pin of described digital signal processor and P [70, the 83] pin of described field programmable gate array are connected;
P [0, the 15] pin of described field programmable gate array and D [15, the 0] pin of described digital up converter are connected;
The P18 pin of described field programmable gate array is connected with 40 pins of described digital up converter;
The P19 pin of described field programmable gate array is connected with 41 pins of described digital up converter;
The P35 pin of described field programmable gate array is connected with 70 pins of described digital up converter;
P [85, the 99] pin of described field programmable gate array and PA [15, the 0] pin of described digital down converter are connected;
The P36 pin of described field programmable gate array is connected with the T4 pin of described digital down converter;
The P37 pin of described field programmable gate array is connected with the A8 pin of described digital down converter;
The P38 pin of described field programmable gate array is connected with the A9 pin of described digital down converter;
The P60 pin of described field programmable gate array is connected with the B8 pin of described digital down converter;
The P62 pin of described field programmable gate array is connected with the N6 pin of described digital down converter.
2., as claimed in claim 1 based on the base band signal process platform of software radio, it is characterized in that,
Described digital signal processor has the EMIF interface be connected with described field programmable gate array.
3., as claimed in claim 1 based on the base band signal process platform of software radio, it is characterized in that,
The type of described digital baseband signal is audio frequency, message or image.
4., as claimed in claim 1 based on the base band signal process platform of software radio, it is characterized in that,
Described digital signal processor also comprises PU, DP, DN and USBVDD pin for connection data interface;
Described digital up converter also comprises analog signal output pin 80 and 81;
Described digital down converter also comprises analog signal input pin AIN+ and AIN-.
CN201520216490.9U 2015-04-10 2015-04-10 Based on the base band signal process platform of software radio Expired - Fee Related CN204707140U (en)

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Application Number Priority Date Filing Date Title
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