CN204650517U - Based on the usb data harvester of PDIUSBD12 - Google Patents

Abstract

The utility model discloses a kind of usb data harvester based on PDIUSBD12, built-in single chip machine controlling circuit and parallel interface.Single chip machine controlling circuit is the embedded system of STM32F103ZE microprocessor chip and peripheral circuit composition thereof.Parallel interface comprises PDIUSBD12 chip and peripheral circuit thereof, and PC0 ~ PC7 interface correspondence of eight bit parallel bi-directional data mouth DATA0 ~ DATA7 and STM32F103ZE chips of PDIUSBD12 chip is electrically connected.The utility model has the following advantages compared to existing technology: the utility model adopts microcontroller STM32F103ZE chip module to control PDIUSBD12 interface chip and PC carries out data communication.Adopt usb bus to replace RS232 universal serial bus, carry out USB data transmission, fast operation, low cost of manufacture.

Description

Based on the usb data harvester of PDIUSBD12

Technical field

The utility model relates to usb data harvester, in particular a kind of usb data harvester based on PDIUSBD12.

Background technology

Along with society's science and technology and the develop rapidly of computer technology, USB as a kind of novel bus standard, by means of its plurality of advantages plug and play, interface extensible etc., thus obtain and popularize rapidly.USB is ubiquitous as RS232 serial line interface.The release of usb protocol, makes the data communication interface of increasing electronic equipment all bring into use communication protocol to carry out data communication, as the data port etc. of USB flash disk, mobile phone.Current is microcontroller with USB interface for an exploitation USB device a lot of class, some microcontroller only increases the general-purpose chip of USB interface to realize usb communication function, and another kind of be exactly pure USB interface chip, an external microcontroller is needed to control, because its cost is low, it is flexible to select, reliability is high therefore gain great popularity.Therefore the usb data harvester designing a kind of built-in microcontroller is necessary.

Utility model content

The utility model is that provide a kind of usb data harvester based on PDIUSBD12, fast operation, production cost is low in order to avoid the weak point that exists in above-mentioned prior art.

The utility model be technical solution problem by the following technical solutions: a kind of usb data harvester based on PDIUSBD12, comprise housing, built-in single chip machine controlling circuit and parallel interface in described housing, described single chip machine controlling circuit is the embedded system of microprocessor chip and peripheral circuit composition thereof, the signal output part of described single chip machine controlling circuit and the signal input part of described parallel interface are electrically connected, it is characterized in that: described microprocessor chip is STM32F103ZE chip, described parallel interface comprises PDIUSBD12 chip and peripheral circuit thereof, PC0 ~ PC7 interface correspondence of eight bit parallel bi-directional data mouth DATA0 ~ DATA7 and STM32F103ZE chips of described PDIUSBD12 chip is electrically connected.

As the further optimization of such scheme, described parallel interface comprises clock input circuit, and described clock input circuit comprises electric capacity C31, electric capacity C47 and passive crystal oscillator.Described clock input circuit provides the clock needed for work to input for PDIUSBD12 chip.

As the further optimization of such scheme, built-in analog transceiver, voltage regulator, PLL phaselocked loop, bit clock restoring circuit, PHILIPS serial interface circuit, SOFTConnect, GoodLink indicating circuit, Memory Management Unit, integrated RAM and parallel and DMA interface circuit in the PDIUSBD12 chip of described parallel interface.

As the further optimization of such scheme, described reset circuit comprises electric capacity C12, switch S 2 and resistance R12.

As the further optimization of such scheme, described power circuit comprises diode D3, power switch JP1, electric capacity C35 and C5, LM1117-3.3V voltage stabilizing chip, electric capacity C3 and C6, resistance R10 and light emitting diode Ds1, is provided with described diode D3 between described power switch JP1 and external power supply J1.

Compared with the prior art, the utility model beneficial effect is embodied in: a kind of usb data harvester based on PDIUSBD12 of the present utility model, adopts 32 8-digit microcontroller STM32F103ZE chip modules of STM32 series to carry out docking port chip and carries out control and PC carries out data communication.Usb bus should be adopted to replace RS232 universal serial bus based on the usb data harvester of PDIUSBD12, carry out USB data transmission, fast operation.

Accompanying drawing explanation

Fig. 1 is the circuit theory diagrams of single chip machine controlling circuit of the present utility model.

Fig. 2 is the circuit theory diagrams of parallel interface of the present utility model.

Fig. 3 is the circuit theory diagrams of the reset circuit in single chip machine controlling circuit of the present utility model.

Fig. 4 is the circuit theory diagrams of the power circuit in single chip machine controlling circuit of the present utility model.

Embodiment

Below embodiment of the present utility model is elaborated; the present embodiment is implemented under premised on technical solutions of the utility model; give detailed embodiment and concrete operating process, but protection domain of the present utility model is not limited to following embodiment.

Based on a usb data harvester of PDIUSBD12, comprise housing, built-in single chip machine controlling circuit and parallel interface in housing.Single chip machine controlling circuit is the embedded system of microprocessor chip and peripheral circuit composition thereof, and the signal output part of single chip machine controlling circuit and the signal input part of described parallel interface are electrically connected.

See the circuit theory diagrams that Fig. 1, Fig. 1 are single chip machine controlling circuits of the present utility model.The microprocessor chip that usb data harvester based on PDIUSBD12 of the present utility model adopts is STM32F103ZE chip.STM32F103ZE represents 32 8-digit microcontrollers of Cortex-M3 kernel.STM32 series is based on aiming at the embedded custom-designed ARM Cortex-M3 kernel requiring that performance is high, cost is low, low in energy consumption.STM32F103ZE is STM32F103XX enhancement mode series, and clock frequency reaches 72MHz, and it is the product of peak performance in like product.The enhancing I/O port that Embedded enriches and the peripheral hardware relating to two APB buses.Storer Flash wherein on sheet is the highest nearly can reach 64KB to 512KB, SRAM.All equipment all has the communication interface of standard, as 3 SPI interfaces and 5 USART interfaces.And ARM Cortex-M3 is also integrated with the ADC of two 12, the binary channels DAC of 1 12, the timer of 11 16.The microcontroller chip that usb data harvester based on PDIUSBD12 of the present utility model adopts is STM32F103ZE singlechip chip.The pin distribution of STM32F103ZE chip as shown in Figure 1, the pin of STM32F103ZE singlechip chip totally 144, usb data harvester based on PDIUSBD12 of the present utility model employs the pin of its part, comprises PB0, PB2, PB5, PB6, PC0 ~ PC7, PA4 and PA5.

In this preferred embodiment, the power circuit that single chip machine controlling circuit comprises STM32F103ZE chip, reset circuit, crystal oscillating circuit, SWD emulator and powers for foregoing circuit.Reset circuit comprises electric capacity C12, switch S 2 and resistance R12, see Fig. 3.Hand-reset is by switch S 2, and when S2 closes, short circuit, two ends level is all low mutually, at this moment resets.And electrification reset, be because work as power on circuitry in a flash, the both end voltage of magnetic sheet electric capacity can not be suddenlyd change, and keeps low level then to have the function of electrification reset.Crystal oscillating circuit provides clock signal for single-chip microcomputer, and of the present utility model is 72MHz crystal oscillator based on the frequency of operation of STM32 in the usb data harvester of PDIUSBD12.

Power circuit comprises diode D3, power switch JP1, electric capacity C35 and C5, LM1117-3.3V voltage stabilizing chip, electric capacity C3 and C6, resistance R10 and light emitting diode Ds1, see Fig. 4.Be provided with diode D3 between power switch JP1 and external power supply J1, object is in order to protection circuit.Electric capacity is then the effect playing filtering, by+5V photovoltaic conversion being become the 3.3V voltage of STM32F103ZE chip operation.

See the circuit theory diagrams that Fig. 2, Fig. 2 are parallel interfaces of the present utility model.Usb data harvester based on PDIUSBD12 of the present utility model, parallel interface comprises PDIUSBD12 chip and peripheral circuit thereof.PDIUSBD12 chip is the common interface chip that a sexual valence of Dutch Philips (Philips) semiconductor company is higher, is to use one of maximum chip at USB1.1 protocol devices end.In this preferred embodiment, parallel interface comprises PDIUSBD12 chip and peripheral circuit thereof, and PC0 ~ PC7 interface correspondence of eight bit parallel bi-directional data mouth DATA0 ~ DATA7 and STM32F103ZE chips of PDIUSBD12 chip is electrically connected.

Optimize, built-in analog transceiver, voltage regulator, PLL phaselocked loop, bit clock restoring circuit, PHILIPS serial interface circuit, SOFTConnect, GoodLink indicating circuit, Memory Management Unit, integrated RAM and parallel and DMA interface circuit in the PDIUSBD12 chip of parallel interface.Wherein, the analog transceiver in PDIUSBD12 chip is connected with USB cable by terminal resistance.Described voltage regulator is the regulator of a 3.3V integrated in PDIUSBD12 chip, and for the power supply of analog transceiver electricity, this voltage regulator can be used as to export and is connected on the outside pull-up resistor of 1.5 kilo-ohms.Described PLL phaselocked loop is the PLL of 6MHz to 48MHz integrated in PDIUSBD12 chip, and use 6MHz crystal oscillator at low cost, EMI also can reduce, and the work of PLL need not outer member.Institute bit clock recovers, and uses 4X over-sampling rule, from usb data stream, recover clock signal in PDIUSBD12 chip, to trace in scope that USB specify all frequency drifts and shakes.

GoodLink, for providing USB to indicate, such as, in the process enumerated, LED can indirectly flicker, and after being successfully completed and enumerating and configure, LED will be bright always, and the successful transmission subsequently and between D12 will close LED, suspended state, and LED also closes.Memory Management Unit and integrated RAM: when being connected with STM32F103ZE chip parallel port, MMU and integrated RAM, as the buffer zone of speed difference between USB, is convenient to microcontroller and is carried out read and write with its intrinsic speed to USB packets of information.Walk abreast and DMA interface circuit, the interface be directly connected with microcontroller, for a microcontroller, D12 is with the memory device of 8 bit data bus and an address bit as one, D12 supports data and address bus that is multiplexed and non-multiplexed, support that the DMA directly read between main side point and local RAM transmits, also support the DMA transmission of monocycle and burst mode.

Clock input circuit comprises electric capacity C31, electric capacity C47 and passive crystal oscillator.Clock input circuit provides the clock needed for work to input for PDIUSBD12 chip.Light emitting diode GoodLink glimmers when proper communication, and PDIUSBD12 look-at-me is interrupting input signal.XTAL1, XTAL2 crystal oscillator end of PDIUSBD12 chip adopts external clock.ALE input pin is position low level all the time, represents that it is single-address/data bus configuration.PDIUSBD12 interrupt pin connects pull-up resistor to 5V pin.Data/address selection position pin the A0 of PDIUSBD12 chip and the pin PB0 of STM32F103ZE chip is electrically connected.The write gate pin WR_N of PDIUSBD12 chip and the pin PB2 of STM32F103ZE chip is electrically connected.The read gate pin RD_N of PDIUSBD12 chip and the pin PB5 of STM32F103ZE chip is electrically connected.The middle-end position pin INT_N of PDIUSBD12 chip and the pin PB6 of STM32F103ZE chip is electrically connected.The reset pin RESET_N of PDIUSBD12 chip and the pin PA4 of STM32F103ZE chip is electrically connected.The sheet of PDIUSBD12 chip selects the pin PA5 of pin CS_N and STM32F103ZE chip to be electrically connected.

A kind of usb data harvester based on PDIUSBD12 of the present utility model, adopts 32 8-digit microcontroller STM32F103ZE chip modules of STM32 series to carry out docking port chip and carries out control and PC carries out data communication.Usb bus should be adopted to replace RS232 universal serial bus based on the usb data harvester of PDIUSBD12, carry out USB data transmission, fast operation.

To those skilled in the art, obvious the utility model is not limited to the details of above-mentioned one exemplary embodiment, and when not deviating from spirit of the present utility model or essential characteristic, can realize the utility model in other specific forms.Therefore, no matter from which point, all should embodiment be regarded as exemplary, and be nonrestrictive, scope of the present utility model is limited by claims instead of above-mentioned explanation, and all changes be therefore intended in the implication of the equivalency by dropping on claim and scope are included in the utility model.Any Reference numeral in claim should be considered as the claim involved by limiting.

In addition, be to be understood that, although this instructions is described according to embodiment, but not each embodiment only comprises an independently technical scheme, this narrating mode of instructions is only for clarity sake, those skilled in the art should by instructions integrally, and the technical scheme in each embodiment also through appropriately combined, can form other embodiments that it will be appreciated by those skilled in the art that.

Claims (6)

1. the usb data harvester based on PDIUSBD12, comprise housing, it is characterized in that: built-in single chip machine controlling circuit and parallel interface in described housing, described single chip machine controlling circuit is the embedded system of microprocessor chip and peripheral circuit composition thereof, the signal output part of described single chip machine controlling circuit and the signal input part of described parallel interface are electrically connected, it is characterized in that: described microprocessor chip is STM32F103ZE chip, described parallel interface comprises PDIUSBD12 chip and peripheral circuit thereof, PC0 ~ PC7 interface correspondence of eight bit parallel bi-directional data mouth DATA0 ~ DATA7 and STM32F103ZE chips of described PDIUSBD12 chip is electrically connected.

2. the usb data harvester based on PDIUSBD12 according to claim 1, is characterized in that: described parallel interface comprises clock input circuit, and described clock input circuit comprises electric capacity C31, electric capacity C47 and passive crystal oscillator.

3. the usb data harvester based on PDIUSBD12 according to claim 1, is characterized in that: built-in analog transceiver, voltage regulator, PLL phaselocked loop, bit clock restoring circuit, PHILIPS serial interface circuit, SOFTConnect, GoodLink indicating circuit, Memory Management Unit, integrated RAM and parallel and DMA interface circuit in the PDIUSBD12 chip of described parallel interface.

4. the usb data harvester based on PDIUSBD12 according to claim 1, is characterized in that: the power circuit that described single chip machine controlling circuit comprises STM32F103ZE chip, reset circuit, crystal oscillating circuit, SWD emulator and powers for foregoing circuit.

5. the usb data harvester based on PDIUSBD12 according to claim 4, is characterized in that: described reset circuit comprises electric capacity C12, switch S 2 and resistance R12.

6. the usb data harvester based on PDIUSBD12 according to claim 4, it is characterized in that: described power circuit comprises diode D3, power switch JP1, electric capacity C35 and C5, LM1117-3.3V voltage stabilizing chip, electric capacity C3 and C6, resistance R10 and light emitting diode Ds1, is provided with described diode D3 between described power switch JP1 and external power supply J1.