CN204559429U - A kind of novel full bridge inverter - Google Patents

A kind of novel full bridge inverter Download PDF

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Publication number
CN204559429U
CN204559429U CN201520117583.6U CN201520117583U CN204559429U CN 204559429 U CN204559429 U CN 204559429U CN 201520117583 U CN201520117583 U CN 201520117583U CN 204559429 U CN204559429 U CN 204559429U
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CN
China
Prior art keywords
effect transistor
field effect
electric capacity
inductance coil
source electrode
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Expired - Fee Related
Application number
CN201520117583.6U
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Chinese (zh)
Inventor
任灵
吴丽珍
周虎
陈建鹏
孙巍巍
张国荣
杨旭生
鲜龙
雷洋洋
杨新华
兰鸿飞
刘智伟
张士科
李祎
谷双
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JINCHANG POWER SUPPLY Co OF STATE GRID GANSU ELECTRIC POWER Co
Lanzhou University of Technology
Original Assignee
JINCHANG POWER SUPPLY Co OF STATE GRID GANSU ELECTRIC POWER Co
Lanzhou University of Technology
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Application filed by JINCHANG POWER SUPPLY Co OF STATE GRID GANSU ELECTRIC POWER Co, Lanzhou University of Technology filed Critical JINCHANG POWER SUPPLY Co OF STATE GRID GANSU ELECTRIC POWER Co
Priority to CN201520117583.6U priority Critical patent/CN204559429U/en
Application granted granted Critical
Publication of CN204559429U publication Critical patent/CN204559429U/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Abstract

The utility model relates to inverter circuit technical field, especially a kind of novel full bridge inverter.It comprises input port, the first field effect transistor, the second field effect transistor, the 3rd field effect transistor and the 4th field effect transistor, 1 end pin of input port is connected with the first inductance coil and is connected by the source electrode of the first inductance coil with the second field effect transistor, the source electrode of the second field effect transistor is connected with the grid of the second field effect transistor by the first bi-directional voltage stabilizing diode with between the first inductance coil, the source electrode of the second field effect transistor is connected with the first electric capacity and the 4th electric capacity by the second inductance coil simultaneously, 4th electric capacity is connected with the grid of the first field effect transistor by the second bi-directional voltage stabilizing diode, the source electrode of the first field effect transistor is connected with the grid of the 3rd field effect transistor by the 3rd bi-directional voltage stabilizing diode, the drain electrode of the 3rd field effect transistor is connected by the grid of the 4th bi-directional voltage stabilizing diode with the 4th field effect transistor.The utility model circuit is simple, easy to operate, has very strong practicality.

Description

A kind of novel full bridge inverter
Technical field
The utility model relates to inverter circuit technical field, especially a kind of novel full bridge inverter.
Background technology
As everyone knows, inverter circuit is corresponding with rectification circuit (Rectifier), direct current is become alternating current and calls inversion.When AC is connected on electrical network, when namely AC is connected to power supply, be called active inversion; When AC is direct and load links, be called passive inverter.
The application of inverter circuit widely.In existing various power supply, storage battery, dry cell, solar cell etc. are all DC power supply, when these power supplys of needs are powered to AC load, just need inverter circuit.In addition, the power electronic equipments such as speed regualtion of AC motor frequency converter, uninterrupted power supply, induction heating power use widely, and the core of its circuit is all inverter circuit.Its basic role is, under the control of control circuit, the DC power supply that intermediate DC circuit exports is converted to frequency and voltage AC power adjustable all arbitrarily.But inverter circuit is perfect not enough at present, and the field effect transistor in circuit can not realize quick open and close.
Utility model content
For above-mentioned the deficiencies in the prior art, the purpose of this utility model is to provide a kind of novel full bridge inverter.
To achieve these goals, the utility model adopts following technical scheme:
A kind of novel full bridge inverter, it comprises input port, output port, the first field effect transistor, the second field effect transistor, the 3rd field effect transistor and the 4th field effect transistor;
1 end pin and the 2 end pin of described input port are parallel with the first resistance simultaneously, second resistance, 3rd resistance and the 4th resistance, 1 end pin of described input port is respectively by the first electric capacity and the second electric capacity access power supply and by the 3rd capacity earth, described first electric capacity be connected with the first inductance coil between input port and be connected by the source electrode of the first inductance coil with the second field effect transistor, the source electrode of described second field effect transistor is connected with the grid of the second field effect transistor by the first bi-directional voltage stabilizing diode with between the first inductance coil, the source electrode of described second field effect transistor is connected with the drain electrode of the first field effect transistor and passes through the second inductance coil and is connected with the first electric capacity and the 4th electric capacity simultaneously, described 4th electric capacity is connected with the grid of the first field effect transistor by the second bi-directional voltage stabilizing diode, the source ground of described first field effect transistor is also connected with the grid of the 3rd field effect transistor by the 3rd bi-directional voltage stabilizing diode, the drain electrode of described 3rd field effect transistor is connected with the source electrode of the second inductance coil and the 4th field effect transistor and passes through the 4th bi-directional voltage stabilizing diode simultaneously and is connected with the grid of the 4th field effect transistor, 3 end pin of described output port by the second inductance coil simultaneously with the drain electrode of the first field effect transistor, the source electrode of the second field effect transistor, the source electrode of drain electrode the 4th field effect transistor of the 3rd field effect transistor connects, 1 end pin of described output port is connected with 2 end pin of input port.
Preferably, described first field effect transistor, the second field effect transistor, the 3rd field effect transistor and the 4th field effect transistor are the IGBT field effect transistor of band damper diode.
Owing to have employed such scheme, the utility model is by the first bi-directional voltage stabilizing diode, the second bi-directional voltage stabilizing diode, the 3rd bi-directional voltage stabilizing diode and the 4th bi-directional voltage stabilizing diode, make its second field effect transistor, the first field effect transistor, the grid voltage of the 3rd field effect transistor and the 4th field effect transistor is stabilized in positive and negative certain magnitude of voltage, field effect transistor can be opened fast and also can turn off field effect transistor fast; Meanwhile, the first inductance coil and the second inductance coil play the effect of inertial element, and output current can not be changed immediately, and form LC filtering with the first electric capacity, the second electric capacity, the 3rd electric capacity and the 4th electric capacity, its structure is simple, easy to operate, has very strong practicality.
Accompanying drawing explanation
Fig. 1 is the electrical block diagram of the utility model embodiment.
Embodiment
Below in conjunction with accompanying drawing, embodiment of the present utility model is described in detail, but the multitude of different ways that the utility model can be defined by the claims and cover is implemented.
As shown in Figure 1, a kind of novel full bridge inverter, it comprises input port J1, output port J2, the first field effect transistor G1, the second field effect transistor G2, the 3rd field effect transistor G3 and the 4th field effect transistor G4;
1 end pin and the 2 end pin of input port J1 are parallel with the first resistance R1 simultaneously, second resistance R2,3rd resistance R3 and the 4th resistance R4, the 1 end pin of input port J1 accesses power supply respectively by the first electric capacity C1 and the second electric capacity C2 and passes through the 3rd electric capacity C3 ground connection, first electric capacity C1 be connected with the first inductance coil L1 between input port J1 and be connected with the source electrode of the second field effect transistor G2 by the first inductance coil L1, the source electrode of the second field effect transistor G2 is connected with the grid of the second field effect transistor G2 by the first bi-directional voltage stabilizing diode D1 with between the first inductance coil L1, the source electrode of the second field effect transistor G2 is connected with the drain electrode of the first field effect transistor G1 and passes through the second inductance coil L2 and is connected with the first electric capacity C1 and the 4th electric capacity C4 simultaneously, 4th electric capacity C4 is connected with the grid of the first field effect transistor G1 by the second bi-directional voltage stabilizing diode D2, the source ground of the first field effect transistor G1 is also connected with the grid of the 3rd field effect transistor G3 by the 3rd bi-directional voltage stabilizing diode D3, the drain electrode of the 3rd field effect transistor G3 is connected with the source electrode of the second inductance coil L2 and the 4th field effect transistor G4 and passes through the 4th bi-directional voltage stabilizing diode D4 simultaneously and is connected with the grid of the 4th field effect transistor G4, the 3 end pin of output port J2 by the second inductance coil L2 simultaneously with the drain electrode of the first field effect transistor G1, the source electrode of the second field effect transistor G2, the source electrode of drain electrode the 4th field effect transistor G4 of the 3rd field effect transistor G3 connects, the 1 end pin of output port J2 is connected with the 2 end pin of input port J1.
The present embodiment is by the first bi-directional voltage stabilizing diode D1, the second bi-directional voltage stabilizing diode D2, the 3rd bi-directional voltage stabilizing diode D3 and the 4th bi-directional voltage stabilizing diode D4, make its second field effect transistor G2, the first field effect transistor G1, the grid voltage of the 3rd field effect transistor G3 and the 4th field effect transistor G4 is stabilized in positive and negative certain magnitude of voltage, field effect transistor can be opened fast and also can turn off field effect transistor fast; Meanwhile, the first inductance coil L1 and the second inductance coil L2 plays the effect of inertial element, and output current can not be changed immediately, and forms LC filtering with the first electric capacity C1, the second electric capacity C2, the 3rd electric capacity C3 and the 4th electric capacity C4.
In addition, be optimized circuit, the first field effect transistor G1, the second field effect transistor G3 of the present embodiment, the 3rd field effect transistor G3 and the 4th field effect transistor G4 are the IGBT field effect transistor of band damper diode.
The foregoing is only preferred embodiment of the present utility model; not thereby the scope of the claims of the present utility model is limited; every utilize the utility model specification and accompanying drawing content to do equivalent structure or equivalent flow process conversion; or be directly or indirectly used in other relevant technical fields, be all in like manner included in scope of patent protection of the present utility model.

Claims (2)

1. a novel full bridge inverter, is characterized in that: it comprises input port, output port, the first field effect transistor, the second field effect transistor, the 3rd field effect transistor and the 4th field effect transistor;
1 end pin and the 2 end pin of described input port are parallel with the first resistance simultaneously, second resistance, 3rd resistance and the 4th resistance, 1 end pin of described input port is respectively by the first electric capacity and the second electric capacity access power supply and by the 3rd capacity earth, described first electric capacity be connected with the first inductance coil between input port and be connected by the source electrode of the first inductance coil with the second field effect transistor, the source electrode of described second field effect transistor is connected with the grid of the second field effect transistor by the first bi-directional voltage stabilizing diode with between the first inductance coil, the source electrode of described second field effect transistor is connected with the drain electrode of the first field effect transistor and passes through the second inductance coil and is connected with the first electric capacity and the 4th electric capacity simultaneously, described 4th electric capacity is connected with the grid of the first field effect transistor by the second bi-directional voltage stabilizing diode, the source ground of described first field effect transistor is also connected with the grid of the 3rd field effect transistor by the 3rd bi-directional voltage stabilizing diode, the drain electrode of described 3rd field effect transistor is connected with the source electrode of the second inductance coil and the 4th field effect transistor and passes through the 4th bi-directional voltage stabilizing diode simultaneously and is connected with the grid of the 4th field effect transistor, 3 end pin of described output port by the second inductance coil simultaneously with the drain electrode of the first field effect transistor, the source electrode of the second field effect transistor, the source electrode of drain electrode the 4th field effect transistor of the 3rd field effect transistor connects, 1 end pin of described output port is connected with 2 end pin of input port.
2. a kind of novel full bridge inverter as claimed in claim 1, is characterized in that: described first field effect transistor, the second field effect transistor, the 3rd field effect transistor and the 4th field effect transistor are the IGBT field effect transistor of band damper diode.
CN201520117583.6U 2015-02-27 2015-02-27 A kind of novel full bridge inverter Expired - Fee Related CN204559429U (en)

Priority Applications (1)

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CN201520117583.6U CN204559429U (en) 2015-02-27 2015-02-27 A kind of novel full bridge inverter

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Application Number Priority Date Filing Date Title
CN201520117583.6U CN204559429U (en) 2015-02-27 2015-02-27 A kind of novel full bridge inverter

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI713290B (en) * 2019-11-26 2020-12-11 廖益弘 With soft cut two-way power flow converter

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI713290B (en) * 2019-11-26 2020-12-11 廖益弘 With soft cut two-way power flow converter

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CF01 Termination of patent right due to non-payment of annual fee
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Granted publication date: 20150812

Termination date: 20210227