CN204517834U

CN204517834U - Multichannel communication supervisor

Info

Publication number: CN204517834U
Application number: CN201420838681.4U
Authority: CN
Inventors: 林锥; 孙琳琳; 李旭阳
Original assignee: BEIJING JINGYI RENEWABLE ENERGY ENGINEERING CO LTD
Current assignee: BEIJING JINGYI RENEWABLE ENERGY ENGINEERING CO LTD
Priority date: 2014-12-25
Filing date: 2014-12-25
Publication date: 2015-07-29
Anticipated expiration: 2024-12-25

Abstract

The utility model discloses a kind of multichannel communication supervisor, include processor, also comprise external programming in logic chip FPGA on the processor, and at least one communication port expanded on described fpga chip.Compared with prior art, illustrative embodiment of the present utility model comprises following advantage: adopt programming in logic chip FPGA to realize Interface Expanding, expand at least one communication port, achieve the access of the circuit module of one-to-many, designed reliability is high, real-time.

Description

Multichannel communication supervisor

Technical field

The utility model belongs to technical field of communication equipment, particularly relates to multichannel communication supervisor.

Background technology

Current communication processor all adopts single-chip microcomputer microprocessing to realize collection to signal and data and transmission, and owing to being subject to performance and the resource restriction of processor chips interface quantity, the most multipotency of existing processor chips provides 4 serial ports.Prior art generally adopts serial port extended chip to carry out serial ports expansion, or uses the circuit module of fpga chip inside, the pattern one to one that general employing is single, and poor reliability, later maintenance is inconvenient.

Utility model content

In view of this, the utility model aims to provide multichannel communication supervisor, to solve the single pattern one to one of prior art, poor reliability, the problem of later maintenance inconvenience.

The utility model discloses a kind of multichannel communication supervisor, include processor, also comprise external programming in logic chip FPGA on the processor, and the multiple communication port expanded on described fpga chip, described communication port at least also connects respectively with one of lower module: 485 communication modules, 232 communication modules, 487 communication modules, optical fiber; The quantity of often kind of described module or optical fiber is multiple.

Compared with prior art, illustrative embodiment of the present utility model comprises following advantage:

Adopt programming in logic chip FPGA to realize Interface Expanding, expand at least one communication port, achieve the access of the circuit module of one-to-many, designed reliability is high, real-time.

In order to above-mentioned and relevant object, will describe in detail and the feature particularly pointed out in the claims after one or more embodiment comprises.Explanation below and accompanying drawing describe some illustrative aspects in detail, and its instruction is only some modes in the utilizable various mode of principle of each embodiment.Other benefit and novel features become obvious by considering by reference to the accompanying drawings along with detailed description below, and the disclosed embodiments will comprise all these aspects and theirs is equivalent.

Figure of description

Accompanying drawing described herein is used to provide further understanding of the present utility model, and form a application's part, schematic description and description of the present utility model, for explaining the utility model, is not formed improper restriction of the present utility model.In the accompanying drawings:

Fig. 1 is the internal circuit schematic diagram of multichannel communication supervisor of the present utility model;

Fig. 2 is embodiment internal circuit schematic diagram of the present utility model.

Embodiment

The following description and drawings illustrate specific embodiments of the present utility model fully, to enable those skilled in the art to put into practice them.

Below with reference to the accompanying drawings and in conjunction with the preferred embodiments, the utility model is described in detail.

As shown in Figure 1, in some illustrative embodiment, described multichannel communication supervisor, includes processor 1, also comprises: be connected on the programming in logic chip FPGA 2 on described processor 1 outward, and at least one communication port of expansion on described fpga chip 2.

As shown in Figure 2, in some illustrative embodiment, described communication port at least also connects respectively with one of lower module: 485 communication module 7,232 communication module 10,487 communication modules 11, optical fiber 8.

Wherein, as described in Figure 2,485 communication modules 7, optical fiber 8,232 communication module 10,487 communication module 11 are connected with described communication port respectively.

As shown in Figure 1, in some illustrative embodiment, the quantity of often kind of described module or optical fiber is multiple.

Wherein, as shown in Figure 1, described communication port can connect multiple same module, as multiple 485 communication modules 7 with as described in communication port be connected; Multiple optical fiber 8 is connected with described communication port; Or multiple 485 communication modules 7, multiple optical fiber 8 are connected with described communication port respectively.Described 485 communication modules 7 also can be replaced 232 communication modules, 487 communication modules, can arbitrarily replace between communication module and optical fiber.

As shown in Figure 1, in some illustrative embodiment, described multichannel communication supervisor also comprises: the Ethernet chip 3 be connected with described processor 1 respectively and Ethernet interface 6.

As shown in Figure 1, in some illustrative embodiment, described Ethernet chip 3 is connected with described processor 1 by described fpga chip.

As shown in Figure 2, in some illustrative embodiment, also comprise peripheral circuit 5, described peripheral circuit comprises crystal oscillator, internal storage, flash memory, FPGA configuring chip; Described crystal oscillator is multiple, is external on described processor 1, described internal storage, described Ethernet chip 3, described FPGA configuring chip respectively; Described internal storage, described flash memory are connected with described processor; Be connected on described FPGA 2 outside described FPGA configuring chip.

In some illustrative embodiment, also comprise described processor 1 be also connected with for by data upload to the host computer of described multichannel communication supervisor, described processor 1 is connected with described host computer by described Ethernet interface 6.

In some illustrative embodiment, described processor 1 be also connected with for the slave computer that data are downloaded, described processor 1 is connected by described 485 communication modules 7 with between described slave computer.

In some illustrative embodiment, described processor 1 is ARM9 processor.

In some illustrative embodiment, also comprise liquid crystal dot matrix display screen 4, described liquid crystal dot matrix display screen 4 is connected by the I/O pin 9 of processor 1.

The foregoing is only preferred embodiment of the present utility model, be not limited to the utility model, for a person skilled in the art, the utility model can have various modifications and variations.All within spirit of the present utility model and principle, any amendment done, equivalent replacement, improvement etc., all should be included within protection range of the present utility model.

Claims

1. multichannel communication supervisor, include processor, it is characterized in that, also comprise: external programming in logic chip FPGA on the processor, and the multiple communication port expanded on described fpga chip, described communication port at least also connects respectively with one of lower module: 485 communication modules, 232 communication modules, 487 communication modules, optical fiber; The quantity of often kind of described module or optical fiber is multiple.

2. multichannel communication supervisor according to claim 1, is characterized in that, also comprise: the Ethernet chip be connected with described processor respectively and Ethernet interface.

3. multichannel communication supervisor according to claim 2, is characterized in that, described Ethernet chip is connected with described processor by described fpga chip.

4. multichannel communication supervisor according to claim 2, is characterized in that, also comprise peripheral circuit, and described peripheral circuit comprises crystal oscillator, internal storage, flash memory, FPGA configuring chip;

Described crystal oscillator is multiple, is external on described processor, described internal storage, described Ethernet chip, described FPGA configuring chip respectively;

Described internal storage, described flash memory are connected with described processor;

Be connected on described FPGA outside described FPGA configuring chip.

5. multichannel communication supervisor according to claim 2, it is characterized in that, described processor be also connected with for by data upload to the host computer of described multichannel communication supervisor, described processor is connected with described host computer by described Ethernet interface.

6. multichannel communication supervisor according to claim 2, is characterized in that, described processor be also connected with for the slave computer that data are downloaded, be connected by described 485 communication modules between described processor with described slave computer.

7. multichannel communication supervisor according to claim 1, is characterized in that, described processor is ARM9 processor.

8. multichannel communication supervisor according to claim 1, is characterized in that, also comprises liquid crystal dot matrix display screen, and described liquid crystal dot matrix display screen is connected by the I/O pin of processor.