CN204498075U - A kind of radio frequency automatic gain control circuit - Google Patents
A kind of radio frequency automatic gain control circuit Download PDFInfo
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- CN204498075U CN204498075U CN201520276604.9U CN201520276604U CN204498075U CN 204498075 U CN204498075 U CN 204498075U CN 201520276604 U CN201520276604 U CN 201520276604U CN 204498075 U CN204498075 U CN 204498075U
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Abstract
The utility model discloses a kind of radio frequency automatic gain control circuit, comprise radio-frequency front-end amplifying circuit, the input received RF signal of this radio-frequency front-end amplifying circuit, output one tunnel of this radio-frequency front-end amplifying circuit is connected an input of FPGA module after the first AD conversion module through intermediate frequency VGA amplifier, another road is connected another input of described FPGA module through RSSI signal detection module after the second AD conversion module, the gain control signal of described radio-frequency front-end amplifying circuit and intermediate frequency VGA amplifier provides by described FPGA module, described first AD conversion module and the second AD conversion module adopt same AD conversion chip, the front end of this AD conversion chip is provided with signal amplification circuit.Its remarkable result is: carry out analog-to-digital conversion to intermediate-freuqncy signal and RSSI signal respectively by same AD conversion chip, simplify the hardware circuit of rf processing circuitry, reduces it and is embodied as this.
Description
Technical field
The utility model relates to wireless communication signal processing technology field, specifically, is a kind of radio frequency automatic gain control circuit.
Background technology
Automatic growth control (AGC) is a kind of circuit of being used widely in radio system, and its Main Basis negative-feedback principle works, and solves the problem causing penalty in receiving system due to the signal power change received.The main task that it completes is and controls intermediate-freuqncy signal gain size to ensure that the signal amplitude after variable gain amplifier (VGA) is in the full scale working range of ADC substantially.
Impossible reach a larger dynamic range owing to only relying on the VGA at intermediate frequency place, therefore there is people in radio frequency signal processing circuit, add the AGC of radio frequency part, as shown in Figure 1, input is passed through inside FPGA module, extract the magnitude of voltage that RSSI chip exports, intermediate-freuqncy signal after the high, normal, basic third gear of radio frequency AGC controls is between-45dBm ~-20dBm substantially, signal now again after the process of intermediate frequency AGC, then is adjusted by feed-forward AGC and can ensure that signal meets substantially and be operated in ADC range ability.
But, in foregoing circuit, the separately process of intermediate-freuqncy signal and RSSI signal, hardware circuit is complicated, realizes cost higher; In addition, the signal amplitude that the intermediate-freuqncy signal after radio frequency AGC controls and RSSI chip export is lower, does not reach and directly carries out analog-to-digital demand.
Utility model content
For the deficiencies in the prior art, the purpose of this utility model is to provide a kind of radio frequency automatic gain control circuit, intermediate-freuqncy signal after this circuit can control AGC and RSSI signal focus on, not only hardware circuit is simple, realize cost low, and can meet and directly carry out analog-to-digital demand.
For achieving the above object, the technical solution adopted in the utility model is:
A kind of radio frequency automatic gain control circuit, comprise radio-frequency front-end amplifying circuit, the input received RF signal of this radio-frequency front-end amplifying circuit, output one tunnel of this radio-frequency front-end amplifying circuit is connected an input of FPGA module after the first AD conversion module through intermediate frequency VGA amplifier, another road is connected another input of described FPGA module through RSSI signal detection module after the second AD conversion module, the gain control signal of described radio-frequency front-end amplifying circuit and intermediate frequency VGA amplifier provides by described FPGA module, its key is: described first AD conversion module and the second AD conversion module adopt same AD conversion chip, the front end of this AD conversion chip is provided with signal amplification circuit,
Operational amplifier is provided with in described signal amplification circuit, the in-phase input end of this operational amplifier is while be connected with the first output of described intermediate frequency VGA amplifier, and another side series resistor R226 is connected with the output of described RSSI signal detection module with after the first switch element; The inverting input of this operational amplifier, while be connected with the second output of described intermediate frequency VGA amplifier, accesses reference voltage signal after another side series resistor R227 and second switch element;
The control end of described first switch element and second switch element is also connected on the switching signal output of described FPGA module simultaneously.
The radiofrequency signal of reception is amplified by the gain control signal that described radio-frequency front-end amplifying circuit exports according to FPGA module, then intermediate frequency VGA amplifier carries out amplification process according to the intermediate-freuqncy signal that the secondary gain control signal radio frequency frontend amplifying circuit that FPGA module exports exports, then after analog-to-digital conversion, send into FPGA module, FPGA module draws the baseband signal meeting and be operated in ADC range ability after processing the signal accepted.But, in the specific implementation, respectively analog-to-digital conversion is carried out to intermediate-freuqncy signal and RSSI signal by same AD conversion chip, FPGA module only need carry out a filtering according to the frequency of two signals, can obtain required intermediate-freuqncy signal and RSSI signal respectively, therefore, this programme simplifies the hardware circuit of radio frequency signal processing circuit, can reduce it and be embodied as this; The signal amplitude that intermediate frequency VGA amplifier exports in addition does not often reach and directly carries out analog-to-digital demand, and therefore before carrying out analog-to-digital conversion, this programme has also carried out the large process of single step of releasing to intermediate-freuqncy signal, makes it meet analog-to-digital requirement.
Further, between the in-phase input end and the first output of intermediate frequency VGA amplifier of described operational amplifier, be connected with coupling capacitance C230, between the inverting input and the second output of intermediate frequency VGA amplifier of described operational amplifier, be connected with coupling capacitance C227.
Further, stable reference voltage signal is provided in order to give described signal amplification circuit, described reference voltage signal is provided by reference voltage circuit, this reference voltage circuit comprises AD8534 amplifier, DC power supply is connect after normal phase input end one side series resistor R230 of AD8534 amplifier, ground connection after another side series resistor R231, described resistance R231 is also parallel with electric capacity C233, the inverting input of AD8534 amplifier is connected with output, and the output of AD8534 exports described reference voltage signal.
Further, be provided with LC filter circuit between described DC power supply and resistance R230, this LC filter circuit is the low-pass filter circuit that inductance L 23 is formed with electric capacity C235.
In order to simplify hardware circuit further, preferably described first switch element and second switch element adopt same switch chip, and this switch chip is model ADG611.
As preferably, described intermediate frequency VGA amplifier adopts AD8369 intermediate frequency amplifier, and described AD conversion chip adopts AD9255 analog to digital converter, and described operational amplifier adopts ADA4937-1 differential amplifier.
Remarkable result of the present utility model is: carry out analog-to-digital conversion to intermediate-freuqncy signal and RSSI signal respectively by same AD conversion chip, simplify the hardware circuit of rf processing circuitry, reduces it and is embodied as this; In addition, carried out repeatedly amplifying process to intermediate-freuqncy signal before carrying out analog-to-digital conversion, enable intermediate-freuqncy signal meet analog-to-digital requirement.
Accompanying drawing explanation
Fig. 1 is schematic block circuit diagram of the present utility model;
Fig. 2 is the circuit theory diagrams of the VGA of intermediate frequency described in Fig. 1 amplifier;
Fig. 3 is the circuit theory diagrams of described signal amplification circuit;
Fig. 4 is the circuit theory diagrams of described AD conversion chip.
Embodiment
Below in conjunction with accompanying drawing, embodiment of the present utility model and operation principle are described in further detail.
This example is carried out improving based on a kind of conventional radio frequency automatic gain control circuit as shown in Figure 1 and is illustrated.This radio frequency automatic gain control circuit comprises radio-frequency front-end amplifying circuit 1, this radio-frequency front-end amplifying circuit is made up of radio-frequency front-end first order amplifier and radio-frequency front-end second level amplifier, the wherein input received RF signal of radio-frequency front-end first order amplifier, the output of this radio-frequency front-end first order amplifier is connected with the input of radio-frequency front-end second level amplifier, output one tunnel of radio-frequency front-end second level amplifier is connected an input of FPGA module 4 after the first AD conversion module 3 through intermediate frequency VGA amplifier 2, another road is connected another input of described FPGA module 4 after the second AD conversion module 6 through RSSI signal detection module 5, described FPGA module 4 also exports three road gain control signals, wherein first via gain control signal carries out an AGC control for radio frequency front end first order amplifier, second road gain control signal is used for the second level, radio frequency front end amplifier and carries out secondary AGC control, 3rd road gain control signal is used for carrying out AGC control to intermediate frequency VGA amplifier 2.
As shown in Figure 2 to 4, for reaching the goal of the invention of this programme, described first AD conversion module 3 and the second AD conversion module 6 adopt same AD conversion chip, and the front end of this AD conversion chip is provided with signal amplification circuit.
In this example, preferred described intermediate frequency VGA amplifier 2 adopts AD8369 intermediate frequency amplifier, described AD conversion chip adopts AD9255 analog to digital converter, described operational amplifier adopts ADA4937-1 differential amplifier, described first switch element and second switch element adopt same switch chip, and this switch chip model is ADG611.
See accompanying drawing 2 ~ accompanying drawing 4, described signal amplification circuit comprises an operational amplifier, the in-phase input end of this operational amplifier is while be connected with the OPHI output of described intermediate frequency VGA amplifier 2 after serial connection coupling capacitance C230, another side series resistor R226 is connected with the output of described RSSI signal detection module 5 with after the first switch element, the inverting input of this operational amplifier is while be connected with the OPLO output of described intermediate frequency VGA amplifier 2 after serial connection coupling capacitance C227, reference voltage signal is accessed after another side series resistor R227 and second switch element, positive output end+OUT series resistor R229 and the positive output end being connected described AD conversion chip after resistance R232 of described operational amplifier, negative output terminal series resistor R2289 and the negative input end being connected described AD conversion chip after resistance R233 of described operational amplifier, filter capacitor C237 is also connected with between the common port and the common port of resistance R2289 and resistance R233 of resistance R229 and resistance R232,
The control end of described first switch element and second switch element is also connected on the switching signal output terminals A D-SW of described FPGA module 4 simultaneously.
It can also be seen that from Fig. 3, described reference voltage signal is provided by reference voltage circuit, this reference voltage circuit comprises AD8534 amplifier, DC power supply is connect after normal phase input end one side series resistor R230 of AD8534 amplifier, ground connection after another side series resistor R231, described resistance R231 is also parallel with electric capacity C233, the inverting input of AD8534 amplifier is connected with output, the output of AD8534 exports described reference voltage signal, LC filter circuit is provided with between described DC power supply and resistance R230, this LC filter circuit is the low-pass filter circuit that inductance L 23 is formed with electric capacity C235, wherein inductance L 23 is serially connected between resistance R230 and DC power supply, ground connection after the common port serial capacitance C235 of inductance L 23 and resistance R230.
Its operation principle is:
Described FPGA module 4 extracts the magnitude of voltage of radio-frequency (RF) front-end circuit 1 output signal by RSSI signal detection module 5; And export control signal conducting first switch element and second switch element, signal amplification circuit described in the magnitude of voltage of RSSI chip is amplified to can after bosom friend carries out analog-to-digital conversion, then FPGA module 4 is flowed to after becoming digital signal by analog signal, FPGA module 4 is first time AGC according to this signal radio frequency front end first order amplifier and is controlled, and control range is 0-30dB; After amplifying signal settles out for the first time, the second level, radio frequency front end amplifier is second time AGC and controls, and carries out AGC control to intermediate frequency VGA amplifier 2 simultaneously, and amplify intermediate-freuqncy signal, the scope of control is 0-75dB; The intermediate-freuqncy signal that last intermediate frequency VGA amplifier 2 exports through described signal amplification circuit be amplified to can bosom friend carry out analog-to-digital conversion after export, and flow to FPGA module 4 after becoming digital signal by analog signal, the baseband signal that FPGA module 4 is required after carrying out feed-forward AGC adjustment and output processing.
Claims (6)
1. a radio frequency automatic gain control circuit, comprise radio-frequency front-end amplifying circuit (1), the input received RF signal of this radio-frequency front-end amplifying circuit (1), output one tunnel of this radio-frequency front-end amplifying circuit (1) is connected an input of FPGA module (4) after the first AD conversion module (3) through intermediate frequency VGA amplifier (2), another road is connected another input of described FPGA module (4) after the second AD conversion module (6) through RSSI signal detection module (5), described radio-frequency front-end amplifying circuit (1) provides by described FPGA module (4) with the gain control signal of intermediate frequency VGA amplifier (2), it is characterized in that: described first AD conversion module (3) and the second AD conversion module (6) adopt same AD conversion chip, the front end of this AD conversion chip is provided with signal amplification circuit,
Operational amplifier is provided with in described signal amplification circuit, the in-phase input end of this operational amplifier is while be connected with the first output of described intermediate frequency VGA amplifier (2), and another side series resistor R226 is connected with the output of described RSSI signal detection module (5) with after the first switch element; The inverting input of this operational amplifier, while be connected with the second output of described intermediate frequency VGA amplifier (2), accesses reference voltage signal after another side series resistor R227 and second switch element;
The control end of described first switch element and second switch element is also connected on the switching signal output of described FPGA module (4) simultaneously.
2. a kind of radio frequency automatic gain control circuit according to claim 1, it is characterized in that: between the in-phase input end and the first output of intermediate frequency VGA amplifier (2) of described operational amplifier, be connected with coupling capacitance C230, between the inverting input and the second output of intermediate frequency VGA amplifier (2) of described operational amplifier, be connected with coupling capacitance C227.
3. a kind of radio frequency automatic gain control circuit according to claim 1 and 2, it is characterized in that: described reference voltage signal is provided by reference voltage circuit, this reference voltage circuit comprises AD8534 amplifier, DC power supply is connect after normal phase input end one side series resistor R230 of AD8534 amplifier, ground connection after another side series resistor R231, described resistance R231 is also parallel with electric capacity C233, the inverting input of AD8534 amplifier is connected with output, and the output of AD8534 exports described reference voltage signal.
4. a kind of radio frequency automatic gain control circuit according to claim 3, is characterized in that: between described DC power supply and resistance R230, be provided with LC filter circuit, and this LC filter circuit is the low-pass filter circuit that inductance L 23 is formed with electric capacity C235.
5. a kind of radio frequency automatic gain control circuit according to claim 1, it is characterized in that: described first switch element and second switch element adopt same switch chip, this switch chip model is ADG611.
6. a kind of radio frequency automatic gain control circuit according to claim 1 and 2, it is characterized in that: described intermediate frequency VGA amplifier (2) adopts AD8369 intermediate frequency amplifier, described AD conversion chip adopts AD9255 analog to digital converter, and described operational amplifier adopts ADA4937-1 differential amplifier.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520276604.9U CN204498075U (en) | 2015-04-30 | 2015-04-30 | A kind of radio frequency automatic gain control circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520276604.9U CN204498075U (en) | 2015-04-30 | 2015-04-30 | A kind of radio frequency automatic gain control circuit |
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| CN204498075U true CN204498075U (en) | 2015-07-22 |
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| CN201520276604.9U Active CN204498075U (en) | 2015-04-30 | 2015-04-30 | A kind of radio frequency automatic gain control circuit |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106712804A (en) * | 2016-12-30 | 2017-05-24 | 陕西烽火电子股份有限公司 | Frequency-hopping receiving channel quick gain control system |
| CN111884966A (en) * | 2020-07-20 | 2020-11-03 | 贵州航天天马机电科技有限公司 | Modulation-demodulation circuit based on GMSK technology |
-
2015
- 2015-04-30 CN CN201520276604.9U patent/CN204498075U/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106712804A (en) * | 2016-12-30 | 2017-05-24 | 陕西烽火电子股份有限公司 | Frequency-hopping receiving channel quick gain control system |
| CN106712804B (en) * | 2016-12-30 | 2024-04-09 | 陕西烽火电子股份有限公司 | Quick gain control system for frequency hopping receiving channel |
| CN111884966A (en) * | 2020-07-20 | 2020-11-03 | 贵州航天天马机电科技有限公司 | Modulation-demodulation circuit based on GMSK technology |
| CN111884966B (en) * | 2020-07-20 | 2022-11-04 | 贵州航天天马机电科技有限公司 | Modulation-demodulation circuit based on GMSK technology |
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