CN204405737U - A kind of harmonic measurement device based on DSP - Google Patents

A kind of harmonic measurement device based on DSP Download PDF

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Publication number
CN204405737U
CN204405737U CN201520054601.0U CN201520054601U CN204405737U CN 204405737 U CN204405737 U CN 204405737U CN 201520054601 U CN201520054601 U CN 201520054601U CN 204405737 U CN204405737 U CN 204405737U
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China
Prior art keywords
chip
dsp
dsp chip
measurement device
device based
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Expired - Fee Related
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CN201520054601.0U
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Chinese (zh)
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马兴
杨鑫
邹娅
李捍东
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Guizhou University
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Guizhou University
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Abstract

The utility model discloses a kind of harmonic measurement device based on DSP, comprise data acquisition module, dsp chip, CPLD chip, human-machine exchange module and host computer, host computer CPLD chip being connected with dsp chip, human-computer interaction module and being connected by ethernet communication interface unit, dsp chip is also connected with data acquisition module, and is connected with power module.The utility model does middle bridge by CPLD chip, dsp chip only needs order to send to CPLD chip, after CPLD chip is finished the work, again data are transferred to dsp chip, decrease the stand-by period of dsp chip, improve the operational efficiency of dsp chip, effectively improve plant running speed, jumbo calculating can be realized, efficiently solve the problem that identification locating speed that the operand that exists in existing technology causes greatly is slow, improve accuracy and real-time, and there is the simple feature of structure.

Description

A kind of harmonic measurement device based on DSP
Technical field
The utility model belongs to Power Quality Detection field, is specifically related to a kind of harmonic measurement device structure based on DSP.
Background technology
In recent years, the popularization of automatic technology, various non-linear power electronic equipment is as convertor equipment, frequency conversion equipment etc., capacity expanding day, quantity is increasing, it is that electric current and voltage waveform produce cyclic distortion on the direct performance of the impact of electric device, namely produces so-called electric harmonic, and harmonic wave can make the production of electric energy, the efficiency of transmission and utilization reduces; Make device of overheating of electrical, produce vibration & noise, and make insulation ag(e)ing, serviceable life shortens, and electric device local even can be caused to produce parallel resonance or series resonance, harmonic content is amplified, causes capacitor equipment to burn.
Therefore, harmonic wave control seems and becomes more and more important, and harmonic detecting is the basis solving harmonic problem, because in electric device, the type of harmonic source is many, distribution wide, if before harmonic wave control, the distribution of each harmonic, content and its start/stop time occurred clearly can both be grasped, thus can administer harmonic wave with being distinguished, to reduce the difficulty of administering, more in addition other factors such as reactive power etc. is also affecting electrical energy use factor enhancement.
But existing most of Harmonic Measurer as the brand such as FLUKE, Texas Instrument of import and domestic as Weisheng, Changsha, to cause the brand value such as electronics far away expensive, chip operational efficiency has much room for improvement, algorithm is not enough to realize more high-precision harmonic detecting, and stable not with host computer interaction effect.
Summary of the invention
The technical problems to be solved in the utility model is: provide a kind of harmonic measurement device based on DSP, more accurately and fast, stablizes and high performance-price ratio, to overcome the deficiency of prior art problem.
The technical scheme that the utility model is taked is: a kind of harmonic measurement device based on DSP, comprise the data acquisition module, the dsp chip for frequency analysis, the CPLD chip for auxiliary DSP chip that gather for current and voltage signals, for this locality display human-computer interaction module of data and the host computer of remote real time monitoring image data, the host computer described CPLD chip being connected with dsp chip, human-computer interaction module and being connected by ethernet communication interface unit, described dsp chip is also connected with data acquisition module, and is connected with power module.
Preferably, above-mentioned data acquisition module comprises the voltage current transformer, low-pass filter, signal conditioner and the A/D converter that connect successively, described A/D converter is in parallel with square-wave generator, current and voltage signals converted to by this syndeton the reliable and stable signal that dsp chip can process, and dsp chip according to the pulse signal of square-wave generator input, can draw the frequency of signal.
Preferably, above-mentioned dsp chip adopts TMS320F28335 chip, and this chip has 32 floating-point operation functions, is responsible for the function realizing analyzing harmonic wave.
Preferably, above-mentioned human-computer interaction module comprises LCDs and button, is connected respectively to CPLD chip, data is shown in LCDs, and realized process and the transmission display of specific data by operation push-button, structure is simple, convenient operation and maintenance.
Preferably, above-mentioned CPLD chip adopts EPM3064ATC100-10N chip, and this chip has flexible in programming, integrated level is high, the cycle of designing and developing is short, the scope of application is wide, developing instrument is advanced, design and manufacture cost is low, standardized product low to the hardware skill requirement of deviser is popular without the need to test, strong security, price.
Preferably, above-mentioned ethernet communication interface unit adopts RTL8019AS chip to realize the communication function of host computer and Harmonic Measurer, and chip realizes it by PH163539 chip forming circuit and is connected with RJ45, by CPLD chip and dsp chip communication.
The beneficial effects of the utility model: compared with prior art, the utility model adopts dsp chip to be advocate peace to adopt CPLD chip to be auxiliary data processing equipment, middle bridge is done by CPLD chip, dsp chip only needs order to send to CPLD chip, after CPLD chip is finished the work, again data are transferred to dsp chip, decrease the stand-by period of dsp chip, improve the operational efficiency of dsp chip, and effectively can utilize the multiplexing function of dsp chip pin, thus effectively improve plant running speed, jumbo calculating can be realized, efficiently solve the problem that identification locating speed that the operand that exists in existing technology causes greatly is slow, improve accuracy and real-time, and there is the simple feature of structure.
Accompanying drawing explanation
Fig. 1 harmonic measurement device structured flowchart;
Fig. 2 method for designing embodiment hardware unit structural drawing;
Fig. 3 Ethernet interface element circuit schematic diagram;
Fig. 4 human-computer interaction function modular circuit schematic diagram.
Embodiment
Below in conjunction with accompanying drawing and specific embodiment, utility model is described further.
As Fig. 1 ~ Fig. 4, a kind of harmonic measurement device based on DSP, comprise the data acquisition module gathered for current and voltage signals, for the dsp chip of frequency analysis, for the CPLD chip of auxiliary DSP chip, for this locality display human-computer interaction module of data and the host computer of remote real time monitoring image data, described CPLD chip is connected with dsp chip, human-computer interaction module and the host computer connected by ethernet communication interface unit, described dsp chip is also connected with data acquisition module, and be connected with power module, dsp chip is adopted to be advocate peace to adopt CPLD chip to be auxiliary data processing equipment, middle bridge is done by CPLD chip, dsp chip only needs order to send to CPLD chip, after CPLD chip is finished the work, again data are transferred to dsp chip, decrease the stand-by period of dsp chip, improve the operational efficiency of dsp chip, and effectively can utilize the multiplexing function of dsp chip pin, thus effectively improve plant running speed, jumbo calculating can be realized, efficiently solve the problem that identification locating speed that the operand that exists in existing technology causes greatly is slow, improve accuracy and real-time, and there is the simple feature of structure.
Preferably, above-mentioned data acquisition module comprises the voltage current transformer, low-pass filter, signal conditioner and the A/D converter that connect successively, described A/D converter is in parallel with square-wave generator, current and voltage signals converted to by this syndeton the reliable and stable signal that dsp chip can process, and dsp chip according to the pulse signal of square-wave generator input, can draw the frequency of signal.
Preferably, above-mentioned dsp chip adopts TMS320F28335 chip, and this chip has 32 floating-point operation functions, is responsible for the function realizing analyzing harmonic wave.
Preferably, above-mentioned human-computer interaction module comprises LCDs and button, is connected respectively to CPLD chip, data is shown in LCDs, and realized process and the transmission display of specific data by operation push-button, structure is simple, convenient operation and maintenance.
Preferably, above-mentioned CPLD chip adopts EPM3064ATC100-10N chip, and this chip has flexible in programming, integrated level is high, the cycle of designing and developing is short, the scope of application is wide, developing instrument is advanced, design and manufacture cost is low, standardized product low to the hardware skill requirement of deviser is popular without the need to test, strong security, price.
Preferably, above-mentioned ethernet communication interface unit adopts RTL8019AS chip to realize the communication function of host computer and Harmonic Measurer, and chip realizes it by PH163539 chip forming circuit and is connected with RJ45, by CPLD chip and dsp chip communication.
Use principle: first device carries out signals collecting, by A, B, the electric current of C three-phase, voltage signal, access current transformer respectively, voltage transformer (VT), after converting the signal into the signal that dsp chip can accept, in order to prevent distorted signals, accessed signal conditioning circuit again, signal is nursed one's health further, thus utilize the precision of dsp chip better, after simulating signal is converted to digital signal through A/D conversion and sends into dsp chip, and determined that by the pulse signal that square-wave generator inputs the frequency of the signal collected carries out analyzing and processing by dsp chip to harmonic wave, windowed value FFT is used to combine wavelet package transforms as algorithm of harmonics analysis, windowed value fft algorithm is adopted to detect signal the signal collected, draw the amplitude size of each harmonic, according to amplitude size, select and be greater than the centesimal harmonic signal of fundamental voltage amplitude, decomposition and reconstruction is carried out with wavelet package transforms, filtering ranking method is used during decomposition, make to decompose the signal obtained at every turn and follow low frequency on a left side, the principle of high frequency on the right side arranges, afterwards signal is reconstructed computing again, finally draw its each harmonic voltage, the effective value of electric current, each harmonic amount and electric current is detected through comprehensive detection algorithm, voltage distortion rate, and export to CPLD chip by dsp chip, as Fig. 3, shown in Fig. 4, man-machine interaction and the communication with host computer is carried out by CPLD chip, data are exported to LCDs by CPLD chip, and by the display interface of button switchable liquid crystal display screen, CPLD chip transfers data to upper unit by ethernet communication interface simultaneously, host computer configuration interface can showing real-time wave, voltage distortion rate, the data such as current distortion rate and each harmonic amount, and can by checking that historical data form is from data base call harmonic data in the past.
The above; be only embodiment of the present utility model; but protection domain of the present utility model is not limited thereto; anyly be familiar with those skilled in the art in the technical scope that the utility model discloses; change can be expected easily or replace; all should be encompassed within protection domain of the present utility model, therefore, protection domain of the present utility model should be as the criterion with the protection domain of described claim.

Claims (6)

1. the harmonic measurement device based on DSP, it is characterized in that: comprise the data acquisition module, the dsp chip for frequency analysis, the CPLD chip for auxiliary DSP chip that gather for current and voltage signals, for this locality display human-computer interaction module of data and the host computer of remote real time monitoring image data, the host computer described CPLD chip being connected with dsp chip, human-computer interaction module and being connected by ethernet communication interface unit, described dsp chip is also connected with data acquisition module, and is connected with power module.
2. a kind of harmonic measurement device based on DSP according to claim 1, it is characterized in that: described data acquisition module comprises the voltage current transformer, low-pass filter, signal conditioner and the A/D converter that connect successively, and described A/D converter is in parallel with square-wave generator.
3. a kind of harmonic measurement device based on DSP according to claim 1, is characterized in that: described dsp chip adopts TMS320F28335 chip.
4. a kind of harmonic measurement device based on DSP according to claim 1, is characterized in that: described human-computer interaction module comprises LCDs and button.
5. a kind of harmonic measurement device based on DSP according to claim 4, is characterized in that: described CPLD chip adopts EPM3064ATC100-10N chip.
6. a kind of harmonic measurement device based on DSP according to claim 1, is characterized in that: described ethernet communication interface unit adopts RTL8019AS chip.
CN201520054601.0U 2015-01-27 2015-01-27 A kind of harmonic measurement device based on DSP Expired - Fee Related CN204405737U (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104764931A (en) * 2015-01-27 2015-07-08 贵州大学 Harmonic detection device based on DSP and detection method thereof
CN106707075A (en) * 2017-03-27 2017-05-24 青岛高科通信股份有限公司 Online electric energy quality monitoring system based on ARM and FPGA
CN109540560A (en) * 2018-11-30 2019-03-29 厦门大学 Rotating machinery structure answers the absolute anti-aliasing multi-scale filtering method of humorous dynamic process

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104764931A (en) * 2015-01-27 2015-07-08 贵州大学 Harmonic detection device based on DSP and detection method thereof
CN104764931B (en) * 2015-01-27 2017-06-23 贵州大学 A kind of harmonic measurement device and its detection method based on DSP
CN106707075A (en) * 2017-03-27 2017-05-24 青岛高科通信股份有限公司 Online electric energy quality monitoring system based on ARM and FPGA
CN109540560A (en) * 2018-11-30 2019-03-29 厦门大学 Rotating machinery structure answers the absolute anti-aliasing multi-scale filtering method of humorous dynamic process
CN109540560B (en) * 2018-11-30 2020-03-24 厦门大学 Absolute anti-aliasing multi-scale filtering method for complex harmonic dynamic process of rotating mechanical structure

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C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20150617

Termination date: 20180127

CF01 Termination of patent right due to non-payment of annual fee