Embodiment
The utility model is described in detail below in conjunction with accompanying drawing.
Fig. 1 provides the composition frame chart of Tempest device for the utility model.As shown in Figure 1, the Tempest device that the utility model provides, comprise power-supply filter, AC/DC converter, noise-producing equipment, amplifier, low-pass filter and working state monitoring and display device (i.e. work condition indicator), described power-supply filter is power line carrier wave information on filter out power line, preferably, the stopband operating frequency range of power-supply filter is 150KHz to 400MHz; AC/DC converter, for being converted into direct supply from the taking-up AC power on line of electric force, mainly produces+5V and+7V direct supply, for follow-up noise-producing equipment, amplifier, duty and display device provide direct supply.Described noise-producing equipment is for generation of white noise; Described amplifier produces white noise information for amplifying noise-producing equipment; Described low-pass filter is used for carrying out filtering to the white noise information that amplifier amplifies, and preferably, the passband operating frequency range of low-pass filter is 0MHz to 300MHz; Described white noise is coupled on power lead by coupling mechanism, and described coupling mechanism is inductive coupler or capacity coupler.
The circuit diagram of the noise generating device that Fig. 2 provides for the utility model.As shown in Figure 2, the noise generating device that the utility model provides comprises low-pass filter and white noise generator, described low-pass filter is made up of inductance L 5, electric capacity C9, electric capacity C15 and electric capacity C16, the cathode output end of+7V direct current supply line connects the first end of described inductance L 5, second end of inductance L 5 all connects the first end of electric capacity C9, electric capacity C15 and electric capacity C16, the second end ground connection of electric capacity C9, electric capacity C15 and electric capacity C16; Second end of inductance L 5 is connected to the first end of resistance R3, and second end of resistance R3 is connected to the emitter of the transistor Q1 in white noise generator, and that is ,+7V power supply provides electric energy then to white noise generator through low-pass filter filtering ripple.Described inductance L 5 exchanges logical direct current for hindering.The utility model adopts a jumbo electric capacity C9, and the mode that is in parallel of the electric capacity C15 of two low capacities and electric capacity C16 substantially increases the filtering characteristic of ripple.White noise generation device is made up of transistor Q1, the base earth of transistor Q1, and collector is unsettled, and emitter connects second end of current-limiting resistance R3, is connected to the first end of coupling capacitance C17 simultaneously, namely outwards provides white noise information by coupling capacitance C17.White noise generator utilizes the breakdown characteristics of PN junction to produce wide band white noise.
The composition frame chart of the work condition indicator that Fig. 3 provides for the utility model.As shown in Figure 3, work condition indicator comprises single-chip microcomputer, LCDs, clock chip, Hall element and working state monitoring circuit, can show the working time, flow through the electric current of power-supply filter and current duty.Described Hall element flows through the electric current of power lead for monitoring, and export one with the voltage signal of current in proportion flowing through power lead, be then supplied to single-chip microcomputer; If the quiescent potential of the anti-information of working state monitoring main circuit to the white noise amplifier in Tempest device judges, see that whether its DC static working point is at normal voltage range; Single-chip microcomputer mainly processes the information of Hall element output and the information of working state monitoring circuit output, and shows in LCDs, also for showing the duty of white noise amplifier; Clock chip is for providing current temporal information, and the temporal information that single-chip microcomputer also provides according to clock chip is in the working time of the current date Hour Minute Second of liquid crystal display screen display and this device.
The circuit diagram of the white noise amplifier that Fig. 4 provides for the utility model.As shown in Figure 4, the white noise amplifier that the utility model provides comprises three grades, the white noise information that described amplifier produces for amplifying noise generator, and third stage amplifier successively dialogue noise information amplifies.First order amplifier, for amplifying the white noise signal that noise generating device produces, be supplied to second level amplifier after amplification to continue to amplify, it is made up of the first amplification chip MAR-8+ and peripheral circuit thereof, wherein, second end of the 1st pin butt coupling electric capacity C17 of the first amplification chip MAR-8+, the 2nd and 4 pin ground connection, the first end of the 3rd pin butt coupling electric capacity C18, provides drive singal through coupling capacitance C18 to second level amplifier; Power supply+5V provides suitable quiescent point to amplification chip MAR-8+ through biasing resistor R1 and inductance L 6 successively simultaneously, and electric capacity C11 and C12 plays the effect of ac short circuit ground connection.The white noise signal that second level amplifier amplifies for amplifying first order amplifier, be supplied to third level amplifier after amplification to continue to amplify, it is made up of the second amplification chip MAR-8+ and peripheral circuit thereof, wherein, second end of the 1st pin butt coupling electric capacity C18 of the second amplification chip MAR-8+, 2nd and 4 pin ground connection, the first end of the 3rd pin butt coupling electric capacity C19, provides drive singal through coupling capacitance C19 to third level amplifier; Power supply+5V provides suitable quiescent point to amplification chip MAR-8+ through biasing resistor R2 and inductance L 7 successively simultaneously, and electric capacity C13 and C14 plays the effect of ac short circuit ground connection, and electric capacity C10 is used for the ripple of filtering+5V power supply.The white noise signal that third level amplifier amplifies for amplifying second level amplifier, be supplied to rear class low-pass filter after amplification and carry out filtering, it is made up of the 3rd amplification chip MAR-8+ and peripheral circuit thereof, wherein, second end of the 1st pin butt coupling electric capacity C23 of the 3rd amplification chip MAR-8+, the first end of electric capacity C23 is connected to second end of resistance R9, and the first end of resistance R9 is connected to second end of electric capacity C19; Resistance R9 is for controlling output power; 2nd and the 4 pin ground connection of the 3rd amplification chip MAR-8+, the first end of the 3rd pin butt coupling electric capacity C24, provides signal through coupling capacitance C24 to low-pass filter; Power supply+5V provides suitable quiescent point to amplification chip MAR-8+ through biasing resistor R4 and inductance L 8 successively simultaneously, and electric capacity C21 and C22 plays the effect of ac short circuit ground connection, and electric capacity C20 is used for the ripple of filtering+5V power supply.
The circuit diagram of the working state monitoring circuit that Fig. 5 provides for the utility model.As shown in Figure 5, the working state monitoring circuit that the utility model provides: comparer, level translator and indicator, the quiescent operation point voltage of the every one-level of three grade of described comparer respectively in comparison amplifier and threshold values are to judge that whether every grade of amplifier operation is normal, level translator is used for providing threshold voltage, and comparative result is converted to high level or low level; Whether indicator is used to indicate amplifier operation normal, when pilot lamp is bright, represents working properly, when pilot lamp does not work, represents that work is abnormal.Comparer comprises the first electric switch, the second electric switch, the 3rd electric switch, the 4th electric switch, the 5th electric switch and the 6th electric switch, wherein, first electric switch is made up of transistor Q4, resistance R14, resistance R16 and diode D5, the emitter of transistor Q4 is connected to power supply+5V through resistance R14, collector is connected to ground through resistance R16, also be connected to the negative pole of diode D5, base stage is connected to the test side DT1 of the first order amplifier in amplifier; The positive pole of diode D5 is connected to the input end of level translator, i.e. the intermediate node of resistance R7 and resistance R10; Second electric switch is made up of transistor Q5, resistance R17, resistance R21 and diode D8, the emitter of transistor Q5 is connected to power supply+5V through resistance R17, collector is connected to ground through resistance R21, also be connected to the negative pole of diode D8, base stage is connected to the test side DT2 of the second level amplifier in amplifier; The positive pole of diode D8 is connected to the input end of level translator, i.e. the intermediate node that is in series of resistance R7 and resistance R10; 3rd electric switch is made up of transistor Q6, resistance R18, resistance R22 and diode D9, the emitter of transistor Q6 is connected to power supply+5V through resistance R18, collector is connected to ground through resistance R22, also be connected to the negative pole of diode D9, base stage is connected to the test side DT3 of the third level amplifier in amplifier; The positive pole of diode D9 is connected to the input end of level translator, i.e. the intermediate node that is in series of resistance R7 and resistance R10.4th electric switch is made up of diode D1, and the negative pole of diode D1 is connected to the test side DT1 of the first order amplifier in amplifier, and positive pole is connected to the input end of level translator, i.e. the intermediate node of resistance R7 and resistance R10; 5th electric switch is made up of diode D2, and the negative pole of diode D2 is connected to the test side DT2 of the second level amplifier in amplifier, and positive pole is connected to the input end of level translator, i.e. the intermediate node of resistance R7 and resistance R10.6th electric switch is made up of diode D3, and the negative pole of diode D3 is connected to the test side DT3 of the third level amplifier in amplifier, and positive pole is connected to the input end of level translator, i.e. the intermediate node that is in series of resistance R7 and resistance R10.
Level translator is made up of resistance R7, resistance R10, electric capacity C26, transistor Q2, resistance R5, resistance R8, resistance R11, resistance R13, transistor Q3 and resistance R6, wherein, resistance R7 and R10 is in series, and be connected between power supply+5V and ground, its intermediate node is the input end of level translator, electric capacity C26 is also connected in resistance R10 two ends, for filtering ripple, to prevent misoperation.Resistance R5 and R8 is in series, and be connected between power supply+5V and ground, the emitter that its intermediate node is transistor Q2 provides a suitable quiescent point, and the collector of transistor Q2 is through resistance R13 ground connection, and base stage is connected to the intermediate node that resistance R7 and R10 is in series.Transistor Q3 works on off state, and its collector is connected to power supply+5V through resistance R6, grounded emitter, and base stage is connected to the collector of transistor Q2 through resistance R11.
The quiescent point of amplification chip MAR-8+ is when 2.8-4V, be in normal operating conditions, when first order normal amplifier operation, the transistor Q4 being connected to DT1 is in conducting state, diode D5 is in cut-off state, diode D1 is in cut-off state, the intermediate node voltage that resistance R7 and R10 is in series is unaffected, transistor Q2 is in cut-off state, the voltage at resistance R13 two ends is zero, transistor Q3 is also in cut-off state, R6 and R23 intermediate node voltage is+5V, for an input end of single-chip microcomputer provides high level, simultaneously light emitting diode D13 connects electricity and luminous, represent that first order amplifier operation is normal.When the quiescent point of the first amplifier MAR-8+ is higher than 4V, be in abnormal operating state, the diode D1 being connected to DT1 is in cut-off state, transistor Q4 is in cut-off state, diode D5 is in conducting state, the intermediate node voltage that resistance R7 and R10 is in series becomes by the impact that Q4 ends and is less than+2V, transistor Q2 is in conducting state, the voltage at resistance R13 two ends is greater than 1V, transistor Q3 is in saturation conduction state, R6 and R23 intermediate node voltage is less than 1V, for an input end of single-chip microcomputer provides low level, simultaneously light emitting diode D13 power-off and not luminous, represent that first order amplifier operation is abnormal, when the quiescent point of the first amplification chip MAR-8+ is lower than 2.8V, be in abnormal operating state, the diode D1 being connected to DT1 is in conducting state, transistor Q4 is in conducting state, diode D5 is in cut-off state, the intermediate node voltage that resistance R7 and R10 is in series becomes by the impact of D1 conducting and is less than+3.5V, transistor Q2 is in conducting state, the voltage at resistance R13 two ends is greater than 1V, transistor Q3 is in saturation conduction state, R6 and R23 intermediate node voltage is less than 1V, for an input end of single-chip microcomputer provides low level, simultaneously light emitting diode D13 power-off and not luminous, represent that first order amplifier operation is abnormal.
When second level normal amplifier operation, the transistor Q5 being connected to DT2 is in conducting state, diode D8 is in cut-off state, diode D2 is in cut-off state, the intermediate node voltage that resistance R7 and R10 is in series is unaffected, transistor Q2 is in cut-off state, the voltage at resistance R13 two ends is zero, transistor Q3 is also in cut-off state, R6 and R23 intermediate node voltage is+5V, for an input end of single-chip microcomputer provides high level, simultaneously light emitting diode D13 connects electricity and luminous, and expression second level amplifier operation is normal.When the quiescent point of the second amplification chip MAR-8+ is higher than 4V, be in abnormal operating state, the diode D2 being connected to DT2 is in cut-off state, transistor Q5 is in cut-off state, diode D8 is in conducting state, the intermediate node voltage that resistance R7 and R10 is in series becomes by the impact that Q5 ends and is less than+2V, transistor Q2 is in conducting state, the voltage at resistance R13 two ends is greater than 1V, transistor Q3 is in saturation conduction state, R6 and R23 intermediate node voltage is less than 1V, for an input end of single-chip microcomputer provides low level, simultaneously light emitting diode D13 power-off and not luminous, represent that second level amplifier operation is abnormal, when the quiescent point of the second amplification chip MAR-8+ is lower than 2.8V, be in abnormal operating state, the diode D2 being connected to DT2 is in conducting state, transistor Q5 is in conducting state, diode D8 is in cut-off state, the intermediate node voltage that resistance R7 and R10 is in series becomes by the impact of D2 conducting and is less than+3.5V, transistor Q2 is in conducting state, the voltage at resistance R13 two ends is greater than 1V, for an input end of single-chip microcomputer provides low level, transistor Q3 is in saturation conduction state simultaneously, R6 and R23 intermediate node voltage is less than 1V, light emitting diode D13 power-off and not luminous, represent that second level amplifier operation is abnormal.
When third level normal amplifier operation, the transistor Q6 being connected to DT3 is in conducting state, diode D9 is in cut-off state, diode D3 is in cut-off state, the intermediate node voltage that resistance R7 and R10 is in series is unaffected, transistor Q2 is in cut-off state, resistance R13 both end voltage is zero, transistor Q3 is also in cut-off state, R6 and R23 intermediate node voltage is+5V, for an input end of single-chip microcomputer provides high level, simultaneously light emitting diode D13 connects electricity and luminous, and expression third level amplifier operation is normal.When the quiescent point of the 3rd amplification chip MAR-8+ is higher than 4V, be in abnormal operating state, the diode D3 being connected to DT3 is in cut-off state, transistor Q6 is in cut-off state, diode D9 is in conducting state, the intermediate node voltage that resistance R7 and R10 is in series becomes by the impact that Q6 ends and is less than+2V, transistor Q2 is in conducting state, the voltage at resistance R13 two ends is greater than 1V, transistor Q3 is in saturation conduction state, R6 and R23 intermediate node voltage is less than 1V, for an input end of single-chip microcomputer provides low level, simultaneously light emitting diode D13 power-off and not luminous, represent that second level amplifier operation is abnormal, when the quiescent point of the 3rd amplification chip MAR-8+ is lower than 2.8V, be in abnormal operating state, the diode D3 being connected to DT3 is in conducting state, transistor Q6 is in conducting state, diode D9 is in cut-off state, the intermediate node voltage that resistance R7 and R10 is in series becomes by the impact of D3 conducting and is less than+3.5V, transistor Q2 is in conducting state, the voltage at resistance R13 two ends is greater than 1V, transistor Q3 is in saturation conduction state, R6 and R23 intermediate node voltage is less than 1V, for an input end of single-chip microcomputer provides low level, simultaneously light emitting diode D13 power-off and not luminous, represent that third level amplifier operation is abnormal.
The circuit diagram of the low-pass filter that Fig. 6 provides for the utility model, as shown in Figure 6, the low-pass filter that the utility model provides is 7 rank Tchebyscheff filters, is made up of inductance L 10, inductance L 11, inductance L 9, inductance L 12, electric capacity C27, electric capacity C28, electric capacity C29, electric capacity C25.Because triode punctures produced noise signal, broader bandwidth, if without restriction, probably affect other signal, so after generation noise, passed through low-pass filter, make its bandwidth restriction within the specific limits, the preferred passband operating frequency range of the utility model is 0MHz to 300MHz.
Below done to elaborate to design of the present utility model and example by reference to the accompanying drawings; but those skilled in the art will be appreciated that; under the prerequisite not departing from the utility model design, any improvement of making based on the utility model and convert the content still belonged in the utility model protection domain.