CN204330291U - A kind of delay time measurement circuit of fibre delay line - Google Patents
A kind of delay time measurement circuit of fibre delay line Download PDFInfo
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- CN204330291U CN204330291U CN201420860695.6U CN201420860695U CN204330291U CN 204330291 U CN204330291 U CN 204330291U CN 201420860695 U CN201420860695 U CN 201420860695U CN 204330291 U CN204330291 U CN 204330291U
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Abstract
The utility model is a kind of delay time measurement circuit of fibre delay line, and the narrow-pulse laser that laser pulse radiating portion laser instrument sends is divided into 2 tunnels by optical fiber splitter.Laser pulse receiving unit comprises the identical photodetector of two covers, automatic gain control circuit and moment discrimination circuit.One road laser straight taps into into the first photodetector, and another road narrow-pulse laser enters the second photodetector through testing fiber lag line.The electric signal of 2 tunnel conversions accesses respective moment discrimination circuit through respective automatic gain control circuit respectively.The output of first and second moment discrimination circuit the opening and stop passage of digital signal processing module turn-on time respectively, the latter exports the main control module accessing and be connected with host computer.Digital signal processing module obtains the mistiming by timing initial sum termination signal, converts digital signal to, sends host computer show and export measurement result through main control module.This novel delay time measurement realizing picosecond, precision is high, refresh rate is high; Easy to implement.
Description
Technical field
The utility model relates to technical field of optical fiber, is specifically related to a kind of delay time measurement circuit of the fibre delay line based on time-to-digit converter chip.
Background technology
Along with the development of optical fiber technology, the positive widespread use of the fibre delay line as novel signal processing apparatus.The principle of fibre delay line sends into optical fiber after rf signal is transformed into the light signal of this signal madulation, then be original rf signal by the converting optical signals of rf modulations.Radiofrequency signal is instantaneous to be stored in fibre delay line, and time delay is directly proportional to the length of optical fiber.
Fibre delay line can realize coding and the buffer memory of signal in fiber optic communication systems, the sample and transform realizing measuring-signal is participated in Fibre Optical Sensor and optical measuring system, realize in Optically controlled microwave array antenna system microwave signal precise phase distribute with control, radar echo signal relevant except making an uproar, realize in electronic warfare system signal store instantaneously, enemy is implemented duplicity disturb laser fuze system; Also be applied in fields such as Microwave photonics.Related application field all requires that the time delay of fibre delay line must be very accurate, especially in Military Application field, requires stricter.
Although at present the method for measuring optical fiber lag line time delay has a lot, measuring accuracy is not high, and special fibre delay line delay time measurement instrument is all also in the development stage both at home and abroad.Existing market is badly in need of fast, the measurement mechanism of Measurement accuracy fibre delay line time delay and method.
Utility model content
The purpose of this utility model designs a kind of delay time measurement circuit of fibre delay line, comprise laser pulse radiating portion, laser pulse receiving unit, time figure processing module and main control circuit part, with time figure conversion chip (Time to Digital Converter, TDC) be the time figure processing module of core, measure through fibre delay line with not through the light pulsing intervals time of fibre delay line, obtain the accurate delay time of laser in fibre delay line.
The delay time measurement circuit of a kind of fibre delay line of the utility model design comprises laser pulse radiating portion, laser pulse receiving unit, time figure processing module and main control module.
Described laser pulse radiating portion comprises laser instrument, drive circuit for laser, optical fiber splitter, the control end of the signal output part access laser instrument of drive circuit for laser, the laser incoming fiber optic shunt that laser instrument is launched.Drive circuit for laser produces burst pulse drive singal and exports controlled drive current, and drive laser sends narrow-pulse laser, and the narrow-pulse laser entering optical fiber splitter is divided into two-way as signal source.
Laser pulse receiving unit comprises the identical circuit of two covers, namely be linked in sequence the first photodetector, the first automatic gain control circuit and the first moment discrimination circuit, and second photodetector that is linked in sequence, the second automatic gain control circuit and the second moment discrimination circuit.The road narrow-pulse laser that optical fiber splitter separates directly enters the first photodetector, and another road narrow-pulse laser enters the second photodetector after fibre delay line to be measured.The electric signal of two photodetector conversion gained accesses respective moment discrimination circuit through respective automatic gain control circuit respectively.
The output of the first moment discrimination circuit and the second moment discrimination circuit is respectively as starting timing and terminating opening and stopping passage of timing signal digital signal processing module turn-on time.Time figure processing module is time figure conversion chip and accessory circuit, and it exports access main control module.
Main control module is connected with host computer, and configured the correlation parameter of main control module by host computer, the process of control lag time measurement, measurement result is by host computer display translation.Host computer configuration parameter comprises time figure conversion chip mode of operation and selects and measurement pattern selection.The design of time figure conversion chip (TDC-GPX chip) can select I, G, R, M tetra-kinds of mode of operations by demand, corresponding different precision and measurement range.Measurement pattern selects the pendulous frequency of 1 ~ 20 time, when selection repetitive measurement mode chip can contrast and handling averagely measurement data.
Described laser instrument is single longitudinal mode Distributed Feedback Laser (distributed feedback laser of external modulation), and centre wavelength is 1064nm, and spectrum width is less than 10nm, and rise and fall time is less than 1ns.Its linearity is good, fast response time, frequency of operation are high, bandwidth, to produce rising, fall time little narrow-pulse laser.
Described optical fiber splitter is single-mode fiber shunt, and splitting ratio is 90:10 ~ 97:3, and most of laser beam enters testing fiber lag line.
First, second described photodetector is that response frequency is greater than 7.5GHz, and dark current is less than 5nA, and response wave length covers APD (avalanche photodide) the type light electric explorer of 1064 ± 20nm.
The circuit structure of first, second described photodetector is identical, comprise APD photodetector and testing circuit, the light signal received is become current signal proportional with it by APD photodetector, testing circuit is that the low noise that is made up of low noise integrated transporting discharging and feedback resistance is across resistance amplifying circuit, APD photodetector gained current signal is converted to voltage signal and amplifies, suppress the dark current noise to photodetector, effectively reduce the impact of noise on measuring system, the discrimination threshold being beneficial to moment discrimination circuit judges.
The structure of first, second automatic gain control circuit described is identical, comprise the controllable gain amplifier and peak detctor that are linked in sequence, also has gain controller, the output access controllable gain amplifier of previous stage photoconductive detector, the output terminal access moment discrimination circuit of peak detctor, its feedback signal insertion gain controller; The control signal access controllable gain amplifier of gain controller.Gain controller controls controllable gain amplifier according to feedback signal, and the pulse signal amplitude making it amplify remains in fixing interval, and the change effectively reduced due to pulse signal strength causes moment driscrimination error.
The structure of first, second moment discrimination circuit described is identical, comprise chronotron, low-pass filter, oppositely input circuit, 2 high-speed comparators and d type flip flop, previous stage automatic gain control circuit output signal is divided into three tunnels, first via signal is through the normal phase input end of chronotron input high-speed comparator A, second road signal is input to the inverting input of high-speed comparator A through low-pass filter, 3rd road signal is directly inputted to the normal phase input end of high-speed comparator B, the inverting input of the output signal access high-speed comparator B of reverse input circuit.The output access d type flip flop of high-speed comparator A and high-speed comparator B, the Transistor-Transistor Logic level signal of the d type flip flop output of first, second moment discrimination circuit is respectively as starting timing and terminating opening and stopping passage of timing signal digital signal processing module turn-on time.
High-speed comparator A, B response time in first, second moment discrimination circuit described is less than 500ps, and most high workload band is wider than 4GHz, and is furnished with TTL/CMOS level compatibility and exports.
This power on circuitry during use, complete initialization, the mode of operation of host computer configuration main control module and measurement pattern when needing, i.e. the mode of operation of select time digital conversion chip and measurement pattern, main control module sends instructions to the drive circuit for laser of laser pulse radiating portion, drive circuit for laser drive laser sends pulse laser beam, laser beam is divided into two bundles through optical fiber splitter, wherein a branch of the second photodetector directly entering laser pulse receiving unit, second automatic gain control circuit and the second moment discrimination circuit, another Shu Ze enters the first photodetector through fibre delay line to be measured, first automatic gain control circuit and the first moment discrimination circuit, light signal is converted to pulse electrical signal by photodetector, the analog pulse Voltage Cortrol changed by pulsed laser signal of automatic gain control circuit is the amplitude pulse voltage signal consistent with shape convergence.Automatic gain control circuit export pulse voltage signal be divided into three tunnels in moment discrimination circuit, through chronotron be input to the reverse time delayed signal of high-speed comparator A normal phase input end and through low-pass filter decay after deamplification be added, produce zero crossing be the moment differentiate timing point.When the positive of high-speed comparator A, the relative size of anti-phase input end signal change, its output state changes, moment point after state changes is not by the impact of the change of input signal amplitude, timing point occurs when signal reaches its a certain fixed size ratio all the time, therefore can realize the discriminating of constant ratio moment.High-speed comparator B as discriminating comparer, the Signal Regulation of reverse input circuit its differentiate threshold value.The time-ofday signals that high-speed comparator A and B exports is sent into d type flip flop and is produced synchronous TTL signal.Reverse input circuit sets a threshold value differentiated, changes threshold size by regulating the output voltage of direction input circuit.Only have when the amplitude of high-speed comparator B input signal is greater than discrimination threshold, high-speed comparator B just exports CLK (clock) input end that " height " signal enters d type flip flop, makes d type flip flop produce the signal synchronous with high-speed comparator A.And when high-speed comparator B input signal is lower than discrimination threshold, d type flip flop exports as high level.
The unblank road of TTL signal digital signal processing module turn-on time directly enter the pulse laser of the first photodetector, producing through the first automatic gain control circuit and the first moment discrimination circuit is the start signal of its timing; The pulse laser entering the second photodetector through fibre delay line, produce through the second automatic gain control circuit and the second moment discrimination circuit TTL signal digital signal processing module turn-on time stop passage, be the termination signal of its timing.Digital signal processing module obtains the mistiming of the two by the start signal of timing and the termination signal of timing, converts digital signal to, sends to host computer through main control module, and host computer shows and exports measurement result.After main control module obtains measurement result, send instructions to the drive circuit for laser of laser pulse radiating portion, stop Laser emission.
Compared with prior art, the advantage of the delay time measurement circuit of a kind of fibre delay line of the utility model is: 1, it is consistent that automatic gain control circuit control wave amplifies amplitude convergence, reduce the moment driscrimination error of whole circuit, moment discrimination circuit is that constant ratio is differentiated, even if output amplitude changes, timing point produces when signal reaches fixed proportion all the time, effectively reduce the drift error caused by the change of laser pulse amplitude, in conjunction with the Ultra-short pulse laser of laser instrument, time figure conversion chip can realize the delay time measurement of picosecond, measuring accuracy is high, measurement refresh rate is high, 2, this circuit adopts existing components and parts, easy to implement, and volume is little, low in energy consumption, is applicable to the measurement of each field fibre delay line time delay.
Accompanying drawing explanation
Fig. 1 is the structured flowchart of the delay time measurement circuit of this fibre delay line.
Fig. 2 is the automatic gain control circuit block diagram of laser pick-off part in Fig. 1;
Fig. 3 is the moment discrimination circuit block diagram circuit of laser pick-off part in Fig. 1.
Embodiment
The delay time measurement circuit embodiment of this fibre delay line as shown in Figure 1, comprises laser pulse radiating portion, laser pulse receiving unit, time figure processing module and main control module.
This routine main control module comprises interconnective on-site programmable gate array FPGA and microprocessor unit MCU, field programmable gate array is connected with drive circuit for laser, provide pulse signal for it, and field programmable gate array is also for the time figure conversion chip of time figure processing module provides clock signal.Microprocessor unit is connected with host computer by USB interface or RS232 interface, accepts the instruction of host computer and transmits measurement result to host computer.Microprocessing unit is connected with time figure conversion chip through Serial Peripheral Interface (SPI) (SPI interface), to complete the optimum configurations of host computer to it, and reads the measurement result of its gained.Microprocessing unit is also for other each circuit provides drive control signal, makes it normal work.The correlation parameter of host computer configuration main control module microprocessing unit, the process of control lag time measurement, measurement result is by host computer display translation.
This routine laser pulse radiating portion comprises laser instrument, drive circuit for laser, optical fiber splitter, the control end of the signal output part access laser instrument of drive circuit for laser, the laser incoming fiber optic shunt that laser instrument is launched.The laser instrument of this example is single longitudinal mode Distributed Feedback Laser, and centre wavelength is 1064nm, pulsewidth 2ns, and rise and fall time is less than 500ps.The drive current that drive circuit for laser provides 100mA to 700mA controlled, and produce pulsewidth 2ns, the pulse signal of rising edge 500ps.
This routine optical fiber splitter is single-mode fiber shunt, and splitting ratio is 95:5, and most of laser beam enters testing fiber lag line.
Laser pulse receiving unit comprises the identical circuit of two covers, namely be linked in sequence the first photodetector, the first automatic gain control circuit and the first moment discrimination circuit, and second photodetector that is linked in sequence, the second automatic gain control circuit and the second moment discrimination circuit.The road narrow-pulse laser that optical fiber splitter separates directly enters the first photodetector, and another road narrow-pulse laser enters the second photodetector after fibre delay line to be measured.The electric signal of two photodetector conversion gained accesses respective moment discrimination circuit through respective automatic gain control circuit respectively.The output of the first moment discrimination circuit and the second moment discrimination circuit is respectively as starting timing and terminating opening and stopping passage of timing signal digital signal processing module turn-on time.
This routine time figure processing module is time figure conversion chip and accessory circuit, it exports the microprocessing unit of access main control module, this routine time figure conversion chip is the TDC-GPX chip of German ACAM company, it is R pattern that this routine host computer arranges its mode of operation, two-channel 2-4 7 picosecond precision, single channel 40MHz sampling rate, configurable as expansion.
First, second photodetector of this example is that response frequency is greater than 7.5GHz, and dark current is less than 5nA, and response wave length covers the APD type light electric explorer of 1064 ± 20nm.
The structure of first, second automatic gain control circuit described is identical, as shown in Figure 2, comprise the controllable gain amplifier and peak detctor that are linked in sequence, also has gain controller, the output access controllable gain amplifier of photodetector, the output terminal access moment discrimination circuit of peak detctor, its feedback signal insertion gain controller; The control signal access controllable gain amplifier of gain controller.
The structure of first, second moment discrimination circuit described is identical, as shown in Figure 3, comprise chronotron, low-pass filter, oppositely input circuit, 2 high-speed comparators and d type flip flop, previous stage automatic gain control circuit output signal is divided into three tunnels, first via signal is through the normal phase input end of chronotron input high-speed comparator A, second road signal is input to the inverting input of high-speed comparator A through low-pass filter, 3rd road signal is directly inputted to the normal phase input end of high-speed comparator B, the inverting input of the output signal access high-speed comparator B of reverse input circuit.The output access d type flip flop of high-speed comparator A and high-speed comparator B, the Transistor-Transistor Logic level signal of the d type flip flop output of first, second moment discrimination circuit is respectively as starting timing and terminating opening and stopping passage of timing signal digital signal processing module turn-on time.
During the work of this example, laser pulse radiating portion, the pulsewidth 2ns produced is driven by drive circuit for laser, the laser pulse signal of rising edge 500ps, the first photodetector of laser pick-off part is directly delivered to through the pulsed optical signals of optical fiber splitter 5%, through the first automatic gain control circuit, the first moment discrimination circuit, the synchronous TTL signal of gained finally enters the starting point of K passage as timing of processing module digit time; 95% pulsed optical signals is by entering the second photodetector after fibre delay line, through the second automatic gain control circuit, the second moment discrimination circuit, the synchronous TTL signal of gained finally enters the end point of K passage as timing of processing module digit time.The number that time figure conversion chip meter calculates the logic gate of process between timing commencing signal and timing end signal just can calculate the time interval between binary signal accurately, and is converted to digital signal as measurement result.Read by microprocessing unit, send host computer display translation to.
Above-described embodiment, be only the specific case further described the purpose of this utility model, technical scheme and beneficial effect, the utility model is not defined in this.All make within scope of disclosure of the present utility model any amendment, equivalent replacement, improvement etc., be all included within protection domain of the present utility model.
Claims (8)
1. a delay time measurement circuit for fibre delay line, comprises laser pulse radiating portion, laser pulse receiving unit, time figure processing module and main control module;
Described laser pulse radiating portion comprises laser instrument, drive circuit for laser, optical fiber splitter, the control end of the signal output part access laser instrument of drive circuit for laser, the laser incoming fiber optic shunt that laser instrument is launched;
Laser pulse receiving unit comprises the identical circuit of two covers, namely be linked in sequence the first photodetector, the first automatic gain control circuit and the first moment discrimination circuit, and second photodetector that is linked in sequence, the second automatic gain control circuit and the second moment discrimination circuit; The road narrow-pulse laser that optical fiber splitter separates directly enters the first photodetector, another road narrow-pulse laser enters the second photodetector after fibre delay line to be measured, and the electric signal of two photodetector conversion gained accesses respective moment discrimination circuit through respective automatic gain control circuit respectively;
The output of the first moment discrimination circuit and the second moment discrimination circuit is respectively as starting timing and terminating opening and stopping passage of timing signal digital signal processing module turn-on time; Time figure processing module is time figure conversion chip and accessory circuit, and it exports access main control module;
Main control module is connected with host computer.
2. the delay time measurement circuit of fibre delay line according to claim 1, is characterized in that:
Described laser instrument is single longitudinal mode Distributed Feedback Laser, and centre wavelength is 1064nm, and spectrum width is less than 10nm, and rise and fall time is less than 1ns.
3. the delay time measurement circuit of fibre delay line according to claim 1, is characterized in that:
Described optical fiber splitter is single-mode fiber shunt, and splitting ratio is 90:10 ~ 97:3, and most of laser beam enters testing fiber lag line.
4. the delay time measurement circuit of fibre delay line according to claim 1, is characterized in that:
Described photodetector is that response frequency is greater than 7.5GHz, and dark current is less than 5nA, and response wave length covers the APD type light electric explorer of 1064 ± 20nm.
5. the delay time measurement circuit of fibre delay line according to claim 1, is characterized in that:
The structure of first, second automatic gain control circuit described is identical, comprise the controllable gain amplifier and peak detctor that are linked in sequence, also has gain controller, the output access controllable gain amplifier of previous stage photoconductive detector, the output terminal access moment discrimination circuit of peak detctor, its feedback signal insertion gain controller; The control signal access controllable gain amplifier of gain controller.
6. the delay time measurement circuit of fibre delay line according to claim 1, is characterized in that:
The structure of first, second moment discrimination circuit described is identical, comprise chronotron, low-pass filter, oppositely input circuit, 2 high-speed comparators and d type flip flop, previous stage automatic gain control circuit output signal is divided into three tunnels, first via signal is through the normal phase input end of chronotron input high-speed comparator A, second road signal is input to the inverting input of high-speed comparator A through low-pass filter, 3rd road signal is directly inputted to the normal phase input end of high-speed comparator B, the inverting input of the output signal access high-speed comparator B of reverse input circuit; The output access d type flip flop of high-speed comparator A and high-speed comparator B, the Transistor-Transistor Logic level signal of the d type flip flop output of first, second moment discrimination circuit is respectively as starting timing and terminating opening and stopping passage of timing signal digital signal processing module turn-on time.
7. the delay time measurement circuit of fibre delay line according to claim 6, is characterized in that:
High-speed comparator A, B response time in first, second moment discrimination circuit described is less than 500ps, and most high workload band is wider than 4GHz, and is furnished with TTL/CMOS level compatibility and exports.
8. the delay time measurement circuit of fibre delay line according to claim 1, is characterized in that:
Described main control circuit comprises interconnective field programmable gate array and microprocessor unit, field programmable gate array is connected with drive circuit for laser, microprocessor unit is connected with host computer by USB interface or RS232 interface, and microprocessing unit is connected with time figure conversion chip through Serial Peripheral Interface (SPI).
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104458215A (en) * | 2014-12-30 | 2015-03-25 | 中国电子科技集团公司第三十四研究所 | Delay time measuring circuit for optical fiber delay line |
| CN106500783A (en) * | 2016-12-08 | 2017-03-15 | 深圳市锐能微科技股份有限公司 | A kind of hydro-thermal table and its current amount detecting device |
| CN108614272A (en) * | 2018-04-13 | 2018-10-02 | 中山大学 | A kind of pulse type laser range-measuring circuit |
| CN109238658A (en) * | 2018-09-12 | 2019-01-18 | 电子科技大学 | The measurement method and device of the delay parameter of light delay device |
| CN112255618A (en) * | 2020-09-29 | 2021-01-22 | 中国兵器工业集团第二一四研究所苏州研发中心 | Pixel-level time discrimination circuit |
| CN112291120A (en) * | 2020-12-29 | 2021-01-29 | 苏州裕太微电子有限公司 | Delay line structure and correction method of delay jitter thereof |
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2014
- 2014-12-30 CN CN201420860695.6U patent/CN204330291U/en active Active
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104458215A (en) * | 2014-12-30 | 2015-03-25 | 中国电子科技集团公司第三十四研究所 | Delay time measuring circuit for optical fiber delay line |
| CN106500783A (en) * | 2016-12-08 | 2017-03-15 | 深圳市锐能微科技股份有限公司 | A kind of hydro-thermal table and its current amount detecting device |
| CN108614272A (en) * | 2018-04-13 | 2018-10-02 | 中山大学 | A kind of pulse type laser range-measuring circuit |
| CN109238658A (en) * | 2018-09-12 | 2019-01-18 | 电子科技大学 | The measurement method and device of the delay parameter of light delay device |
| CN112255618A (en) * | 2020-09-29 | 2021-01-22 | 中国兵器工业集团第二一四研究所苏州研发中心 | Pixel-level time discrimination circuit |
| CN112255618B (en) * | 2020-09-29 | 2024-01-05 | 中国兵器工业集团第二一四研究所苏州研发中心 | Pixel-level moment identification circuit |
| CN112291120A (en) * | 2020-12-29 | 2021-01-29 | 苏州裕太微电子有限公司 | Delay line structure and correction method of delay jitter thereof |
| CN112291120B (en) * | 2020-12-29 | 2021-06-15 | 苏州裕太微电子有限公司 | Delay line structure and correction method of delay jitter thereof |
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