CN204327554U - Fan operating control circuit - Google Patents
Fan operating control circuit Download PDFInfo
- Publication number
- CN204327554U CN204327554U CN201420767089.XU CN201420767089U CN204327554U CN 204327554 U CN204327554 U CN 204327554U CN 201420767089 U CN201420767089 U CN 201420767089U CN 204327554 U CN204327554 U CN 204327554U
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- resistance
- electrically connected
- circuit
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- control circuit
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Abstract
The utility model discloses a kind of fan operating control circuit, it comprises integration circuit, ON-OFF control circuit, drive IC and switch, this integration circuit received pulse modulating signal also exports VDC, this ON-OFF control circuit has the first transistor and the first charge-discharge circuit, this the first transistor receives this VDC, this first charge-discharge circuit is electrically connected this first transistor and exports a switch controlling signal, this drive IC has capacitance switch pin position and switching capacity, this capacitance switch pin position is electrically connected this switching capacity, this switch is electrically connected this first charge-discharge circuit and this switching capacity.This fan operating control circuit of the present utility model starts the protection mechanism of drive IC when the operation cycle of this PM signal switches to low by height; make fan can reduce rotating speed rapidly; to avoid fan rotating speed when the operation cycle of this PM signal switches to low by height too high, system interpretation rotating speed is caused to occur abnormal.
Description
Technical field
The utility model is about a kind of control circuit, particularly about a kind of fan operating control circuit.
Background technique
The drive IC of general known fan has capacitance switch pin position (CT pin); this capacitance switch pin position connecting valve electric capacity; this capacitance switch pin position is for carrying out the detecting fault of fan and resetting automatically to protect fan and make the normal operation of fan energy, and the charge-discharge velocity being connected to this switching capacity of this capacitance switch pin position determines the time length that the detecting fault of this fan and fan reset automatically.Wherein, in the detecting fault time, (as: this stopping fan rotation when if the Hall sensing signal that the Hall element of this fan senses does not change, Hall element is caused to continue to sense the magnetic pole of same position), this switching capacity can be made to be continuously charged and more than a voltage quasi position, now, drive IC can stop output drive signal to fan winding, damages to avoid fan winding to continue through electric current.And drive IC stops output drive signal the time of resetting automatically through one, this switching capacity is discharged and lower than after a voltage quasi position, this drive IC can again output drive signal to fan winding to attempt this fan of startup.But say as above-mentioned; the protection mechanism of this capacitance switch pin position of this drive IC only just can start when this stopping fan rotation; if this fan is only by when switching at a high speed low speed; the protection mechanism of this capacitance switch pin position of this drive IC can't start; cause fan by after switching to low speed at a high speed; the still high speed rotating because of inertia within a period of time, causes system to occur the rotating speed interpretation of fan abnormal.
Model utility content
In view of this; main purpose of the present utility model is to provide a kind of fan operating control circuit; the driving being adjusted the corresponding rotation speed of the fan of drive IC by the setting of integration circuit, ON-OFF control circuit and switch is interval; make drive IC at fan by can starting protection mechanism when switching at a high speed low speed, make fan reduce rotating speed fast and normally to rotate.
For achieving the above object, the utility model provides a kind of fan operating control circuit, it comprises integration circuit, ON-OFF control circuit, drive IC and switch, this integration circuit received pulse modulating signal also exports VDC, this PM signal has the operation cycle, this operation cycle is lower, the level of this VDC is higher, this ON-OFF control circuit has the first transistor and the first charge-discharge circuit, this the first transistor receives this VDC, and this DC voltage control this first transistor conducting or cut-off, this first charge-discharge circuit is electrically connected this first transistor, and this first charge-discharge circuit output switch control signal, this drive IC has capacitance switch pin position and switching capacity, this capacitance switch pin position is electrically connected the first end of this switching capacity, this switch is electrically connected the second end of this first charge-discharge circuit and this switching capacity, this switch controlling signal controls this switch conduction or cut-off, wherein this second end of this switching capacity is via this switch ground connection.
This ON-OFF control circuit has the first bleeder circuit, and this first bleeder circuit is electrically connected this integration circuit, and this first transistor receives this VDC via this first bleeder circuit.
This first bleeder circuit has the first resistance, the second resistance and the 3rd resistance, one end of this first resistance receives this VDC, the other end of this first resistance is electrically connected first node, one end of this second resistance receives reference voltage, the other end of this second resistance is electrically connected this first node, one end of 3rd resistance is electrically connected this first node, the other end ground connection of the 3rd resistance.
This first transistor is P-type crystal pipe, this the first transistor has that the first grid is extreme, the first drain electrode end and the first source terminal, this first grid is extremely electrically connected this first node, and this first source terminal is electrically connected this first charge-discharge circuit, this first drain electrode end ground connection.
This first charge-discharge circuit has the first electric capacity, the 4th resistance and the 5th resistance, one end of 4th resistance receives power supply, the other end of the 4th resistance is electrically connected this first source terminal of this first transistor, one end of this first electric capacity is electrically connected this first source terminal of this first transistor, the other end of this first electric capacity is electrically connected Section Point, one end of 5th resistance is electrically connected this Section Point, the other end ground connection of the 5th resistance, wherein this switch controlling signal is the voltage of this Section Point.
This switch is P-type crystal pipe, and this switch has that second gate is extreme, the second drain electrode end and the second source terminal, and this second gate is extremely electrically connected Section Point, and this second source terminal is electrically connected this switching capacity, this second drain electrode end ground connection.
This integration circuit has transistor seconds, the second bleeder circuit and the second charge-discharge circuit, this transistor seconds receives this PM signal, this second bleeder circuit is electrically connected this transistor seconds, and this second bleeder circuit receives this reference voltage, this second charge-discharge circuit is electrically connected this second bleeder circuit and this first bleeder circuit.
This transistor seconds is N-type transistor, and this transistor seconds has base terminal, collector terminal and emitter terminal, and this base terminal receives this PM signal, and this collector terminal is electrically connected this second bleeder circuit, this emitter terminal ground connection.
This second bleeder circuit has the 6th resistance, the 7th resistance and the 8th resistance, one end of 6th resistance is electrically connected this collector terminal, the other end of the 6th resistance is electrically connected the 3rd node, one end of 7th resistance receives this reference voltage, the other end of the 7th resistance is electrically connected the 3rd node, one end of 8th resistance is electrically connected the 3rd node, the other end ground connection of the 8th resistance.
This second charge-discharge circuit has the 9th resistance and the second electric capacity, one end of 9th resistance is electrically connected the 3rd node, the other end of the 9th resistance is electrically connected the 4th node, one end of this second electric capacity is electrically connected the 4th node, the other end ground connection of this second electric capacity, wherein this VDC is the voltage of the 4th node.
The utility model makes this drive IC starting protection mechanism when the operation cycle of this PM signal switches to low by height by the setting of this integration circuit, this ON-OFF control circuit and this switch; to reduce the rotating speed of fan rapidly; avoid this fan still with high rotational speed when the high workload cycle switches to low duty cycle, and cause occurring extremely during system interpretation rotation speed of the fan.
Accompanying drawing explanation
Fig. 1 is according to an embodiment of the present utility model, a kind of functional block diagram of fan operating control circuit;
Fig. 2 is according to an embodiment of the present utility model, a kind of circuit diagram of fan operating control circuit.
Description of reference numerals
100 fan operating control circuit 110 integration circuit
111 transistor seconds 112 second bleeder circuits
113 second charge-discharge circuit 120 ON-OFF control circuits
121 the first transistor 122 first charge-discharge circuits
123 first bleeder circuit 130 drive IC
131 capacitance switch pin position 132 switching capacities
132a first end 132b second end
140 switch PWM PM signals
Vdc VDC Vcon switch controlling signal
VReg reference voltage VCC power supply
R1 first resistance R2 second resistance
R3 the 3rd resistance R4 the 4th resistance
R5 the 5th resistance R6 the 6th resistance
R7 the 7th resistance R8 the 8th resistance
R9 the 9th resistance N1 first node
N2 Section Point N3 the 3rd node
N4 the 4th node C1 first electric capacity
The C2 second electric capacity g1 first grid is extreme
G2 second gate extreme d1 first drain electrode end
D2 second drain electrode end s1 first source terminal
S2 second source terminal b base terminal
C collector terminal e emitter terminal.
Embodiment
Refer to Fig. 1, for a kind of embodiment of the present utility model, a kind of functional block diagram of fan operating control circuit 100, this fan operating control circuit 100 is in order to output drive signal to control the running of fan, and this fan operating control circuit 100 comprises integration circuit 110, ON-OFF control circuit 120, drive IC 130 and switch 140.This integration circuit 110 received pulse modulating signal PWM (Pulse-width Modulation) also exports VDC Vdc, and this PM signal PWM is in order to control the rotating speed of this fan.Wherein this PM signal PWM has the operation cycle (Duty cycle), and when this operation cycle is higher, then the rotating speed of this fan is higher, and when this operation cycle is lower, then the rotating speed of this fan is lower.
Refer to Fig. 1 and Fig. 2, in the present embodiment, this integration circuit 110 has transistor seconds 111, second bleeder circuit 112 and the second charge-discharge circuit 113, this transistor seconds 111 receives this PM signal PWM, this second bleeder circuit 112 is electrically connected this transistor seconds 111, and this second bleeder circuit 112 receives reference voltage VReg by this drive IC 130, this reference voltage VReg is the VDC provided by this drive IC 130.This second charge-discharge circuit 113 is electrically connected this second bleeder circuit 112.In the present embodiment, this transistor seconds 111 is a N-type transistor, this transistor seconds 111 has base terminal b, collector terminal c and emitter terminal e, this base terminal b receives this PM signal PWM, this collector terminal c is electrically connected this second bleeder circuit 112, this emitter terminal e ground connection, this second bleeder circuit 112 has one the 6th resistance R6, one the 7th resistance R7 and the 8th resistance R8, one end of 6th resistance R6 is electrically connected this collector terminal c, the other end of the 6th resistance R6 is electrically connected the 3rd node N3, one end of 7th resistance R7 receives this reference voltage VReg, the other end of the 7th resistance R7 is electrically connected the 3rd node N3, one end of 8th resistance R8 is electrically connected the 3rd node N3, the other end ground connection of the 8th resistance R8, 7th resistance R7 and the 8th resistance R8 is depressed into the 3rd node N3 in order to be divided by this reference voltage VReg.This second charge-discharge circuit 113 has the 9th resistance R9 and the second electric capacity C2, one end of 9th resistance R9 is electrically connected the 3rd node N3, the other end of the 9th resistance R9 is electrically connected the 4th node N4, one end of this second electric capacity C2 is electrically connected the 4th node N4, the other end ground connection of this second electric capacity C2, this VDC Vdc that wherein this integration circuit 110 exports is the voltage of the 4th node N4, wherein, when this operation cycle of this PM signal PWM is lower, the level of this VDC Vdc that this integration circuit 110 exports is higher.
Refer to Fig. 1 and Fig. 2, this ON-OFF control circuit 120 has the first transistor 121, first charge-discharge circuit 122 and the first bleeder circuit 123, this first bleeder circuit 123 is electrically connected this second charge-discharge circuit 113 of this integration circuit 110, this the first transistor 121 receives this VDC Vdc via this first bleeder circuit 123, and this VDC Vdc controls this first transistor 121 conducting or cut-off, this first charge-discharge circuit 122 is electrically connected this first transistor 121, and this first charge-discharge circuit 122 output switch control signal Vcon.In the present embodiment, this first bleeder circuit 123 has the first resistance R1, second resistance R2 and the 3rd resistance R3, one end of this first resistance R1 is electrically connected the 4th node N4, to receive this VDC Vdc, the other end of this first resistance R1 is electrically connected first node N1, one end of this second resistance R2 receives this reference voltage VReg, the other end of this second resistance R2 is electrically connected this first node N1, one end of 3rd resistance R3 is electrically connected this first node N1, the other end ground connection of the 3rd resistance R3, this the second resistance R2 and the 3rd resistance R3 is depressed into this first node N1 in order to be divided by this reference voltage VReg.This the first transistor 121 is P-type crystal pipe, this the first transistor 121 has the extreme g1 of the first grid, first drain electrode end d1 and the first source terminal s1, the extreme g1 of this first grid is electrically connected this first node N1, this first source terminal s1 is electrically connected this first charge-discharge circuit 122, this first drain electrode end d1 ground connection, this first charge-discharge circuit 122 has the first electric capacity C1, 4th resistance R4 and the 5th resistance R5, one end of 4th resistance R4 receives power supply VCC, the other end of the 4th resistance R4 is electrically connected this first source terminal s1 of this first transistor 121, one end of this first electric capacity C1 is electrically connected this first source terminal s1 of this first transistor 121, the other end of this first electric capacity C1 is electrically connected Section Point N2, one end of 5th resistance R5 is electrically connected this Section Point N2, the other end ground connection of the 5th resistance R5, this power supply VCC charges to this first charge-discharge circuit 122, the voltage of this Section Point N2 is made to increase instantaneously, decline along with the voltage rise of this first electric capacity C1 again, wherein this switch controlling signal Vcon is the voltage of this Section Point N2.
Refer to Fig. 1 and Fig. 2, this drive IC 130 has capacitance switch pin position 131 and switching capacity 132, and this capacitance switch pin position 131 is electrically connected the first end 132a of this switching capacity 132.This switch 140 is electrically connected the second end 132b of this first charge-discharge circuit 122 and this switching capacity 132, this switch controlling signal Vcon controls this switch 140 conducting or cut-off, wherein this second end 132b of this switching capacity 132 is via this switch 140 ground connection, in the present embodiment, this switch 140 is a P-type crystal pipe, this switch 140 has the extreme g2 of a second gate, one second drain electrode end d2 and one second source terminal s2, the extreme g2 of this second gate is electrically connected this Section Point N2, this second source terminal s2 is electrically connected this second end 132b of this switching capacity 132, this second drain electrode end d2 ground connection.
Refer to Fig. 1 and Fig. 2, the circuit operation of this fan operating control circuit 100 is as follows: when the operation cycle of this PM signal PWM switches to low by height, because the time of this transistor seconds 111 relative conduction declines, therefore in an operation cycle, this reference voltage VReg increased the duration of charge of this second charge-discharge circuit 113, made this VDC Vdc of the 4th node N4 increase.And when the operation cycle of this PM signal PWM drop to a setting value and this VDC Vdc of the 4th node N4 rises to a default value time, the voltage rise of this first node N1 is to the size of enough ending this first transistor 121, this the first transistor 121 is ended, and wherein this setting value and this default value visual user demand determine by the impedance magnitude changing bleeder circuit.After the cut-off of this first transistor 121; this power supply VCC charges to this first charge-discharge circuit 122; the voltage instantaneous of this switch controlling signal Vcon of this Section Point N2 is made to increase, because this switch 140 is P-type crystal pipe, therefore; after the voltage rise of this switch controlling signal Vcon; this switch 140 ends, and makes this capacitance switch pin position 131 open circuit, and now the protection mechanism of this drive IC 130 starts; and stop exporting this drive singal to this fan, the rotating speed of this fan can be declined fast.Then; when making this Section Point N2 form open circuit after this first electric capacity C1 full charging pressure; make the voltage drop of this switch controlling signal Vcon and this switch 140 of conducting; this capacitance switch pin position 131 is recovered path and stops the protection mechanism of this drive IC 130; namely this drive IC 130 exports the drive singal of PM signal PWM of low duty cycle driving this fan turns, and this fan can normally be rotated with the slow-speed of revolution.
The utility model makes this drive IC 130 starting protection mechanism when the operation cycle of this PM signal PWM switches to low by height by the setting of this integration circuit 110, this ON-OFF control circuit 120 and this switch 140; to reduce the rotating speed of fan rapidly; avoid fan still with high rotational speed when the high workload cycle switches to low duty cycle, and cause occurring extremely during system interpretation rotation speed of the fan.
Protection domain of the present utility model is when being as the criterion depending on the right person of defining, and any people knowing technique, not departing from any change and amendment done in spirit and scope of the present utility model, all belongs to protection domain of the present utility model.
Claims (10)
1. a fan operating control circuit, is characterized in that, it comprises:
Integration circuit, its received pulse modulating signal also exports VDC, and this PM signal has the operation cycle, and this operation cycle is lower, and the level of this VDC is higher;
ON-OFF control circuit, it has the first transistor and the first charge-discharge circuit, this the first transistor receives this VDC, and this DC voltage control this first transistor conducting or cut-off, this first charge-discharge circuit is electrically connected this first transistor, and this first charge-discharge circuit output switch control signal;
Drive IC, it has capacitance switch pin position and switching capacity, and this capacitance switch pin position is electrically connected the first end of this switching capacity; And
Switch, it is electrically connected the second end of this first charge-discharge circuit and this switching capacity, and this switch controlling signal controls this switch conduction or cut-off, and wherein this second end of this switching capacity is via this switch ground connection.
2. fan operating control circuit as claimed in claim 1, it is characterized in that, this ON-OFF control circuit has the first bleeder circuit, and this first bleeder circuit is electrically connected this integration circuit, and this first transistor receives this VDC via this first bleeder circuit.
3. fan operating control circuit as claimed in claim 2, it is characterized in that, this first bleeder circuit has the first resistance, the second resistance and the 3rd resistance, one end of this first resistance receives this VDC, the other end of this first resistance is electrically connected first node, and one end of this second resistance receives reference voltage, and the other end of this second resistance is electrically connected this first node, one end of 3rd resistance is electrically connected this first node, the other end ground connection of the 3rd resistance.
4. fan operating control circuit as claimed in claim 3, it is characterized in that, this the first transistor is P-type crystal pipe, this the first transistor has that the first grid is extreme, the first drain electrode end and the first source terminal, this first grid is extremely electrically connected this first node, this first source terminal is electrically connected this first charge-discharge circuit, this first drain electrode end ground connection.
5. fan operating control circuit as claimed in claim 4, it is characterized in that, this first charge-discharge circuit has the first electric capacity, 4th resistance and the 5th resistance, one end of 4th resistance receives power supply, the other end of the 4th resistance is electrically connected this first source terminal of this first transistor, one end of this first electric capacity is electrically connected this first source terminal of this first transistor, the other end of this first electric capacity is electrically connected a Section Point, one end of 5th resistance is electrically connected this Section Point, the other end ground connection of the 5th resistance, wherein this switch controlling signal is the voltage of this Section Point.
6. fan operating control circuit as claimed in claim 5, it is characterized in that, this switch is P-type crystal pipe, this switch has that second gate is extreme, the second drain electrode end and the second source terminal, this second gate is extremely electrically connected Section Point, this second source terminal is electrically connected this switching capacity, this second drain electrode end ground connection.
7. fan operating control circuit as claimed in claim 3, it is characterized in that, this integration circuit has transistor seconds, the second bleeder circuit and the second charge-discharge circuit, this transistor seconds receives this PM signal, this second bleeder circuit is electrically connected this transistor seconds, and this second bleeder circuit receives this reference voltage, this second charge-discharge circuit is electrically connected this second bleeder circuit and this first bleeder circuit.
8. fan operating control circuit as claimed in claim 7, it is characterized in that, this transistor seconds is N-type transistor, this transistor seconds has base terminal, collector terminal and emitter terminal, this base terminal receives this PM signal, this collector terminal is electrically connected this second bleeder circuit, this emitter terminal ground connection.
9. fan operating control circuit as claimed in claim 8, it is characterized in that, this second bleeder circuit has the 6th resistance, the 7th resistance and the 8th resistance, one end of 6th resistance is electrically connected this collector terminal, the other end of the 6th resistance is electrically connected the 3rd node, and one end of the 7th resistance receives this reference voltage, and the other end of the 7th resistance is electrically connected the 3rd node, one end of 8th resistance is electrically connected the 3rd node, the other end ground connection of the 8th resistance.
10. fan operating control circuit as claimed in claim 9, it is characterized in that, this second charge-discharge circuit has the 9th resistance and the second electric capacity, one end of 9th resistance is electrically connected the 3rd node, the other end of the 9th resistance is electrically connected the 4th node, one end of this second electric capacity is electrically connected the 4th node, the other end ground connection of this second electric capacity, and wherein this VDC is the voltage of the 4th node.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420767089.XU CN204327554U (en) | 2014-12-09 | 2014-12-09 | Fan operating control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420767089.XU CN204327554U (en) | 2014-12-09 | 2014-12-09 | Fan operating control circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN204327554U true CN204327554U (en) | 2015-05-13 |
Family
ID=53163921
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201420767089.XU Expired - Fee Related CN204327554U (en) | 2014-12-09 | 2014-12-09 | Fan operating control circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN204327554U (en) |
-
2014
- 2014-12-09 CN CN201420767089.XU patent/CN204327554U/en not_active Expired - Fee Related
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150513 Termination date: 20161209 |