CN204316823U - A kind of delay switch - Google Patents
A kind of delay switch Download PDFInfo
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- CN204316823U CN204316823U CN201420760661.XU CN201420760661U CN204316823U CN 204316823 U CN204316823 U CN 204316823U CN 201420760661 U CN201420760661 U CN 201420760661U CN 204316823 U CN204316823 U CN 204316823U
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- bridge rectifier
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B20/00—Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
- Y02B20/40—Control techniques providing energy savings, e.g. smart controller or presence detection
Abstract
The utility model discloses a kind of delay switch, comprising: bridge rectifier, ghyristor circuit, triggered switch circuit, zero circuits for triggering, NAND gate circuit, delay circuit and voltage-stabiliser tube and the first electric capacity; Ghyristor circuit comprises the controllable silicon, the 5th diode and the 6th diode that are sequentially connected in series; Triggered switch circuit comprises the light emitting diode lamp, the first resistance, the second resistance, the 9th resistance and the trigger switch that are sequentially connected in series; Zero circuits for triggering comprise the 3rd resistance, the 4th resistance, the 5th resistance, NPN type triode and the 8th resistance.The utility model quiescent dissipation is low, lower than 0.005W, not only greatly reduces the consumption of the energy, also improves the matching degree of two-wire system button delay switch and electricity-saving lamp, LED lamp; Cost is low, and circuit is simple; Silicon controlled conducting starts conducting when voltage is 0 current potential, can effectively protect controllable silicon.
Description
Technical field
The utility model relates to delay switch field, is specifically related to a kind of electronic time-delay switch of Micro Energy Lose.
Background technology
Delay switch is a kind of novel automatic time delay electronic switch developed in order to conservation of power resource, power saving, convenience, the function of this switch controls lighting to light and automatic distinguishing after time delay a period of time, and its applicable load comprises LED lamp, fluorescent lamp, incandescent lamp, Halogen lamp LED etc.Delay switch is mainly used in the places such as school, residential building, complex building, office building, megastore, bank, hotel guest-room, villa, public corridor, underground automobile garage, delay switch to be installed at the Lift & Stairs mouth of each floor, be conducive to saves energy.Every have some places of public use to use delay switch.
Touching delay-action switch, sound and light controlled delay switch etc. is had in delay switch.As long as with hand have a touch with switch touch sheet or give voice signal with regard to automatic illuminating.Automatically close when people leaves in 30 seconds to 75 seconds, for national energy, portion recommends product to the utmost.What touching time-delay switch utilized is the principle same with voltage test pencil, namely the resistance that series connection one is very large between human body and power supply, like this, the electric current (voltage is low, but electric current might not be little) of a formation low-voltage is known from experience by people, final inflow the earth, formed and trigger loop, like this, just can start timing by Time delay switch, and connect electric light major loop, lamp is just bright.
At present, the electrical type delay switch of the majority on market is only applicable to incandescent lamp, or is applicable to part electricity-saving lamp.Wherein the quiescent dissipation of most products is all higher than 0.01W, only meet with on the market about 60% electricity-saving lamp brand connect.
Publication number is the delay switch that the Chinese invention patent application of CN 101431849A (application number is 200810243135.5) discloses a kind of electricity-saving lamp, bridge rectifier is formed by the first diode, the second diode, the 3rd diode, the 4th diode, the positive pole of this bridge rectifier is connected with the negative electrode of voltage-stabiliser tube, the anode of voltage-stabiliser tube connects silicon controlled anode, and silicon controlled negative electrode connects the negative pole of bridge rectifier; The anode of the 5th diode connects the negative electrode of voltage-stabiliser tube, the negative electrode of the 5th diode connects the positive pole of electric capacity, the negative pole of electric capacity connects the anode of voltage-stabiliser tube, the emitter of PNP transistor connects the positive pole of electric capacity, the base stage of PNP transistor connects the output of delay control circuit, the positive pole of the VCC termination capacitor of delay circuit, the negative pole of the GND termination capacitor of delay circuit, first resistance connects collector electrode and the silicon controlled gate pole of transistor, second resistance connects base stage and the touch-screen of PNP triode, and trigger switch is also connected between silicon controlled anode and negative electrode.This switch adopts one wire system, and replace existing switch although convenient, not only can be used as touch-type delay switch but also can be used as mechanical type delay switch, triggering can be touch manner or mechanical key mode, and its quiescent dissipation is still relatively high.
Utility model content
The utility model provides a kind of delay switch, adopts double wire system, can improve the matching degree of delay switch and electricity-saving lamp, LED, and quiescent dissipation is low.
A kind of delay switch, comprising: bridge rectifier, ghyristor circuit, triggered switch circuit, zero circuits for triggering, NAND gate circuit, delay circuit and voltage-stabiliser tube and the first electric capacity;
Ghyristor circuit comprises the controllable silicon, the 5th diode and the 6th diode that are sequentially connected in series, and silicon controlled anode is connected with the positive pole of bridge rectifier, and the negative electrode of the 6th diode is connected with the negative pole of bridge rectifier;
Triggered switch circuit comprises the light emitting diode lamp, the first resistance, the second resistance, the 9th resistance and the trigger switch that are sequentially connected in series, the anode of light emitting diode lamp is connected with the positive pole of bridge rectifier, and one end of trigger switch S1 is connected with the negative pole of bridge rectifier;
Zero circuits for triggering comprise the 3rd resistance, 4th resistance, 5th resistance, NPN type triode and the 8th resistance, wherein, one end of 3rd resistance is connected between light emitting diode lamp and the first resistance, the other end of the 3rd resistance is connected with one end of the 4th resistance, the other end of the 4th resistance is connected with the base stage of NPN type triode, the emitter of NPN type triode is connected with the negative pole of bridge rectifier, one end of 5th resistance is connected with the base stage of NPN type triode, the other end of the 5th resistance is connected with the negative pole of bridge rectifier, the collector electrode of NPN type triode is connected with one end of the 8th resistance, the other end of the 8th resistance is connected between the second resistance and the 9th resistance.
The utility model solves the technical scheme that its technical problem adopts: obtain direct voltage through ac-dc converter circuit; high resistance measurement step-down is used to provide power supply for integrated circuit operation; logical zero-cross triggering circuit is protected controllable silicon; choose low power consumption integrated circuit to carry out settling signal collection and control silicon controlled to open and shutoff, electricity container carries out time delay by conductive discharge.
Described bridge rectifier comprises: the first rectification branch road be connected in parallel and the second rectification branch road, first rectification branch road comprises the 4th diode and the first diode that are connected in series, the negative electrode of the 4th diode is connected with the anode of the first diode, second rectification branch road comprises the 3rd diode and the second diode that are connected in series, the negative electrode of the 3rd diode is connected with the anode of the second diode, the anode of the 4th diode is connected the negative pole as bridge rectifier with the anode of the 3rd diode, the negative electrode of the first diode is connected the positive pole as bridge rectifier with the negative electrode of the second diode.
Described voltage-stabiliser tube is connected in parallel on the 9th resistance and trigger switch two ends, and namely the negative electrode of voltage-stabiliser tube is connected between the second resistance and the 9th resistance, and the anode of voltage-stabiliser tube is connected on the negative pole of bridge rectifier.
The first described Capacitance parallel connection is at the 9th resistance and trigger switch two ends, and namely one end of the first electric capacity is connected between the second resistance and the 9th resistance, and accesses supply voltage.The other end of the first electric capacity be connected on the negative pole of bridge rectifier, ground connection simultaneously.
Described NAND gate circuit comprises the 3rd NAND gate circuit connected successively, 8th diode, second NAND gate circuit, first NAND gate circuit and the 7th resistance, the first input end of the 3rd NAND gate circuit and the second input all access the 9th between resistance and trigger switch, the output of the 3rd NAND gate circuit is connected with the anode of the 8th diode, the negative electrode of the 8th diode is connected with the second input of the second NAND gate circuit, the first input end of the second NAND gate circuit is connected with the collector electrode of NPN type triode, the output of the second NAND gate circuit is connected with the first input end of the first NAND gate circuit and the second input, the output of the first NAND gate circuit is connected with one end of the 7th resistance, the other end of the 7th resistance is connected to silicon controlled and controls between pole and the 7th diode.
Described delay circuit comprises the second electric capacity and the 6th resistance, one end of second electric capacity is connected with the negative electrode of the 8th diode, the other end of the second electric capacity is connected with the negative pole of bridge rectifier, one end of 6th resistance is connected with the negative electrode of the 8th diode, and the other end of the 6th resistance is connected with the negative pole of bridge rectifier.
Compared with prior art, the utility model delay switch has the following advantages:
The utility model delay switch can improve the matching degree of delay switch and electricity-saving lamp, LED, and the matching degree of the quiescent dissipation drawing switch by a large amount of tests more low latency switch and electricity-saving lamp, LED is higher.The utility model delay switch, is characterized in: quiescent dissipation is low, lower than 0.005W, not only greatly reduces the consumption of the energy, also improves the matching degree of two-wire system button delay switch and electricity-saving lamp, LED lamp; Cost is low, and circuit is simple; Silicon controlled conducting starts conducting when voltage is 0 current potential, can effectively protect controllable silicon.The utility model delay switch has the advantages such as circuit is simple, cost is low, low in energy consumption.
Accompanying drawing explanation
Fig. 1 is the circuit theory schematic diagram of the utility model delay switch.
Embodiment
Below in conjunction with accompanying drawing, the utility model delay switch is described in further detail.
As shown in Figure 1, for the circuit theory diagrams of the utility model delay switch, a kind of delay switch, comprising: bridge rectifier, ghyristor circuit, zero circuits for triggering, triggered switch circuit, NAND gate circuit, delay circuit and voltage-stabiliser tube DW1 and the first electric capacity C1.
This bridge rectifier comprises: the first rectification branch road that the 4th diode D4 be connected in series and the first diode D1 forms and the second rectification branch road that the 3rd diode D3 be connected in series and the second diode D2 forms, the negative electrode of the 4th diode D4 is connected with the anode of the first diode D1, the negative electrode of the 3rd diode D3 is connected with the anode of the second diode D2, the anode of the 4th diode D4 is connected the negative pole as bridge rectifier with the anode of the 3rd diode D3, the negative electrode of the first diode D1 is connected the positive pole as bridge rectifier with the negative electrode of the second diode D2, incoming level (Lin) is connected with between 4th diode D4 and the first diode D1, output level (Lout) is connected with between 3rd diode D3 and the second diode D2.
Ghyristor circuit comprises the controllable silicon SCR, the 5th diode D5 and the 6th diode D6 that are sequentially connected in series, the anode of controllable silicon SCR is connected with the positive pole of bridge rectifier, the negative electrode of controllable silicon SCR is connected with the anode of the 5th diode D5, the negative electrode of the 5th diode D5 is connected with the anode of the 6th diode D6, and the negative electrode of the 6th diode D6 is connected with the negative pole of bridge rectifier.
The control extremely of controllable silicon SCR is connected with the 7th diode D7 (belonging to NAND gate circuit), the anode of the 7th diode D7 is connected with the control pole of controllable silicon SCR, and the negative electrode of the 7th diode D7 is connected with supply voltage (VCC).
Triggered switch circuit comprises the LED be sequentially connected in series and (is namely labeled as LED in figure, for indicator light), first resistance R1, second resistance R2, 9th resistance R9 and trigger switch S1, trigger switch S1 can adopt touch key, the anode of LED is connected with the positive pole of bridge rectifier, the negative electrode of LED is connected with one end of the first resistance R1, the other end of the first resistance R1 is connected with one end of the second resistance R2, the other end of the second resistance R2 is connected with one end of the 9th resistance R9, the other end of the 9th resistance R9 is connected with one end of trigger switch S1, the other end of trigger switch S1 is connected with the negative pole of bridge rectifier.First resistance R1, the second resistance R2 are current-limiting resistance.
Voltage-stabiliser tube DW1 is connected in parallel on the 9th resistance R9 and trigger switch S1 two ends, and namely the negative electrode of voltage-stabiliser tube DW is connected between the second resistance R2 and the 9th resistance R9, and the anode of voltage-stabiliser tube DW is connected on the negative pole of bridge rectifier.
First electric capacity C1 is connected in parallel on the 9th resistance R9 and trigger switch S1 two ends, and namely one end of the first electric capacity C1 is connected between the second resistance R2 and the 9th resistance R9, and accesses supply voltage (VCC).The other end of the first electric capacity C1 be connected on the negative pole of bridge rectifier, ground connection simultaneously.
Zero circuits for triggering comprise the 3rd resistance R3 be sequentially connected in series, 4th resistance R4, 5th resistance R5, NPN type triode Q1 and the 8th resistance R8, wherein, one end of 3rd resistance R3 is connected between LED and the first resistance R1, the other end of the 3rd resistance R3 is connected with one end of the 4th resistance R4, the other end of the 4th resistance R4 is connected with the base stage of NPN type triode Q1, the emitter of NPN type triode Q1 is connected with the negative pole of bridge rectifier, the collector electrode of NPN type triode Q1 is connected with one end of the 8th resistance R8, the other end of the 8th resistance R8 is connected between the second resistance R2 and the 9th resistance R9, one end of 5th resistance R5 is connected with the base stage of NPN type triode Q1, the other end of the 5th resistance R5 is connected with the negative pole of bridge rectifier.Zero circuits for triggering are connected in parallel on the two ends of the first resistance R1 and the second resistance R2.
NAND gate circuit comprises the 3rd NAND gate circuit CD4011 (U1C), the 8th diode D8, the second NAND gate circuit CD4011 (U1B), the first NAND gate circuit CD4011 (U1A) and the 7th resistance R7 that connect successively.The first input end 8 of the 3rd NAND gate circuit CD4011 (U1C) and the second input 9 all access between the 9th resistance R9 and trigger switch S1.The output 10 of the 3rd NAND gate circuit CD4011 (U1C) is connected with the anode of the 8th diode D8, the negative electrode of the 8th diode D8 is connected with second input 6 of the second NAND gate circuit CD4011 (U1B), and the first input end 5 of the second NAND gate circuit CD4011 (U1B) is connected with the collector electrode of NPN type triode Q1.The output 4 of the second NAND gate circuit CD4011 (U1B) is connected with the first input end 1 of the first NAND gate circuit CD4011 (U1A) and the second input 2, the output 3 of the first NAND gate circuit CD4011 (U1A) is connected with one end of the 7th resistance R7, the other end of the 7th resistance R7 is connected between the control pole of controllable silicon SCR and the 7th diode D7, is namely connected on the control pole of controllable silicon SCR and the anode of the 7th diode D7.
Delay circuit comprises the second electric capacity C2 and the 6th resistance R6, one end of second electric capacity C2 is connected with the negative electrode of the 8th diode D8, the other end of the second electric capacity C2 is connected with the negative pole of bridge rectifier, one end of 6th resistance R6 is connected with the negative electrode of the 8th diode D8, and the other end of the 6th resistance R6 is connected with the negative pole of bridge rectifier.
In concrete enforcement, R1=6.2 × 10
6Ω, R2=6.2 × 10
6Ω, R3=2 × 10
7Ω, R4=2 × 10
7Ω, R5=2 × 10
6Ω, R6 can adopt resistance value conventional in delay circuit in prior art, R7=1 × 10
4Ω, R8=5.1 × 10
5Ω, R9=1 × 10
4Ω, adopt the delay switch of above-mentioned concrete resistance, static power is low, lower than 0.005W.
When pressing trigger switch S1 (i.e. touch key), be low level with the first input end 8 of the 3rd NAND gate circuit CD4011 (U1C) and the second input 9, the output 10 of the 3rd NAND gate circuit CD4011 (U1C) is made to change high level into, charge to the second capacitor C2 by the 8th diode D8, be now high level with second input 6 of the second NAND gate circuit CD4011 (U1B), when being high level state when the first input end 5 with the second NAND gate circuit CD4011 (U1B) is in civil power zero passage, transformed by NAND gate circuit, make to obtain high level with the output 3 of the first NAND gate circuit CD4011 (U1A), then triggering controllable silicon SCR by the 7th resistance R7 (namely as current-limiting resistance) makes load lamp light.
When after time delay certain hour, after the second capacitor C2 changes low level into by the 6th resistance R6 electric discharge, NAND gate circuit stops triggering controllable silicon, and controllable silicon ends after zero passage, and load lamp goes out, and LED (indicator light) lights.
Above-described embodiment has been described in detail the technical solution of the utility model and beneficial effect; be understood that and the foregoing is only most preferred embodiment of the present utility model; be not limited to the utility model; all make in spirit of the present utility model any amendment, supplement and equivalent to replace, all should be included within protection range of the present utility model.
Claims (6)
1. a delay switch, is characterized in that, comprising: bridge rectifier, ghyristor circuit, triggered switch circuit, zero circuits for triggering, NAND gate circuit, delay circuit and voltage-stabiliser tube and the first electric capacity;
Ghyristor circuit comprises the controllable silicon, the 5th diode and the 6th diode that are sequentially connected in series, and silicon controlled anode is connected with the positive pole of bridge rectifier, and the negative electrode of the 6th diode is connected with the negative pole of bridge rectifier;
Triggered switch circuit comprises the light emitting diode lamp, the first resistance, the second resistance, the 9th resistance and the trigger switch that are sequentially connected in series, the anode of light emitting diode lamp is connected with the positive pole of bridge rectifier, and one end of trigger switch is connected with the negative pole of bridge rectifier;
Zero circuits for triggering comprise the 3rd resistance, 4th resistance, 5th resistance, NPN type triode and the 8th resistance, wherein, one end of 3rd resistance is connected between light emitting diode lamp and the first resistance, the other end of the 3rd resistance is connected with one end of the 4th resistance, the other end of the 4th resistance is connected with the base stage of NPN type triode, the emitter of NPN type triode is connected with the negative pole of bridge rectifier, one end of 5th resistance is connected with the base stage of NPN type triode, the other end of the 5th resistance is connected with the negative pole of bridge rectifier, the collector electrode of NPN type triode is connected with one end of the 8th resistance, the other end of the 8th resistance is connected between the second resistance and the 9th resistance.
2. delay switch according to claim 1, it is characterized in that, described bridge rectifier comprises: the first rectification branch road be connected in parallel and the second rectification branch road, first rectification branch road comprises the 4th diode and the first diode that are connected in series, the negative electrode of the 4th diode is connected with the anode of the first diode, second rectification branch road comprises the 3rd diode and the second diode that are connected in series, the negative electrode of the 3rd diode is connected with the anode of the second diode, the anode of the 4th diode is connected the negative pole as bridge rectifier with the anode of the 3rd diode, the negative electrode of the first diode is connected the positive pole as bridge rectifier with the negative electrode of the second diode.
3. delay switch according to claim 1, is characterized in that, described voltage-stabiliser tube is connected in parallel on the 9th resistance and trigger switch two ends.
4. delay switch according to claim 1, is characterized in that, the first described Capacitance parallel connection is at the 9th resistance and trigger switch two ends.
5. delay switch according to claim 1, it is characterized in that, described NAND gate circuit comprises the 3rd NAND gate circuit connected successively, 8th diode, second NAND gate circuit, first NAND gate circuit and the 7th resistance, the first input end of the 3rd NAND gate circuit and the second input all access the 9th between resistance and trigger switch, the output of the 3rd NAND gate circuit is connected with the anode of the 8th diode, the negative electrode of the 8th diode is connected with the second input of the second NAND gate circuit, the first input end of the second NAND gate circuit is connected with the collector electrode of NPN type triode, the output of the second NAND gate circuit is connected with the first input end of the first NAND gate circuit and the second input, the output of the first NAND gate circuit is connected with one end of the 7th resistance, the other end of the 7th resistance is connected to silicon controlled and controls between pole and the 7th diode.
6. delay switch according to claim 1, it is characterized in that, described delay circuit comprises the second electric capacity and the 6th resistance, one end of second electric capacity is connected with the negative electrode of the 8th diode, the other end of the second electric capacity is connected with the negative pole of bridge rectifier, one end of 6th resistance is connected with the negative electrode of the 8th diode, and the other end of the 6th resistance is connected with the negative pole of bridge rectifier.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420760661.XU CN204316823U (en) | 2014-12-05 | 2014-12-05 | A kind of delay switch |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420760661.XU CN204316823U (en) | 2014-12-05 | 2014-12-05 | A kind of delay switch |
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| CN204316823U true CN204316823U (en) | 2015-05-06 |
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| CN201420760661.XU Active CN204316823U (en) | 2014-12-05 | 2014-12-05 | A kind of delay switch |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109390812A (en) * | 2018-12-07 | 2019-02-26 | 上海文简电子技术有限公司 | A kind of energy saving and environment friendly electric power strip with electromotion pilot lamp |
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2014
- 2014-12-05 CN CN201420760661.XU patent/CN204316823U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109390812A (en) * | 2018-12-07 | 2019-02-26 | 上海文简电子技术有限公司 | A kind of energy saving and environment friendly electric power strip with electromotion pilot lamp |
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