CN204287898U - The D/A converting circuit of digital control system - Google Patents
The D/A converting circuit of digital control system Download PDFInfo
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- CN204287898U CN204287898U CN201420761279.0U CN201420761279U CN204287898U CN 204287898 U CN204287898 U CN 204287898U CN 201420761279 U CN201420761279 U CN 201420761279U CN 204287898 U CN204287898 U CN 204287898U
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- coupled isolation
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Abstract
The utility model relates to a kind of circuit structure, and especially a kind of D/A converting circuit of digital control system, belongs to the technical field of signaling conversion circuit.According to the technical scheme that the utility model provides, the D/A converting circuit of described digital control system, the digital signal comprised for being exported by PLC in digital control system is converted to the D/A converter module of simulating signal, described D/A converter module is connected with the output terminal of PLC by light-coupled isolation chip, and the simulating signal after conversion is carried out amplification by signal amplifier and exported by the output terminal of D/A converter module.The utility model compact conformation, can realize the analog output expansion of low side digital control system, and reduce the cost that high-end digital control system carries out analog quantity spread, wide accommodation, safe and reliable.
Description
Technical field
The utility model relates to a kind of circuit structure, and especially a kind of D/A converting circuit of digital control system, belongs to the technical field of signaling conversion circuit.
Background technology
The PLC of current digital control system is generally integrated in the inside of digital control system, lacks good expanded function compared with standard PLC.Machine Manufacture business generally can use the output analog quantity of PLC, to control frequency converter timing or magnetic shunt adjustment magnetic force.But the digital control system of some low side is as Siemens 802DSL, 808D etc. do not support expanded mode analog quantity output module, although other more high-end digital control systems such as Fa Nake OI-TD Siemens 840DSL can expand in addition, another additional module under the standard configuration of digital control system is needed to add cost.
Summary of the invention
The purpose of this utility model overcomes the deficiencies in the prior art, a kind of D/A converting circuit of digital control system is provided, its compact conformation, the analog output expansion of low side digital control system can be realized, and reduce the cost that high-end digital control system carries out analog quantity spread, wide accommodation, safe and reliable.
According to the technical scheme that the utility model provides, the D/A converting circuit of described digital control system, the digital signal comprised for being exported by PLC in digital control system is converted to the D/A converter module of simulating signal, described D/A converter module is connected with the output terminal of PLC by light-coupled isolation chip, and the simulating signal after conversion is carried out amplification by signal amplifier and exported by the output terminal of D/A converter module.
Described D/A converter module comprises analog-digital chip DAC1 and analog-digital chip DAC2; Described analog-digital chip DAC1 and analog-digital chip DAC2 all adopts model to be the chip of DAC0832LCN;
The D7 end of described analog-digital chip DAC1, the D7 end of analog-digital chip DAC2 are connected with the emitter terminal of phototriode in light-coupled isolation chip U6, in light-coupled isolation chip U6, the anode tap of photodiode is connected by the Q0.7 output terminal of resistance R107 and PLC, the cathode terminal ground connection of photodiode in light-coupled isolation chip U6; The D6 end of analog-digital chip DAC1, the D6 end of analog-digital chip DAC2 are connected with the emitter terminal of phototriode in light-coupled isolation chip U7, in light-coupled isolation chip U7, the anode tap of photodiode is connected by the Q0.6 output terminal of resistance R106 and PLC, the cathode terminal ground connection of photodiode in light-coupled isolation chip U7;
The D5 end of analog-digital chip DAC1, the D5 end of analog-digital chip DAC2 are connected with the emitter terminal of phototriode in light-coupled isolation chip U8, in light-coupled isolation chip U8, the anode tap of photodiode is connected by the Q0.5 end of resistance R105 and PLC, the cathode terminal ground connection of photodiode in light-coupled isolation chip U8; The D4 end of analog-digital chip DAC1, the D4 end of analog-digital chip DAC2 are connected with the emitter terminal of phototriode in light-coupled isolation chip U9, in light-coupled isolation chip U9, the anode tap of photodiode is connected by the Q0.4 end of resistance R104 and PLC, the cathode terminal ground connection of photodiode in light-coupled isolation chip U9;
The D3 end of analog-digital chip DAC1, the D3 end of analog-digital chip DAC2 are connected with the emitter of phototriode in light-coupled isolation chip U10, in light-coupled isolation chip U10, the anode tap of photodiode is connected by the Q0.3 end of resistance R103 and PLC, the cathode terminal ground connection of photodiode in light-coupled isolation chip U10; The D2 end of analog-digital chip DAC1, the D2 end of analog-digital chip DAC2 are connected with the emitter terminal of phototriode in light-coupled isolation chip U11, in light-coupled isolation chip U11, the anode tap of photodiode is connected by the Q0.2 end of resistance R102 and PLC, the cathode terminal ground connection of photodiode in light-coupled isolation chip U11;
The D1 end of analog-digital chip DAC1, the D1 end of analog-digital chip DAC2 are connected with the emitter terminal of phototriode in light-coupled isolation chip U12, in light-coupled isolation chip U12, the anode tap of photodiode is connected by the Q0.1 end of resistance R101 and PLC, the cathode terminal ground connection of photodiode in light-coupled isolation chip U12; The D0 end of analog-digital chip DAC1, the D0 end of analog-digital chip DAC2 are connected with the emitter terminal of phototriode in light-coupled isolation chip U13, in light-coupled isolation chip U13, the anode tap of photodiode is connected by the Q0.0 end of resistance R100 and PLC, the cathode terminal ground connection of photodiode in light-coupled isolation chip U13;
Analog-digital chip DAC1's
end,
end and analog-digital chip DAC2
end,
end is all connected with the emitter terminal of phototriode in light-coupled isolation chip U14, in light-coupled isolation chip U14, the anode tap of photodiode is connected by the Q1.0 end of resistance R108 and PLC, the cathode terminal ground connection of photodiode in light-coupled isolation chip U14, analog-digital chip DAC1's
end, analog-digital chip DAC2's
end is all connected with the emitter terminal of phototriode in light-coupled isolation chip U15, and in light-coupled isolation chip U15, the anode tap of photodiode is connected by the Q1.1 end of resistance R109 and PLC, the cathode terminal ground connection of photodiode in light-coupled isolation chip U15;
Analog-digital chip DAC1's
end is connected with the emitter terminal of phototriode in light-coupled isolation chip U16, and in light-coupled isolation chip U16, the anode tap of photodiode is connected by the Q1.2 end of resistance R110 and PLC, analog-digital chip DAC2's
end is connected with the emitter terminal of phototriode in light-coupled isolation chip U17, and in light-coupled isolation chip U17, the anode tap of photodiode is connected by the Q1.3 end of resistance R111 and PLC, the cathode terminal ground connection of photodiode in light-coupled isolation chip U17; In light-coupled isolation chip U16, the emitter terminal of phototriode is also by resistance R210 ground connection, and in light-coupled isolation chip U17, the emitter terminal of phototriode is also by resistance R211 ground connection;
In light-coupled isolation chip U6, the emitter terminal of phototriode is also by resistance R207 ground connection, in light-coupled isolation chip U7, the emitter terminal of phototriode is also by resistance R206 ground connection, in light-coupled isolation chip U8, the emitter terminal of phototriode is also by resistance R205 ground connection, in light-coupled isolation chip U9, the emitter terminal of phototriode is also by resistance R204 ground connection, in light-coupled isolation chip U10, the emitter terminal of phototriode is also by resistance R203 ground connection, in light-coupled isolation chip U11, the emitter terminal of phototriode is also by resistance R202 ground connection, in light-coupled isolation chip U12, the emitter terminal of phototriode is also by resistance R201 ground connection, in light-coupled isolation chip U13, the emitter terminal of phototriode is also by resistance R200 ground connection, in light-coupled isolation chip U14, the emitter terminal of phototriode is by resistance R208 ground connection, and in light-coupled isolation chip U15, the emitter terminal of phototriode is also by resistance R209 ground connection,
The R of analog-digital chip DAC1
fBhold with the first operational amplifier in amplifier integrated chip U4 output terminal be connected, and form the first analog output VO1, the R of analog-digital chip DAC2
fBend is connected with the output terminal of the second operational amplifier in amplifier integrated chip U4, and forms the second analog output VO2.
The collector terminal of phototriode in described light-coupled isolation chip U6, the collector terminal of phototriode in light-coupled isolation chip U7, the collector terminal of phototriode in light-coupled isolation chip U8, the collector terminal of phototriode in light-coupled isolation chip U9, the collector terminal of phototriode in light-coupled isolation chip U10, the collector terminal of phototriode in light-coupled isolation chip U11, the collector terminal of phototriode in light-coupled isolation chip U12, the collector terminal of phototriode in light-coupled isolation chip U13, the collector terminal of phototriode in light-coupled isolation chip U14, the collector terminal of phototriode in light-coupled isolation chip U15, in light-coupled isolation chip U16, in the collector terminal of phototriode and light-coupled isolation chip U17, the collector terminal of phototriode is all held with the FB of the first power supply chip U1 and is connected, first power supply chip U1 adopts model to be the chip of LM2576T-5,
The VIN end of the first power supply chip U1 is connected with+24V voltage and passes through electric capacity C1 ground connection, the ON/OFF of the first power supply chip U1 holds ground connection, the DGND of the first power supply chip U1 holds ground connection, the OUT end of the first power supply chip U1 is connected with the cathode terminal of diode D1, one end of inductance L 1, the anode tap ground connection of diode D1, the other end of inductance L 1 passes through electric capacity C11 ground connection and holds with the FB of the first power supply chip U1 to be connected; The FB end of the first power supply chip U1 is also held and I with the VCC of analog-digital chip DAC1
lEend connects, and holds and I with the VCC of analog-digital chip DAC2
lEend connects.
Described amplifier integrated chip U4 adopts signal to be the chip of LM358N, and the VCC end of described amplifier integrated chip U4 is held with the FB of second source chip U2 and is connected; Second source chip U2 adopts model to be the chip of LM2576T-12; The VIN end of second source chip U2 is connected with+24V voltage and passes through electric capacity C2 ground connection, the ON/OFF end of second source chip U2, DGND hold equal ground connection, the OUT end of second source chip U2 is connected with the cathode terminal of diode D2 and one end of inductance L 2, the anode tap ground connection of diode D2, the other end of inductance L 2 passes through electric capacity C21 ground connection and holds with the FB of second source chip U2 to be connected; The in-phase end ground connection of the first operational amplifier in amplifier integrated chip U4, the end of oppisite phase of the first operational amplifier and the I of analog-digital chip DAC1
oUT1end connects, the in-phase end ground connection of the second operational amplifier in amplifier integrated chip U4, the end of oppisite phase of the second operational amplifier and the I of analog-digital chip DAC2
oUT1end connects, and the VEE end of amplifier integrated chip U4 is connected with one end of resistance R1 and one end of resistance R2, and the other end of resistance R1 is held with the Vref of analog-digital chip DAC1 and is connected, and the other end of resistance R2 is held with the Vref of analog-digital chip DA2 and is connected.
The VEE end of described amplifier integrated chip U4 is also connected with the 3rd power supply chip U3, 3rd power supply chip U3 adopts model to be the chip of LM2576T-12, the VIN end of the 3rd power supply chip U3 is connected with+24V voltage and passes through electric capacity C3 ground connection, the ON/OFF end of the 3rd power supply chip U3, the anode tap of DGND end and diode D3, one end of electric capacity C31 and the VEE end of amplifier integrated chip U4 connect, the cathode terminal of diode D3 holds with the OUT of the 3rd power supply chip U3 and one end of inductance L 3 is connected, the FB of the other end of inductance L 3 and the other end of electric capacity C31 and the 3rd power supply chip U3 holds and is connected, and the FB of the 3rd power supply chip U3 holds ground connection.
Advantage of the present utility model: D/A converter module is connected with the output terminal of PLC by light-coupled isolation chip, simulating signal after conversion is carried out amplification by signal amplifier and is exported by the output terminal of D/A converter module, compact conformation, the analog output expansion of low side digital control system can be realized, and reduce the cost that high-end digital control system carries out analog quantity spread, wide accommodation, safe and reliable.
Accompanying drawing explanation
Fig. 1 is circuit theory diagrams of the present utility model.
Embodiment
Below in conjunction with concrete drawings and Examples, the utility model is described in further detail.
In order to the analog output expansion of low side digital control system can be realized, and reduce the cost that high-end digital control system carries out analog quantity spread, the utility model digital signal comprised for being exported by PLC in digital control system is converted to the D/A converter module of simulating signal, described D/A converter module is connected with the output terminal of PLC by light-coupled isolation chip, and the simulating signal after conversion is carried out amplification by signal amplifier and exported by the output terminal of D/A converter module.
Particularly, as shown in Figure 1, described analog-digital chip comprises analog-digital chip DAC1 and analog-digital chip DAC2; Described analog-digital chip DAC1 and analog-digital chip DAC2 all adopts model to be the chip of DAC0832LCN;
The D7 end of described analog-digital chip DAC1, the D7 end of analog-digital chip DAC2 are connected with the emitter terminal of phototriode in light-coupled isolation chip U6, in light-coupled isolation chip U6, the anode tap of photodiode is connected by the Q0.7 output terminal of resistance R107 and PLC, the cathode terminal ground connection of photodiode in light-coupled isolation chip U6; The D6 end of analog-digital chip DAC1, the D6 end of analog-digital chip DAC2 are connected with the emitter terminal of phototriode in light-coupled isolation chip U7, in light-coupled isolation chip U7, the anode tap of photodiode is connected by the Q0.6 output terminal of resistance R106 and PLC, the cathode terminal ground connection of photodiode in light-coupled isolation chip U7;
The D5 end of analog-digital chip DAC1, the D5 end of analog-digital chip DAC2 are connected with the emitter terminal of phototriode in light-coupled isolation chip U8, in light-coupled isolation chip U8, the anode tap of photodiode is connected by the Q0.5 end of resistance R105 and PLC, the cathode terminal ground connection of photodiode in light-coupled isolation chip U8; The D4 end of analog-digital chip DAC1, the D4 end of analog-digital chip DAC2 are connected with the emitter terminal of phototriode in light-coupled isolation chip U9, in light-coupled isolation chip U9, the anode tap of photodiode is connected by the Q0.4 end of resistance R104 and PLC, the cathode terminal ground connection of photodiode in light-coupled isolation chip U9;
The D3 end of analog-digital chip DAC1, the D3 end of analog-digital chip DAC2 are connected with the emitter of phototriode in light-coupled isolation chip U10, in light-coupled isolation chip U10, the anode tap of photodiode is connected by the Q0.3 end of resistance R103 and PLC, the cathode terminal ground connection of photodiode in light-coupled isolation chip U10; The D2 end of analog-digital chip DAC1, the D2 end of analog-digital chip DAC2 are connected with the emitter terminal of phototriode in light-coupled isolation chip U11, in light-coupled isolation chip U11, the anode tap of photodiode is connected by the Q0.2 end of resistance R102 and PLC, the cathode terminal ground connection of photodiode in light-coupled isolation chip U11;
The D1 end of analog-digital chip DAC1, the D1 end of analog-digital chip DAC2 are connected with the emitter terminal of phototriode in light-coupled isolation chip U12, in light-coupled isolation chip U12, the anode tap of photodiode is connected by the Q0.1 end of resistance R101 and PLC, the cathode terminal ground connection of photodiode in light-coupled isolation chip U12; The D0 end of analog-digital chip DAC1, the D0 end of analog-digital chip DAC2 are connected with the emitter terminal of phototriode in light-coupled isolation chip U13, in light-coupled isolation chip U13, the anode tap of photodiode is connected by the Q0.0 end of resistance R100 and PLC, the cathode terminal ground connection of photodiode in light-coupled isolation chip U13;
Analog-digital chip DAC1's
end,
end and analog-digital chip DAC2
end,
end is all connected with the emitter terminal of phototriode in light-coupled isolation chip U14, in light-coupled isolation chip U14, the anode tap of photodiode is connected by the Q1.0 end of resistance R108 and PLC, the cathode terminal ground connection of photodiode in light-coupled isolation chip U14, analog-digital chip DAC1's
end, analog-digital chip DAC2's
end is all connected with the emitter terminal of phototriode in light-coupled isolation chip U15, and in light-coupled isolation chip U15, the anode tap of photodiode is connected by the Q1.1 end of resistance R109 and PLC, the cathode terminal ground connection of photodiode in light-coupled isolation chip U15;
Analog-digital chip DAC1's
end is connected with the emitter terminal of phototriode in light-coupled isolation chip U16, and in light-coupled isolation chip U16, the anode tap of photodiode is connected by the Q1.2 end of resistance R110 and PLC, analog-digital chip DAC2's
end is connected with the emitter terminal of phototriode in light-coupled isolation chip U17, and in light-coupled isolation chip U17, the anode tap of photodiode is connected by the Q1.3 end of resistance R111 and PLC, the cathode terminal ground connection of photodiode in light-coupled isolation chip U17; In light-coupled isolation chip U16, the emitter terminal of phototriode is also by resistance R210 ground connection, and in light-coupled isolation chip U17, the emitter terminal of phototriode is also by resistance R211 ground connection;
In light-coupled isolation chip U6, the emitter terminal of phototriode is also by resistance R207 ground connection, in light-coupled isolation chip U7, the emitter terminal of phototriode is also by resistance R206 ground connection, in light-coupled isolation chip U8, the emitter terminal of phototriode is also by resistance R205 ground connection, in light-coupled isolation chip U9, the emitter terminal of phototriode is also by resistance R204 ground connection, in light-coupled isolation chip U10, the emitter terminal of phototriode is also by resistance R203 ground connection, in light-coupled isolation chip U11, the emitter terminal of phototriode is also by resistance R202 ground connection, in light-coupled isolation chip U12, the emitter terminal of phototriode is also by resistance R201 ground connection, in light-coupled isolation chip U13, the emitter terminal of phototriode is also by resistance R200 ground connection, in light-coupled isolation chip U14, the emitter terminal of phototriode is by resistance R208 ground connection, and in light-coupled isolation chip U15, the emitter terminal of phototriode is also by resistance R209 ground connection,
The R of analog-digital chip DAC1
fBhold with the first operational amplifier in amplifier integrated chip U4 output terminal be connected, and form the first analog output VO1, the R of analog-digital chip DAC2
fBend is connected with the output terminal of the second operational amplifier in amplifier integrated chip U4, and forms the second analog output VO2.
The collector terminal of phototriode in described light-coupled isolation chip U6, the collector terminal of phototriode in light-coupled isolation chip U7, the collector terminal of phototriode in light-coupled isolation chip U8, the collector terminal of phototriode in light-coupled isolation chip U9, the collector terminal of phototriode in light-coupled isolation chip U10, the collector terminal of phototriode in light-coupled isolation chip U11, the collector terminal of phototriode in light-coupled isolation chip U12, the collector terminal of phototriode in light-coupled isolation chip U13, the collector terminal of phototriode in light-coupled isolation chip U14, the collector terminal of phototriode in light-coupled isolation chip U15, in light-coupled isolation chip U16, in the collector terminal of phototriode and light-coupled isolation chip U17, the collector terminal of phototriode is all held with the FB of the first power supply chip U1 and is connected, first power supply chip U1 adopts model to be the chip of LM2576T-5,
The VIN end of the first power supply chip U1 is connected with+24V voltage and passes through electric capacity C1 ground connection, the ON/OFF of the first power supply chip U1 holds ground connection, the DGND of the first power supply chip U1 holds ground connection, the OUT end of the first power supply chip U1 is connected with the cathode terminal of diode D1, one end of inductance L 1, the anode tap ground connection of diode D1, the other end of inductance L 1 passes through electric capacity C11 ground connection and holds with the FB of the first power supply chip U1 to be connected; The FB end of the first power supply chip U1 is also held and I with the VCC of analog-digital chip DAC1
lEend connects, and holds and I with the VCC of analog-digital chip DAC2
lEend connects.
Described amplifier integrated chip U4 adopts signal to be the chip of LM358N, and the VCC end of described amplifier integrated chip U4 is held with the FB of second source chip U2 and is connected; Second source chip U2 adopts model to be the chip of LM2576T-12; The VIN end of second source chip U2 is connected with+24V voltage and passes through electric capacity C2 ground connection, the ON/OFF end of second source chip U2, DGND hold equal ground connection, the OUT end of second source chip U2 is connected with the cathode terminal of diode D2 and one end of inductance L 2, the anode tap ground connection of diode D2, the other end of inductance L 2 passes through electric capacity C21 ground connection and holds with the FB of second source chip U2 to be connected; The in-phase end ground connection of the first operational amplifier in amplifier integrated chip U4, the end of oppisite phase of the first operational amplifier and the I of analog-digital chip DAC1
oUT1end connects, the in-phase end ground connection of the second operational amplifier in amplifier integrated chip U4, the end of oppisite phase of the second operational amplifier and the I of analog-digital chip DAC2
oUT1end connects, and the VEE end of amplifier integrated chip U4 is connected with one end of resistance R1 and one end of resistance R2, and the other end of resistance R1 is held with the Vref of analog-digital chip DAC1 and is connected, and the other end of resistance R2 is held with the Vref of analog-digital chip DA2 and is connected.
The VEE end of described amplifier integrated chip U4 is also connected with the 3rd power supply chip U3, 3rd power supply chip U3 adopts model to be the chip of LM2576T-12, the VIN end of the 3rd power supply chip U3 is connected with+24V voltage and passes through electric capacity C3 ground connection, the ON/OFF end of the 3rd power supply chip U3, the anode tap of DGND end and diode D3, one end of electric capacity C31 and the VEE end of amplifier integrated chip U4 connect, the cathode terminal of diode D3 holds with the OUT of the 3rd power supply chip U3 and one end of inductance L 3 is connected, the FB of the other end of inductance L 3 and the other end of electric capacity C31 and the 3rd power supply chip U3 holds and is connected, and the FB of the 3rd power supply chip U3 holds ground connection.
Above-mentioned only for the output of two-way digital-to-analog conversion, illustrate in Fig. 1 that the digital-to-analog conversion on four tunnels exports, namely also comprise analog-digital chip DAC3 and analog-digital chip DAC4, the model that analog-digital chip DAC3, analog-digital chip DAC4 adopt is identical with analog-digital chip DAC1.Particularly, the D7 end of analog-digital chip DAC3, the D7 end of analog-digital chip DAC4 are all connected with the emitter terminal of phototriode in light-coupled isolation chip U6, the D6 end of analog-digital chip DAC3, the D6 end of analog-digital chip DAC4 are all connected with the emitter terminal of phototriode in light-coupled isolation chip U7, and the D5 end of analog-digital chip DAC3, the D5 end of analog-digital chip DAC4 are all connected with the emitter terminal of phototriode in light-coupled isolation chip U8.The D4 end of analog-digital chip DAC3, the D4 end of analog-digital chip DAC4 is all connected with the emitter terminal of phototriode in light-coupled isolation chip U9, the D3 end of analog-digital chip DAC3, the D3 end of analog-digital chip DAC4 is all connected with the emitter terminal of phototriode in light-coupled isolation chip U10, the D2 end of analog-digital chip DAC3, the D2 end of analog-digital chip DAC4 is all connected with the emitter terminal of phototriode in light-coupled isolation chip U11, the D1 end of analog-digital chip DAC3, the D1 end of analog-digital chip DAC4 is all connected with the emitter terminal of phototriode in light-coupled isolation chip U12, the D0 end of analog-digital chip DAC3, the D0 end of analog-digital chip DAC4 is all connected with the emitter terminal of phototriode in light-coupled isolation chip U13.
Analog-digital chip DAC3's
end,
end and analog-digital chip DAC4
end,
end is all connected with the emitter terminal of phototriode in light-coupled isolation chip U14, analog-digital chip DAC3's
end, analog-digital chip DAC4's
end is all connected with the emitter terminal of phototriode in light-coupled isolation chip U15.
Analog-digital chip DAC3's
end is connected with the emitter terminal of phototriode in light-coupled isolation chip U18, and in light-coupled isolation chip U18, the anode tap of photodiode is connected by the Q1.4 end of resistance R112 and PLC, analog-digital chip DAC4's
end is connected with the emitter terminal of phototriode in light-coupled isolation chip U19, and in light-coupled isolation chip U19, the anode tap of photodiode is connected by the Q1.4 end of resistance R1131 and PLC, the cathode terminal ground connection of photodiode in light-coupled isolation chip U17; In light-coupled isolation chip U18, the emitter terminal of phototriode is also by resistance R212 ground connection, and in light-coupled isolation chip U19, the emitter terminal of phototriode is also by resistance R213 ground connection.
Analog-digital chip DAC3 and analog-digital chip DAC4 is also connected with amplifier integrated chip U5, wherein, and the R of analog-digital chip DAC3
fBend is connected with the output terminal of the first operational amplifier in amplifier integrated chip U5, and forms the 3rd analog output VO3, the R of analog-digital chip DAC4
fBend is connected with the output terminal of the second operational amplifier in amplifier integrated chip U5, and forms the 4th analog output VO4.Amplifier integrated chip U5 also adopts model to be the chip of LM358N, the VCC end of amplifier integrated chip U5 is also held with the FB of second source chip U2 and is connected, the in-phase end ground connection of the first operational amplifier in amplifier integrated chip U5, and the end of oppisite phase of described first operational amplifier and the I of analog-digital chip DAC3
oUT1end connects.The in-phase end ground connection of the second operational amplifier in amplifier integrated chip U5, the end of oppisite phase of the second operational amplifier and the I of analog-digital chip DAC4
oUT1end connects, the VEE end of amplifier integrated chip U5 is also held with the ON/OFF of one end of resistance R3, one end of resistance R4 and the 3rd power supply chip U3 respectively and is connected, the other end of resistance R3 is held with the Vref of analog-digital chip DAC3 and is connected, and the other end of resistance R4 is held with the Vref of analog-digital chip DAC4 and is connected.In addition ,+24V voltage is also connected with the anode tap of LED 0 by resistance R0, and the cathode terminal ground connection of LED 0, LED 0 indicates as power supply.
The utility model PLC delivery outlet Q0.0 ~ Q0.7 is data bit, and Q1.0, Q1.1 are for controlling write and exporting analog quantity.Q1.2 ~ Q1.5 upgrades analog-digital chip DAC1 ~ analog-digital chip DAC4 road analog quantity for selecting.Analog-digital chip DAC1 ~ analog-digital chip DAC4, for receiving the digital signal of PLC, exports 4 current analog signals.Resistance and corresponding light-coupled isolation chip are linked into analog-digital chip DAC1 ~ analog-digital chip DAC4 input port the isolation of PLC output circuit current limliting.
Claims (5)
1. the D/A converting circuit of a digital control system, it is characterized in that: the digital signal comprised for being exported by PLC in digital control system is converted to the D/A converter module of simulating signal, described D/A converter module is connected with the output terminal of PLC by light-coupled isolation chip, and the simulating signal after conversion is carried out amplification by signal amplifier and exported by the output terminal of D/A converter module.
2. the D/A converting circuit of digital control system according to claim 1, is characterized in that: described D/A converter module comprises analog-digital chip DAC1 and analog-digital chip DAC2; Described analog-digital chip DAC1 and analog-digital chip DAC2 all adopts model to be the chip of DAC0832LCN;
The D7 end of described analog-digital chip DAC1, the D7 end of analog-digital chip DAC2 are connected with the emitter terminal of phototriode in light-coupled isolation chip U6, in light-coupled isolation chip U6, the anode tap of photodiode is connected by the Q0.7 output terminal of resistance R107 and PLC, the cathode terminal ground connection of photodiode in light-coupled isolation chip U6; The D6 end of analog-digital chip DAC1, the D6 end of analog-digital chip DAC2 are connected with the emitter terminal of phototriode in light-coupled isolation chip U7, in light-coupled isolation chip U7, the anode tap of photodiode is connected by the Q0.6 output terminal of resistance R106 and PLC, the cathode terminal ground connection of photodiode in light-coupled isolation chip U7;
The D5 end of analog-digital chip DAC1, the D5 end of analog-digital chip DAC2 are connected with the emitter terminal of phototriode in light-coupled isolation chip U8, in light-coupled isolation chip U8, the anode tap of photodiode is connected by the Q0.5 end of resistance R105 and PLC, the cathode terminal ground connection of photodiode in light-coupled isolation chip U8; The D4 end of analog-digital chip DAC1, the D4 end of analog-digital chip DAC2 are connected with the emitter terminal of phototriode in light-coupled isolation chip U9, in light-coupled isolation chip U9, the anode tap of photodiode is connected by the Q0.4 end of resistance R104 and PLC, the cathode terminal ground connection of photodiode in light-coupled isolation chip U9;
The D3 end of analog-digital chip DAC1, the D3 end of analog-digital chip DAC2 are connected with the emitter of phototriode in light-coupled isolation chip U10, in light-coupled isolation chip U10, the anode tap of photodiode is connected by the Q0.3 end of resistance R103 and PLC, the cathode terminal ground connection of photodiode in light-coupled isolation chip U10; The D2 end of analog-digital chip DAC1, the D2 end of analog-digital chip DAC2 are connected with the emitter terminal of phototriode in light-coupled isolation chip U11, in light-coupled isolation chip U11, the anode tap of photodiode is connected by the Q0.2 end of resistance R102 and PLC, the cathode terminal ground connection of photodiode in light-coupled isolation chip U11;
The D1 end of analog-digital chip DAC1, the D1 end of analog-digital chip DAC2 are connected with the emitter terminal of phototriode in light-coupled isolation chip U12, in light-coupled isolation chip U12, the anode tap of photodiode is connected by the Q0.1 end of resistance R101 and PLC, the cathode terminal ground connection of photodiode in light-coupled isolation chip U12; The D0 end of analog-digital chip DAC1, the D0 end of analog-digital chip DAC2 are connected with the emitter terminal of phototriode in light-coupled isolation chip U13, in light-coupled isolation chip U13, the anode tap of photodiode is connected by the Q0.0 end of resistance R100 and PLC, the cathode terminal ground connection of photodiode in light-coupled isolation chip U13;
Analog-digital chip DAC1's
end,
end and analog-digital chip DAC2
end,
end is all connected with the emitter terminal of phototriode in light-coupled isolation chip U14, in light-coupled isolation chip U14, the anode tap of photodiode is connected by the Q1.0 end of resistance R108 and PLC, the cathode terminal ground connection of photodiode in light-coupled isolation chip U14, analog-digital chip DAC1's
end, analog-digital chip DAC2's
end is all connected with the emitter terminal of phototriode in light-coupled isolation chip U15, and in light-coupled isolation chip U15, the anode tap of photodiode is connected by the Q1.1 end of resistance R109 and PLC, the cathode terminal ground connection of photodiode in light-coupled isolation chip U15;
Analog-digital chip DAC1's
end is connected with the emitter terminal of phototriode in light-coupled isolation chip U16, and in light-coupled isolation chip U16, the anode tap of photodiode is connected by the Q1.2 end of resistance R110 and PLC, analog-digital chip DAC2's
end is connected with the emitter terminal of phototriode in light-coupled isolation chip U17, and in light-coupled isolation chip U17, the anode tap of photodiode is connected by the Q1.3 end of resistance R111 and PLC, the cathode terminal ground connection of photodiode in light-coupled isolation chip U17; In light-coupled isolation chip U16, the emitter terminal of phototriode is also by resistance R210 ground connection, and in light-coupled isolation chip U17, the emitter terminal of phototriode is also by resistance R211 ground connection;
In light-coupled isolation chip U6, the emitter terminal of phototriode is also by resistance R207 ground connection, in light-coupled isolation chip U7, the emitter terminal of phototriode is also by resistance R206 ground connection, in light-coupled isolation chip U8, the emitter terminal of phototriode is also by resistance R205 ground connection, in light-coupled isolation chip U9, the emitter terminal of phototriode is also by resistance R204 ground connection, in light-coupled isolation chip U10, the emitter terminal of phototriode is also by resistance R203 ground connection, in light-coupled isolation chip U11, the emitter terminal of phototriode is also by resistance R202 ground connection, in light-coupled isolation chip U12, the emitter terminal of phototriode is also by resistance R201 ground connection, in light-coupled isolation chip U13, the emitter terminal of phototriode is also by resistance R200 ground connection, in light-coupled isolation chip U14, the emitter terminal of phototriode is by resistance R208 ground connection, and in light-coupled isolation chip U15, the emitter terminal of phototriode is also by resistance R209 ground connection,
The R of analog-digital chip DAC1
fBhold with the first operational amplifier in amplifier integrated chip U4 output terminal be connected, and form the first analog output VO1, the R of analog-digital chip DAC2
fBend is connected with the output terminal of the second operational amplifier in amplifier integrated chip U4, and forms the second analog output VO2.
3. the D/A converting circuit of digital control system according to claim 2, it is characterized in that: the collector terminal of phototriode in described light-coupled isolation chip U6, the collector terminal of phototriode in light-coupled isolation chip U7, the collector terminal of phototriode in light-coupled isolation chip U8, the collector terminal of phototriode in light-coupled isolation chip U9, the collector terminal of phototriode in light-coupled isolation chip U10, the collector terminal of phototriode in light-coupled isolation chip U11, the collector terminal of phototriode in light-coupled isolation chip U12, the collector terminal of phototriode in light-coupled isolation chip U13, the collector terminal of phototriode in light-coupled isolation chip U14, the collector terminal of phototriode in light-coupled isolation chip U15, in light-coupled isolation chip U16, in the collector terminal of phototriode and light-coupled isolation chip U17, the collector terminal of phototriode is all held with the FB of the first power supply chip U1 and is connected, first power supply chip U1 adopts model to be the chip of LM2576T-5,
The VIN end of the first power supply chip U1 is connected with+24V voltage and passes through electric capacity C1 ground connection, the ON/OFF of the first power supply chip U1 holds ground connection, the DGND of the first power supply chip U1 holds ground connection, the OUT end of the first power supply chip U1 is connected with the cathode terminal of diode D1, one end of inductance L 1, the anode tap ground connection of diode D1, the other end of inductance L 1 passes through electric capacity C11 ground connection and holds with the FB of the first power supply chip U1 to be connected; The FB end of the first power supply chip U1 is also held and I with the VCC of analog-digital chip DAC1
lEend connects, and holds and I with the VCC of analog-digital chip DAC2
lEend connects.
4. the D/A converting circuit of digital control system according to claim 2, is characterized in that: described amplifier integrated chip U4 adopts signal to be the chip of LM358N, and the VCC end of described amplifier integrated chip U4 is held with the FB of second source chip U2 and is connected; Second source chip U2 adopts model to be the chip of LM2576T-12; The VIN end of second source chip U2 is connected with+24V voltage and passes through electric capacity C2 ground connection, the ON/OFF end of second source chip U2, DGND hold equal ground connection, the OUT end of second source chip U2 is connected with the cathode terminal of diode D2 and one end of inductance L 2, the anode tap ground connection of diode D2, the other end of inductance L 2 passes through electric capacity C21 ground connection and holds with the FB of second source chip U2 to be connected; The in-phase end ground connection of the first operational amplifier in amplifier integrated chip U4, the end of oppisite phase of the first operational amplifier and the I of analog-digital chip DAC1
oUT1end connects, the in-phase end ground connection of the second operational amplifier in amplifier integrated chip U4, the end of oppisite phase of the second operational amplifier and the I of analog-digital chip DAC2
oUT1end connects, and the VEE end of amplifier integrated chip U4 is connected with one end of resistance R1 and one end of resistance R2, and the other end of resistance R1 is held with the Vref of analog-digital chip DAC1 and is connected, and the other end of resistance R2 is held with the Vref of analog-digital chip DA2 and is connected.
5. the D/A converting circuit of digital control system according to claim 4, it is characterized in that: the VEE end of described amplifier integrated chip U4 is also connected with the 3rd power supply chip U3, 3rd power supply chip U3 adopts model to be the chip of LM2576T-12, the VIN end of the 3rd power supply chip U3 is connected with+24V voltage and passes through electric capacity C3 ground connection, the ON/OFF end of the 3rd power supply chip U3, the anode tap of DGND end and diode D3, one end of electric capacity C31 and the VEE end of amplifier integrated chip U4 connect, the cathode terminal of diode D3 holds with the OUT of the 3rd power supply chip U3 and one end of inductance L 3 is connected, the FB of the other end of inductance L 3 and the other end of electric capacity C31 and the 3rd power supply chip U3 holds and is connected, and the FB of the 3rd power supply chip U3 holds ground connection.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420761279.0U CN204287898U (en) | 2014-12-05 | 2014-12-05 | The D/A converting circuit of digital control system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420761279.0U CN204287898U (en) | 2014-12-05 | 2014-12-05 | The D/A converting circuit of digital control system |
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| Publication Number | Publication Date |
|---|---|
| CN204287898U true CN204287898U (en) | 2015-04-22 |
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ID=52871041
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|---|---|---|---|
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| Country | Link |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104460509A (en) * | 2014-12-05 | 2015-03-25 | 无锡市明鑫数控磨床有限公司 | Digital-to-analogue conversion circuit of numerical control system |
| CN105188204A (en) * | 2015-08-26 | 2015-12-23 | 中国科学院上海高等研究院 | Digital-to-analog conversion circuit and method for AMOLED column driver circuit |
-
2014
- 2014-12-05 CN CN201420761279.0U patent/CN204287898U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104460509A (en) * | 2014-12-05 | 2015-03-25 | 无锡市明鑫数控磨床有限公司 | Digital-to-analogue conversion circuit of numerical control system |
| CN105188204A (en) * | 2015-08-26 | 2015-12-23 | 中国科学院上海高等研究院 | Digital-to-analog conversion circuit and method for AMOLED column driver circuit |
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| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
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Granted publication date: 20150422 Termination date: 20191205 |