CN204230241U - Array base palte and display unit - Google Patents
Array base palte and display unit Download PDFInfo
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- CN204230241U CN204230241U CN201420802355.8U CN201420802355U CN204230241U CN 204230241 U CN204230241 U CN 204230241U CN 201420802355 U CN201420802355 U CN 201420802355U CN 204230241 U CN204230241 U CN 204230241U
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Abstract
The utility model provides a kind of array base palte and display unit, this array base palte comprises underlay substrate, described underlay substrate is provided with grid, gate insulator, active layer and source-drain electrode, described underlay substrate is also provided with the antenna for receiving and/or send wireless signal.The utility model is by being arranged on the underlay substrate of array base palte by antenna, thus antenna is directly integrated in display floater, not only can reduce the area of PCB in display unit, the vacant area in array base palte can also be made full use of, thus improve the integrated level of display unit, reduce the overall volume of display unit, in addition, be prepared in by antenna on glass substrate, the insulating property (properties) due to glass substrate makes the substrate loss of antenna very little, thus improves the quality of antenna.
Description
Technical field
The utility model relates to display field, particularly relates to a kind of array base palte and display unit.
Background technology
Along with the development of microelectric technique, various transducer can be undertaken integrated by microelectronic technique, being wherein representative with silicon-based microelectromechanical technology, integrated device is particularly outstanding, but traditional silicon-based devices is still an independently physical module in system level design, this is to the integrated level improving machine system, and reduced volume still can impact.
Moore's Law is followed by current microelectronic, the characteristic size of device has entered the epoch of 14 nanometers, but some passive devices is integrated but be not as simple like that as active device, antenna is the indispensable part of electronic circuit field as passive device, for wireless communication terminal, antenna is integrated in the silicon-based substrate of wherein PCB usually, but, semiconductor property due to silicon substrate causes having substrate loss during Antenna Operation, and silicon area is larger shared by antenna, be unfavorable for that wireless communication terminal is to frivolous future development, thus limit the use of silica-based on-chip antenna to a certain extent.
Utility model content
(1) technical problem that will solve
The technical problems to be solved in the utility model is to provide a kind of array base palte and display unit, can reduce the volume of display unit.
(2) technical scheme
For solving the problems of the technologies described above, the technical solution of the utility model provides a kind of array base palte, comprise underlay substrate, described underlay substrate is provided with grid, gate insulator, active layer and source-drain electrode, described underlay substrate is also provided with the antenna for receiving and/or send wireless signal.
Further, described antenna and described grid are arranged with layer.
Further, also comprise the first insulating barrier be positioned on described antenna and the holding wire be positioned on described first insulating barrier, described first insulating barrier is provided with through hole, described holding wire is connected with described antenna by described through hole.
Further, described first insulating barrier and described gate insulator are arranged with layer, and described holding wire and described source-drain electrode are arranged with layer.
Further, be also provided with articulamentum in described through hole, described holding wire is connected with described antenna by described articulamentum, and the buffering metal level in described articulamentum and described array base palte between source-drain electrode and active layer is arranged with layer.
Further, the graphics shape of described antenna is helical form.
For solving the problems of the technologies described above, the utility model additionally provides a kind of display unit, comprises above-mentioned arbitrary array base palte.
(3) beneficial effect
The utility model is by being arranged on the underlay substrate of array base palte by antenna, thus antenna is directly integrated in display floater, not only can reduce the area of PCB in display unit, the vacant area in array base palte can also be made full use of, thus improve the integrated level of display unit, reduce the overall volume of display unit, in addition, be prepared in by antenna on glass substrate, the insulating property (properties) due to glass substrate makes the substrate loss of antenna very little, thus improves the quality of antenna.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of a kind of array base palte that the utility model execution mode provides;
Fig. 2 is the structural representation of a kind of antenna that the utility model execution mode provides;
Fig. 3 is the flow chart forming the figure of antenna in array base palte that the utility model execution mode provides;
Fig. 4 is the flow chart of the making array base palte that the utility model execution mode provides;
Fig. 5-11 is the schematic diagrames of the making array base palte that the utility model execution mode provides.
Embodiment
Below in conjunction with drawings and Examples, embodiment of the present utility model is described in further detail.Following examples for illustration of the utility model, but are not used for limiting scope of the present utility model.
The utility model execution mode provides a kind of array base palte, this array base palte comprises underlay substrate, described underlay substrate is provided with grid, gate insulator, active layer and source-drain electrode, in addition, described underlay substrate is also provided with the antenna for receiving and/or send wireless signal.
Fig. 1 is the schematic diagram of a kind of array base palte that the utility model execution mode provides, this array base palte comprises underlay substrate 1, the viewing area of described underlay substrate 1 is disposed with grid 2a, gate insulator 3a, active layer 4, source-drain electrode 6a and the buffering metal level 5a between active layer 4 and source-drain electrode 6a, the non-display area of underlay substrate 1 is disposed with antenna 2b, the first insulating barrier 3b and holding wire 6b, wherein, holding wire 6b is connected with antenna 2b by the through hole on the first insulating barrier 3b.
Wherein, above-mentioned underlay substrate 1 can be glass substrate, and the shape of antenna can have any shape, and preferably, in order to improve space availability ratio and strengthen the Signal reception effect of antenna, the graphics shape of described antenna 2b is helical form as shown in Figure 2.
The array base palte that the utility model execution mode provides, by antenna is arranged on the underlay substrate of array base palte, thus antenna is directly integrated in display floater, not only can reduce the area of PCB in display unit, the vacant area in array base palte can also be made full use of, thus improve the integrated level of display unit, reduce the overall volume of display unit, in addition, antenna is prepared on glass substrate, insulating property (properties) due to glass substrate makes the substrate loss of antenna very little, thus improves the quality of antenna.
Preferably, in the above-described embodiment, described antenna and described grid can be arranged with layer, and namely antenna 2b and grid 2a is same material and is formed in a patterning processes.
Preferably, in the above-described embodiment, described first insulating barrier and described gate insulation layer are arranged with layer, described holding wire and described source-drain electrode are arranged with layer, namely gate insulator 3a and the first insulating barrier 3b adopts same material and is formed in a patterning processes, and holding wire 6b and source-drain electrode 6a is same material and is formed in a patterning processes.
Preferably, in order to improve attaching between holding wire 6b and antenna 2b and conductivity, articulamentum 5b is also provided with in the through hole of the first insulating barrier 3b, described holding wire 6b is connected with described antenna 2b by described articulamentum 5b, preferably, described articulamentum 5b is arranged with layer with buffering metal level 5a, and namely articulamentum 5b is same material with buffering metal level 5a and is formed in a patterning processes.
In addition, the utility model embodiment further provides a kind of display unit, comprises above-mentioned array base palte.The display unit that the utility model execution mode provides can be any product or parts with Presentation Function such as note-book computer display screen, liquid crystal display, LCD TV, DPF, mobile phone, panel computer.
The utility model embodiment further provides a kind of manufacture method of array base palte, the manufacture method of this array base palte is included in the figure of figure, the figure of gate insulator, active layer and source-drain electrode underlay substrate being formed grid, in addition, the figure described underlay substrate being formed the antenna for receiving and/or send wireless signal is also included in.
Wherein, above-mentioned underlay substrate can be glass substrate, and the formation of antenna realizes by the metal level forming patterning on underlay substrate.
Particularly, be the flow chart forming the figure of antenna in array base palte that the utility model execution mode provides see Fig. 3, Fig. 3, comprise:
S11: form the first metallic film on described underlay substrate;
S12: carry out patterned process to described first metallic film, to form the figure of described grid on the viewing area of described underlay substrate, the non-display area of described underlay substrate forms the figure of described antenna.For display unit, compare much larger compared with si-substrate integrated circuit because array base palte overhead lap is wherein long-pending, therefore, above-mentioned antenna can be formed in the spare area in array base palte outside viewing area, not only cost of manufacture can be reduced, and make the product of making more frivolous, the display of array substrate can also be avoided to impact.
The manufacture method of the array base palte that the utility model execution mode provides, by forming antenna on the underlay substrate of array base palte, thus antenna is directly integrated in display floater, not only can reduce the area of PCB in display unit, the vacant area in array base palte can also be made full use of, thus improve the integrated level of display unit, reduce the overall volume of display unit, in addition, antenna is prepared on glass substrate, insulating property (properties) due to glass substrate makes the substrate loss of antenna very little, thus improves the quality of antenna.
Wherein, above-mentioned antenna can be formed in 4MASK or the 5MASK technique making array base palte simultaneously, can reduce antenna to the increase making array base palte composition number of times, reduce cost of manufacture.Particularly, be the flow chart of the making array base palte that the utility model execution mode provides see Fig. 4, Fig. 4, the method comprises:
S21: form the first metallic film on underlay substrate, wherein, the viewing area that this first metallic film covers array base palte and the non-display area be positioned at outside viewing area, particularly, see Fig. 5, transparent glass substrate 1 after cleaning can form the first metallic film 2 by vacuum sputtering cement copper (Cu) material;
S22: adopt patterning processes to carry out patterned process to the first metallic film, the figure of grid is formed in viewing area, the figure of antenna is formed at non-display area, preferably, the figure of antenna can be helical form, thus can improve the space availability ratio of non-display area in array base palte as much as possible, particularly, see Fig. 6, first piece of MASK can be adopted to carry out exposing, develop, etch and form the figure of grid 2a and the figure of antenna 2b simultaneously;
S23: form insulation film, this insulation film is not only positioned at above the viewing area of underlay substrate, also be positioned at above its non-display area, wherein, being positioned at the insulation film that non-display area covers above antenna is the first insulating barrier, and the insulation film being positioned at viewing area is gate insulator, particularly, see Fig. 7, the figure that silicon nitride (SiNx) materials'use PECVD can be deposited on grid and antenna forms insulation film 3, obtains the first insulating barrier and gate insulator;
S24: adopt patterning processes to etch the first insulating barrier being positioned at non-display area, form through hole, particularly, see Fig. 8, use negative photoresist and second piece of MASK by exposure, development, and etching is positioned at the silicon nitride of non-display area, form through hole 3c, the position of through hole can be positioned at directly over antenna;
S25: form described active layer on gate insulator, then on viewing area and non-display area, form the 3rd metallic film, 3rd metallic film is for improving attaching property and conductivity between adjacent two layers structure, particularly, see Fig. 9, after being formed with active layer 4, the method for ion sputtering or evaporation is used to form the 3rd metallic film 5,3rd metallic film can adopt Cr material, also can use Mo, ALNd, MoW, Ti, Ta or Cu material;
S26: adopt patterning processes to carry out patterned process to the 3rd metallic film, to form buffering metal level on the source and drain areas of described active layer, articulamentum is formed in described through hole, described holding wire is connected with described antenna by described articulamentum, attaching between active layer and source-drain electrode and conductivity can be improved by above-mentioned buffering metal level, attaching between antenna and holding wire and conductivity can be improved by articulamentum, particularly, see Figure 10, use the 3rd piece of MASK with positive glue by exposure, development, etching, the figure of buffering metal 5a is formed in viewing area, the figure of articulamentum 5b is formed in the through hole 3c of non-display area,
S27: form the second metallic film on viewing area and non-display area, the second metallic film is connected with antenna by above-mentioned articulamentum, particularly, see Figure 11, can adopt evaporation or use ion sputtering to form the second metallic film 6;
S28: adopt patterning processes to carry out patterned process to the second metallic film, the figure of source-drain electrode is formed in viewing area, the figure of holding wire is formed at non-display area, particularly, use the second metal film layer that the 4th piece of MASK is formed by exposure, development, etching, form the figure of source-drain electrode in viewing area, form the figure of holding wire at non-display area, finally obtain antenna structure as depicted in figs. 1 and 2.
Above execution mode is only for illustration of the utility model; and be not limitation of the utility model; the those of ordinary skill of relevant technical field; when not departing from spirit and scope of the present utility model; can also make a variety of changes and modification; therefore all equivalent technical schemes also belong to category of the present utility model, and scope of patent protection of the present utility model should be defined by the claims.
Claims (7)
1. an array base palte, comprises underlay substrate, described underlay substrate is provided with grid, gate insulator, active layer and source-drain electrode, it is characterized in that, described underlay substrate is also provided with the antenna for receiving and/or send wireless signal.
2. array base palte according to claim 1, is characterized in that, described antenna and described grid are arranged with layer.
3. array base palte according to claim 2, it is characterized in that, also comprise the first insulating barrier be positioned on described antenna and the holding wire be positioned on described first insulating barrier, described first insulating barrier is provided with through hole, described holding wire is connected with described antenna by described through hole.
4. array base palte according to claim 3, is characterized in that, described first insulating barrier and described gate insulator are arranged with layer, and described holding wire and described source-drain electrode are arranged with layer.
5. array base palte according to claim 4, it is characterized in that, also be provided with articulamentum in described through hole, described holding wire is connected with described antenna by described articulamentum, and the buffering metal level in described articulamentum and described array base palte between source-drain electrode and active layer is arranged with layer.
6., according to the arbitrary described array base palte of claim 1-5, it is characterized in that, the graphics shape of described antenna is helical form.
7. a display unit, is characterized in that, comprise as arbitrary in claim 1-6 as described in array base palte.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201420802355.8U CN204230241U (en) | 2014-12-16 | 2014-12-16 | Array base palte and display unit |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201420802355.8U CN204230241U (en) | 2014-12-16 | 2014-12-16 | Array base palte and display unit |
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| CN204230241U true CN204230241U (en) | 2015-03-25 |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104485334A (en) * | 2014-12-16 | 2015-04-01 | 京东方科技集团股份有限公司 | Array substrate and manufacturing method thereof and display device |
| WO2017008366A1 (en) * | 2015-07-15 | 2017-01-19 | 深圳市华星光电技术有限公司 | Method for manufacturing display panel |
| WO2018209949A1 (en) * | 2017-05-16 | 2018-11-22 | 京东方科技集团股份有限公司 | Array substrate, display panel and human-machine interaction terminal |
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2014
- 2014-12-16 CN CN201420802355.8U patent/CN204230241U/en active Active
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104485334A (en) * | 2014-12-16 | 2015-04-01 | 京东方科技集团股份有限公司 | Array substrate and manufacturing method thereof and display device |
| WO2016095513A1 (en) * | 2014-12-16 | 2016-06-23 | 京东方科技集团股份有限公司 | Array substrate and manufacturing method and display device thereof |
| US9881947B2 (en) | 2014-12-16 | 2018-01-30 | Boe Technology Group Co., Ltd. | Array substrate and manufacturing method thereof, display device |
| CN104485334B (en) * | 2014-12-16 | 2018-02-13 | 京东方科技集团股份有限公司 | Array base palte and preparation method thereof, display device |
| WO2017008366A1 (en) * | 2015-07-15 | 2017-01-19 | 深圳市华星光电技术有限公司 | Method for manufacturing display panel |
| US10153309B2 (en) | 2015-07-15 | 2018-12-11 | Shenzhen China Star Optoelectronics Technology Co., Ltd | Manufacturing method of display panel |
| WO2018209949A1 (en) * | 2017-05-16 | 2018-11-22 | 京东方科技集团股份有限公司 | Array substrate, display panel and human-machine interaction terminal |
| US11086158B2 (en) | 2017-05-16 | 2021-08-10 | Boe Technology Group Co., Ltd | Array substrate, display panel and man-machine interactive terminal |
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