CN204179689U - A kind of parallel charging circuit - Google Patents
A kind of parallel charging circuit Download PDFInfo
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- CN204179689U CN204179689U CN201420444689.2U CN201420444689U CN204179689U CN 204179689 U CN204179689 U CN 204179689U CN 201420444689 U CN201420444689 U CN 201420444689U CN 204179689 U CN204179689 U CN 204179689U
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B40/00—Technologies aiming at improving the efficiency of home appliances, e.g. induction cooking or efficient technologies for refrigerators, freezers or dish washers
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Abstract
The utility model relates to portable power source field, particularly relate to a kind of parallel charging circuit, comprise: control circuit, charging circuit, amplifying circuit and booster circuit, described charging circuit is connected with control circuit, described booster circuit is connected with control circuit, and described amplifying circuit is connected with control circuit and booster circuit respectively, and described booster circuit comprises synchronous boost chip, the multiple charging inlet of this circuit realiration charges simultaneously, improves charge efficiency.
Description
Technical field
The utility model relates to portable power source field, particularly relates to a kind of parallel charging circuit.
Background technology
Existing portable power source many employings charge independence mode, an i.e. corresponding charging base of portable power source, also some charging base is provided with multiple charging inlet, have simultaneously to the function of multiple portable power source charging, but this charging base also can only charge one by one, after being full of a portable power source, fill next portable power source again, charging interval is still very long, and effectively can not realize parallel charging, charge efficiency is lower.
Utility model content
The purpose of this utility model is to propose a kind of parallel charging circuit, can realize multiple charging inlet and charge simultaneously, improve charge efficiency.
For reaching this object, the utility model by the following technical solutions:
A kind of parallel charging circuit, comprise: control circuit, charging circuit, amplifying circuit and booster circuit, described charging circuit is connected with control circuit, described booster circuit is connected with control circuit, described amplifying circuit is connected with control circuit and booster circuit respectively, and described booster circuit comprises synchronous boost chip;
Wherein, described control circuit comprises: control chip U1, electric capacity C1, electric capacity C2, electric capacity C3, electric capacity C21, resistance R1, resistance R28, resistance R29, resistance R30, resistance R34, resistance R35, resistance R41, switch S 1 and debugging interface J1, wherein, the model of control chip U1 is STM8S003, the pin one of control chip U1 is connected with one end of switch S 1, the other end ground connection of switch S 1, the pin two connected node LED1 of control chip U1, the pin one 7 connected node LED2 of control chip U1, the pin one 6 connected node LED3 of control chip U1, the pin one 5 connected node LED4 of control chip U1, the pin one 3 connected node LED5 of control chip U1, the pin 3 connected node ENU of control chip U1, the pin 4 connected node RST of control chip U1, one end of node R ST and electric capacity C2, the terminal 4 of debugging interface J1 and one end of resistance R1 link together, the other end ground connection of electric capacity C2, the other end of resistance R1 connects VCC-3V3 power interface, the pin 5 connected node STAT1 of control chip U1, the pin 6 connected node VBUS of control chip U1, one end of node VBUS and resistance R28 and one end of resistance R29 link together, the other end of resistance R28 connects VCC-5V power interface, the other end ground connection of resistance R29, pin 7 ground connection together with one end of electric capacity C1 of control chip U1, the pin 8 of the other end connection control chip U1 of electric capacity C1, the pin 9 of control chip U1 and one end of electric capacity C3, one end and the VCC-3V3 power interface of electric capacity C21 link together, other end ground connection together with the other end of electric capacity C21 of electric capacity C3, the pin one 0 connected node EN of control chip U1, one end of the pin one 1 contact resistance R34 of control chip U1, one end of the pin one 2 contact resistance R30 of control chip U1, the other end of resistance R30 is connected to VCC-3V3 power interface together with the other end of resistance R34, the pin one 4 connected node V-ADC of control chip U1, the pin one 8 connected node SWIM of control chip U1, node SWIM connects the terminal 2 of debugging interface J1, the terminal 1 of debugging interface J1 connects VCC-3V3 power interface, terminal 3 ground connection of debugging interface J1, the pin one 9 connected node I-ADC of control chip U1, the pin two 0 connected node NTC-ADC of control chip U1, one end of node NTC-ADC and resistance R35 and one end of resistance R41 link together, the other end of resistance R35 connects VCC_3V3 power interface, the other end ground connection of resistance R41,
Wherein, described amplifying circuit comprises: operation amplifier chip U6A, operation amplifier chip U6B, resistance R8, resistance R9, resistance R20, resistance R21, resistance R22, electric capacity C4, electric capacity C5, electric capacity C15 and electric capacity C18, wherein, two operation amplifier chips that operation amplifier chip U6A and U6B is LM358 by model split and form, the pin one of operation amplifier chip U6A and one end of resistance R20, one end of node I-ADC and electric capacity C15 links together, the pin two of operation amplifier chip U6A and the other end of resistance R20, the other end of electric capacity C15 and one end of resistance R8 link together, the other end ground connection of resistance R8, one end of the pin 3 contact resistance R9 of operation amplifier chip U6A, the other end of resistance R9 is connected to node CURRENT together with one end of electric capacity C18, the other end ground connection of electric capacity C18, pin 4 ground connection of operation amplifier chip U6A, the pin 8 of operation amplifier chip U6A links together with one end of node ENU and electric capacity C4, the other end ground connection of electric capacity C4, the pin 5 of operation amplifier chip U6B and one end of resistance R21, one end of resistance R22 and one end of electric capacity C5 link together, the other end of resistance R21 connects VCC-BAR power interface, other end ground connection together with the other end of electric capacity C5 of resistance R22, the pin 6 of operation amplifier chip U6B is connected to node V-ADC together with the pin 7 of operation amplifier chip U6B,
Wherein, described charging circuit comprises: charging chip U9, USB interface J10, electric capacity C11, electrochemical capacitor C20, resistance R11, resistance R27, resistance R36, diode D6 and light-emitting diode D7, wherein, the model of charging chip U9 is LP28056S, the pin one of charging chip U9 is unsettled, one end of the pin two contact resistance R27 of charging chip U9, the other end of resistance R27 and the pin 3 of charging chip U9, one end of electric capacity C11, the terminal 4 of USB interface J10, terminal 5 ground connection together, the pin 4 of charging chip U9 and the other end of electric capacity C11, the negative pole of diode D6 is connected to VCC-5V power interface together, the terminal 1 of USB interface J10 is connected to the positive pole of diode D6 together with terminal 2, the terminal 3 of USB interface J10 is unsettled, the pin 5 of charging chip U9 is connected to VCC-BAR power interface together with the positive pole of electrochemical capacitor C20, the minus earth of electrochemical capacitor C20, a negative pole of the pin 6 connecting luminous diode D7 of charging chip U9, the pin 7 of charging chip U9 is connected to another negative pole of light-emitting diode D7 together with node STAT1, one end of the positive pole contact resistance R11 of light-emitting diode D7, the other end of resistance R11 connects VCC-3V3 power interface, one end of the pin 8 contact resistance R36 of charging chip U9, the other end of resistance R36 connects VCC-5V power interface,
Wherein, described booster circuit comprises: synchronous boost chip U2, inductance L 1, electric capacity C6, electric capacity C7, electric capacity C8, electric capacity C12, electric capacity C13, electric capacity C26, resistance R2, resistance R12, resistance R13, resistance R14, resistance R15, resistance R16, resistance R17, resistance R18, resistance R37, resistance R38, resistance R39, resistance R40, resistance R42, interface J4 and interface J5, wherein, the model of synchronous boost chip U2 is LA7502, the pin one of synchronous boost chip U2 and one end of inductance L 1, one end of electric capacity C12, one end of electric capacity C6 is connected to VCC-BAR power interface together, one end of the pin two contact resistance R2 of synchronous boost chip U2, and the other end of resistance R2 and one end of node EN and resistance R42 link together, the other end of resistance R42 and the other end of electric capacity C6, the other end of electric capacity C12, the pin 3 of synchronous boost chip U2, the pin 4 of synchronous boost chip U2, one end of electric capacity C7, one end of electric capacity C8, one end of electric capacity C13, one end of resistance R12, one end ground connection together of resistance R13, the pin 5 of synchronous boost chip U2 and the other end of electric capacity C7, the other end of electric capacity C8, the other end of electric capacity C13, one end of resistance R14, one end of resistance R18 and the terminal 1 of interface J5 are connected to VCC-5VO power interface together, the pin 6 of synchronous boost chip U2 is connected to the other end of inductance L 1 together with pin 7, pin 8 ground connection of synchronous boost chip U2, the other end of resistance R12 and the other end of resistance R13, one end of resistance R15, node CURRENT, one end of resistance R16, the terminal 4 of interface J5, the terminal 4 of interface J4, one end of resistance R38, one end of resistance R39 and one end of electric capacity C26 link together, the other end of resistance R15 is connected to the terminal 3 of interface J5 together with the other end of resistance R14, the other end of resistance R16 is connected to the terminal 2 of interface J5 together with the other end of resistance R18, the terminal 1 of interface J4 connects VCC-5VO power interface, the terminal 2 connected node D1-of interface J4, the terminal 3 connected node D1+ of interface J4, the other end of resistance R39 and one end of resistance R17, node D1-, one end of resistance R40 links together, the other end of resistance R17 and the other end of resistance R38, node D1+, one end of resistance R37 links together, the other end of resistance R37 and the other end of resistance R40, the other end of electric capacity C26 is connected to VCC-5VO power interface together.
Wherein, also comprise indicator light circuit, in order to indicate the operating state of parallel charging circuit, described indicator light circuit comprises: light-emitting diode D1, light-emitting diode D2, light-emitting diode D3, dichromatic LED D4, resistance R3, resistance R4, resistance R5, resistance R6 and resistance R7, wherein, the model of dichromatic LED D4 is LED-4P, the negative pole connected node LED1 of light-emitting diode D1, one end of the positive pole contact resistance R3 of light-emitting diode D1, the negative pole connected node LED2 of light-emitting diode D2, one end of the positive pole contact resistance R4 of light-emitting diode D2, the negative pole connected node LED3 of light-emitting diode D3, one end of the positive pole contact resistance R5 of light-emitting diode D3, the pin one connected node LED4 of dichromatic LED D4, the pin 3 connected node LED5 of dichromatic LED D4, one end of the pin two contact resistance R6 of dichromatic LED D4, one end of the pin 4 contact resistance R7 of dichromatic LED D4, the other end of resistance R3 and the other end of resistance R4, the other end of resistance R5, the other end of resistance R6 and the other end of resistance R7 are connected to VCC-3V3 power interface together.
Wherein, also comprise reduction voltage circuit, in order to regulation voltage size, described reduction voltage circuit comprises: high pressure step-down chip U5, diode D5, inductance L 2, electrochemical capacitor C9, electric capacity C10, electric capacity C19, electric capacity C22, electric capacity C23, electric capacity C24, electric capacity C25, resistance R19, resistance R24, resistance R25, resistance R33, power interface J6P-and power interface J7P+, wherein, the model of high pressure step-down chip U5 is LP6492, the pin one of high pressure step-down chip U5 connects one end of electric capacity C22, the other end of electric capacity C22 and the pin 3 of high pressure step-down chip U5 and one end of inductance L 2 link together, the other end of inductance L 2 and node OUT, the positive pole of diode D5, one end of electric capacity C25 and the positive pole of electrochemical capacitor C9 link together, the negative pole of diode D5 connects VCC-5V power interface, other end ground connection together with the negative pole of electrochemical capacitor C9 of electric capacity C25, the pin two of high pressure step-down chip U5 is connected to VCC-12V power interface together with one end of electric capacity C10, pin 4 ground connection together with the other end of electric capacity C10 of high pressure step-down chip U5, the pin 5 of high pressure step-down chip U5 links together with one end of resistance R24 and one end of resistance R25, the other end ground connection of resistance R24, the other end connected node OUT of resistance R25, the pin 6 of high pressure step-down chip U5 links together with one end of resistance R19 and one end of electric capacity C23, the other end of resistance R19 connects one end of electric capacity C24, other end ground connection together with the other end of electric capacity C23 of electric capacity C24, one end of the pin 7 contact resistance R33 of high pressure step-down chip U5, the other end of resistance R33 connects VCC-12V power interface, the pin 8 of high pressure step-down chip U5 connects one end of electric capacity C19, the other end ground connection of electric capacity C19, power interface J6P-ground connection, power interface J7P+ connects VCC-12V power interface.
Wherein, also comprise protective circuit, in order to realize overcharging, cross and put, overvoltage, overcurrent, temperature control, short-circuit protection function, described protective circuit comprises: detect delay chip U4, battery protection chip U7, battery protection chip U8, electric capacity C16, resistance R10, resistance R23, power interface J9B-and power interface J8B+, wherein, the model detecting delay chip U4 is DW01, the model of battery protection chip U7 and U8 is all FS8205A, detect the pin one of delay chip U4 and the pin 4 of battery protection chip U7 and node OD to link together, detect one end of the pin two contact resistance R10 of delay chip U4, the other end of resistance R10 and the pin 6 of battery protection chip U7, the pin 6 of pin 7 and battery protection chip U8, pin 7 ground connection together, detect the pin 3 of delay chip U4 to link together with the pin 5 of battery protection chip U7 and node OC, the pin 4 detecting delay chip U4 is unsettled, the pin 5 detecting delay chip U4 links together with one end of electric capacity C16 and one end of resistance R23, other end ground connection together with detecting the pin 6 of delay chip U4 of electric capacity C16, the other end of resistance R23 connects VCC-BAR power interface, the pin 3 of battery protection chip U7 and the pin two of battery protection chip U7, the pin two of battery protection chip U8, pin 3 is connected to power interface J9B-together, the pin one of battery protection chip U7, the pin one of pin 8 and battery protection chip U8, pin 8 links together, and the pin 5 connected node OC of the pin 4 connected node OD of battery protection chip U8, battery protection chip U8, power interface J8B+ connect VCC-BAR power interface.
Wherein, also comprise voltage stabilizing circuit, described voltage stabilizing circuit comprises: voltage stabilizing chip U3, electric capacity C14, electric capacity C17 and resistance R26, wherein, the model of voltage stabilizing chip U3 is LP3992, the pin one of voltage stabilizing chip U3 is connected to VCC-BAR power interface together with one end of electric capacity C14, pin two ground connection together with the other end of electric capacity C14 of voltage stabilizing chip U3, the pin 3 of voltage stabilizing chip U3 is connected to VCC-BAR power interface together with one end of resistance R26, the other end ground connection of resistance R26, the pin 4 of voltage stabilizing chip U3 is unsettled, the pin 5 of voltage stabilizing chip U3 is connected to VCC-3V3 power interface together with one end of electric capacity C17, the other end ground connection of electric capacity C17.
The beneficial effects of the utility model are: a kind of parallel charging circuit, comprise: control circuit, charging circuit, amplifying circuit and booster circuit, described charging circuit is connected with control circuit, described booster circuit is connected with control circuit, described amplifying circuit is connected with control circuit and booster circuit respectively, described booster circuit comprises synchronous boost chip, and the multiple charging inlet of this circuit realiration charges simultaneously, improves charge efficiency.
Accompanying drawing explanation
Fig. 1 is that one that the utility model embodiment provides walks abreast charging circuit functional structure chart.
Fig. 2 is the circuit diagram of the control circuit that the utility model embodiment provides.
Fig. 3 is the circuit diagram of the indicating circuit that the utility model embodiment provides.
Fig. 4 is the circuit diagram of the reduction voltage circuit that the utility model embodiment provides.
Fig. 5 is the circuit diagram of the protective circuit that the utility model embodiment provides.
Fig. 6 is the circuit diagram of the charging circuit that the utility model embodiment provides.
Fig. 7 is the circuit diagram of the voltage stabilizing circuit that the utility model embodiment provides.
Fig. 8 is the circuit diagram of the amplifying circuit that the utility model embodiment provides.
Fig. 9 is the circuit diagram of the booster circuit that the utility model embodiment provides.
Embodiment
The technical solution of the utility model is further illustrated by embodiment below in conjunction with Fig. 1.
Fig. 1 is that one that the utility model embodiment provides walks abreast charging circuit functional structure chart.
A kind of parallel charging circuit, comprise: control circuit, charging circuit, amplifying circuit and booster circuit, described charging circuit is connected with control circuit, described booster circuit is connected with control circuit, described amplifying circuit is connected with control circuit and booster circuit respectively, and described booster circuit comprises synchronous boost chip.
In the present embodiment, this circuit is by synchronous boost chip, and the cooperation of control circuit, charging circuit and amplifying circuit, achieves multiple charging inlet and charges simultaneously, compared with prior art, greatly save the charging interval, improve charge efficiency
As shown in Figure 2, in the present embodiment, described control circuit comprises: control chip U1, electric capacity C1, electric capacity C2, electric capacity C3, electric capacity C21, resistance R1, resistance R28, resistance R29, resistance R30, resistance R34, resistance R35, resistance R41, switch S 1 and debugging interface J1, wherein, the model of control chip U1 is STM8S003, the pin one of control chip U1 is connected with one end of switch S 1, the other end ground connection of switch S 1, the pin two connected node LED1 of control chip U1, the pin one 7 connected node LED2 of control chip U1, the pin one 6 connected node LED3 of control chip U1, the pin one 5 connected node LED4 of control chip U1, the pin one 3 connected node LED5 of control chip U1, the pin 3 connected node ENU of control chip U1, the pin 4 connected node RST of control chip U1, one end of node R ST and electric capacity C2, the terminal 4 of debugging interface J1 and one end of resistance R1 link together, the other end ground connection of electric capacity C2, the other end of resistance R1 connects VCC-3V3 power interface, the pin 5 connected node STAT1 of control chip U1, the pin 6 connected node VBUS of control chip U1, one end of node VBUS and resistance R28 and one end of resistance R29 link together, the other end of resistance R28 connects VCC-5V power interface, the other end ground connection of resistance R29, pin 7 ground connection together with one end of electric capacity C1 of control chip U1, the pin 8 of the other end connection control chip U1 of electric capacity C1, the pin 9 of control chip U1 and one end of electric capacity C3, one end and the VCC-3V3 power interface of electric capacity C21 link together, other end ground connection together with the other end of electric capacity C21 of electric capacity C3, the pin one 0 connected node EN of control chip U1, one end of the pin one 1 contact resistance R34 of control chip U1, one end of the pin one 2 contact resistance R30 of control chip U1, the other end of resistance R30 is connected to VCC-3V3 power interface together with the other end of resistance R34, the pin one 4 connected node V-ADC of control chip U1, the pin one 8 connected node SWIM of control chip U1, node SWIM connects the terminal 2 of debugging interface J1, the terminal 1 of debugging interface J1 connects VCC-3V3 power interface, terminal 3 ground connection of debugging interface J1, the pin one 9 connected node I-ADC of control chip U1, the pin two 0 connected node NTC-ADC of control chip U1, one end of node NTC-ADC and resistance R35 and one end of resistance R41 link together, the other end of resistance R35 connects VCC_3V3 power interface, the other end ground connection of resistance R41.
As shown in Figure 8, in the present embodiment, described amplifying circuit comprises: operation amplifier chip U6A, operation amplifier chip U6B, resistance R8, resistance R9, resistance R20, resistance R21, resistance R22, electric capacity C4, electric capacity C5, electric capacity C15 and electric capacity C18, wherein, two operation amplifier chips that operation amplifier chip U6A and U6B is LM358 by model split and form, the pin one of operation amplifier chip U6A and one end of resistance R20, one end of node I-ADC and electric capacity C15 links together, the pin two of operation amplifier chip U6A and the other end of resistance R20, the other end of electric capacity C15 and one end of resistance R8 link together, the other end ground connection of resistance R8, one end of the pin 3 contact resistance R9 of operation amplifier chip U6A, the other end of resistance R9 is connected to node CURRENT together with one end of electric capacity C18, the other end ground connection of electric capacity C18, pin 4 ground connection of operation amplifier chip U6A, the pin 8 of operation amplifier chip U6A links together with one end of node ENU and electric capacity C4, the other end ground connection of electric capacity C4, the pin 5 of operation amplifier chip U6B and one end of resistance R21, one end of resistance R22 and one end of electric capacity C5 link together, the other end of resistance R21 connects VCC-BAR power interface, other end ground connection together with the other end of electric capacity C5 of resistance R22, the pin 6 of operation amplifier chip U6B is connected to node V-ADC together with the pin 7 of operation amplifier chip U6B.
As shown in Figure 9, in the present embodiment, described booster circuit comprises: synchronous boost chip U2, inductance L 1, electric capacity C6, electric capacity C7, electric capacity C8, electric capacity C12, electric capacity C13, electric capacity C26, resistance R2, resistance R12, resistance R13, resistance R14, resistance R15, resistance R16, resistance R17, resistance R18, resistance R37, resistance R38, resistance R39, resistance R40, resistance R42, interface J4 and interface J5, wherein, the model of synchronous boost chip U2 is LA7502, the pin one of synchronous boost chip U2 and one end of inductance L 1, one end of electric capacity C12, one end of electric capacity C6 is connected to VCC-BAR power interface together, one end of the pin two contact resistance R2 of synchronous boost chip U2, and the other end of resistance R2 and one end of node EN and resistance R42 link together, the other end of resistance R42 and the other end of electric capacity C6, the other end of electric capacity C12, the pin 3 of synchronous boost chip U2, the pin 4 of synchronous boost chip U2, one end of electric capacity C7, one end of electric capacity C8, one end of electric capacity C13, one end of resistance R12, one end ground connection together of resistance R13, the pin 5 of synchronous boost chip U2 and the other end of electric capacity C7, the other end of electric capacity C8, the other end of electric capacity C13, one end of resistance R14, one end of resistance R18 and the terminal 1 of interface J5 are connected to VCC-5VO power interface together, the pin 6 of synchronous boost chip U2 is connected to the other end of inductance L 1 together with pin 7, pin 8 ground connection of synchronous boost chip U2, the other end of resistance R12 and the other end of resistance R13, one end of resistance R15, node CURRENT, one end of resistance R16, the terminal 4 of interface J5, the terminal 4 of interface J4, one end of resistance R38, one end of resistance R39 and one end of electric capacity C26 link together, the other end of resistance R15 is connected to the terminal 3 of interface J5 together with the other end of resistance R14, the other end of resistance R16 is connected to the terminal 2 of interface J5 together with the other end of resistance R18, the terminal 1 of interface J4 connects VCC-5VO power interface, the terminal 2 connected node D1-of interface J4, the terminal 3 connected node D1+ of interface J4, the other end of resistance R39 and one end of resistance R17, node D1-, one end of resistance R40 links together, the other end of resistance R17 and the other end of resistance R38, node D1+, one end of resistance R37 links together, the other end of resistance R37 and the other end of resistance R40, the other end of electric capacity C26 is connected to VCC-5VO power interface together.
As shown in Figure 3, in the present embodiment, also comprise indicator light circuit, in order to indicate the operating state of parallel charging circuit, described indicator light circuit comprises: light-emitting diode D1, light-emitting diode D2, light-emitting diode D3, dichromatic LED D4, resistance R3, resistance R4, resistance R5, resistance R6 and resistance R7, wherein, the model of dichromatic LED D4 is LED-4P, the negative pole connected node LED1 of light-emitting diode D1, one end of the positive pole contact resistance R3 of light-emitting diode D1, the negative pole connected node LED2 of light-emitting diode D2, one end of the positive pole contact resistance R4 of light-emitting diode D2, the negative pole connected node LED3 of light-emitting diode D3, one end of the positive pole contact resistance R5 of light-emitting diode D3, the pin one connected node LED4 of dichromatic LED D4, the pin 3 connected node LED5 of dichromatic LED D4, one end of the pin two contact resistance R6 of dichromatic LED D4, one end of the pin 4 contact resistance R7 of dichromatic LED D4, the other end of resistance R3 and the other end of resistance R4, the other end of resistance R5, the other end of resistance R6 and the other end of resistance R7 are connected to VCC-3V3 power interface together.
As shown in Figure 4, in the present embodiment, also comprise reduction voltage circuit, in order to regulation voltage size, described reduction voltage circuit comprises: high pressure step-down chip U5, diode D5, inductance L 2, electrochemical capacitor C9, electric capacity C10, electric capacity C19, electric capacity C22, electric capacity C23, electric capacity C24, electric capacity C25, resistance R19, resistance R24, resistance R25, resistance R33, power interface J6P-and power interface J7P+, wherein, the model of high pressure step-down chip U5 is LP6492, the pin one of high pressure step-down chip U5 connects one end of electric capacity C22, the other end of electric capacity C22 and the pin 3 of high pressure step-down chip U5 and one end of inductance L 2 link together, the other end of inductance L 2 and node OUT, the positive pole of diode D5, one end of electric capacity C25 and the positive pole of electrochemical capacitor C9 link together, the negative pole of diode D5 connects VCC-5V power interface, other end ground connection together with the negative pole of electrochemical capacitor C9 of electric capacity C25, the pin two of high pressure step-down chip U5 is connected to VCC-12V power interface together with one end of electric capacity C10, pin 4 ground connection together with the other end of electric capacity C10 of high pressure step-down chip U5, the pin 5 of high pressure step-down chip U5 links together with one end of resistance R24 and one end of resistance R25, the other end ground connection of resistance R24, the other end connected node OUT of resistance R25, the pin 6 of high pressure step-down chip U5 links together with one end of resistance R19 and one end of electric capacity C23, the other end of resistance R19 connects one end of electric capacity C24, other end ground connection together with the other end of electric capacity C23 of electric capacity C24, one end of the pin 7 contact resistance R33 of high pressure step-down chip U5, the other end of resistance R33 connects VCC-12V power interface, the pin 8 of high pressure step-down chip U5 connects one end of electric capacity C19, the other end ground connection of electric capacity C19, power interface J6P-ground connection, power interface J7P+ connects VCC-12V power interface.
As shown in Figure 5, in the present embodiment, also protective circuit is comprised, in order to realize overcharging, cross and put, overvoltage, overcurrent, temperature control, short-circuit protection function, described protective circuit comprises: detect delay chip U4, battery protection chip U7, battery protection chip U8, electric capacity C16, resistance R10, resistance R23, power interface J9B-and power interface J8B+, wherein, the model detecting delay chip U4 is DW01, the model of battery protection chip U7 and U8 is all FS8205A, detect the pin one of delay chip U4 and the pin 4 of battery protection chip U7 and node OD to link together, detect one end of the pin two contact resistance R10 of delay chip U4, the other end of resistance R10 and the pin 6 of battery protection chip U7, the pin 6 of pin 7 and battery protection chip U8, pin 7 ground connection together, detect the pin 3 of delay chip U4 to link together with the pin 5 of battery protection chip U7 and node OC, the pin 4 detecting delay chip U4 is unsettled, the pin 5 detecting delay chip U4 links together with one end of electric capacity C16 and one end of resistance R23, other end ground connection together with detecting the pin 6 of delay chip U4 of electric capacity C16, the other end of resistance R23 connects VCC-BAR power interface, the pin 3 of battery protection chip U7 and the pin two of battery protection chip U7, the pin two of battery protection chip U8, pin 3 is connected to power interface J9B-together, the pin one of battery protection chip U7, the pin one of pin 8 and battery protection chip U8, pin 8 links together, and the pin 5 connected node OC of the pin 4 connected node OD of battery protection chip U8, battery protection chip U8, power interface J8B+ connect VCC-BAR power interface.
As shown in Figure 6, in the present embodiment, described charging circuit comprises: charging chip U9, USB interface J10, electric capacity C11, electrochemical capacitor C20, resistance R11, resistance R27, resistance R36, diode D6 and light-emitting diode D7, wherein, the model of charging chip U9 is LP28056S, the pin one of charging chip U9 is unsettled, one end of the pin two contact resistance R27 of charging chip U9, the other end of resistance R27 and the pin 3 of charging chip U9, one end of electric capacity C11, the terminal 4 of USB interface J10, terminal 5 ground connection together, the pin 4 of charging chip U9 and the other end of electric capacity C11, the negative pole of diode D6 is connected to VCC-5V power interface together, the terminal 1 of USB interface J10 is connected to the positive pole of diode D6 together with terminal 2, the terminal 3 of USB interface J10 is unsettled, the pin 5 of charging chip U9 is connected to VCC-BAR power interface together with the positive pole of electrochemical capacitor C20, the minus earth of electrochemical capacitor C20, a negative pole of the pin 6 connecting luminous diode D7 of charging chip U9, the pin 7 of charging chip U9 is connected to another negative pole of light-emitting diode D7 together with node STAT1, one end of the positive pole contact resistance R11 of light-emitting diode D7, the other end of resistance R11 connects VCC-3V3 power interface, one end of the pin 8 contact resistance R36 of charging chip U9, the other end of resistance R36 connects VCC-5V power interface.
As shown in Figure 7, in the present embodiment, also comprise voltage stabilizing circuit, described voltage stabilizing circuit comprises: voltage stabilizing chip U3, electric capacity C14, electric capacity C17 and resistance R26, wherein, the model of voltage stabilizing chip U3 is LP3992, the pin one of voltage stabilizing chip U3 is connected to VCC-BAR power interface together with one end of electric capacity C14, pin two ground connection together with the other end of electric capacity C14 of voltage stabilizing chip U3, the pin 3 of voltage stabilizing chip U3 is connected to VCC-BAR power interface together with one end of resistance R26, the other end ground connection of resistance R26, the pin 4 of voltage stabilizing chip U3 is unsettled, the pin 5 of voltage stabilizing chip U3 is connected to VCC-3V3 power interface together with one end of electric capacity C17, the other end ground connection of electric capacity C17.
In the present embodiment, the parameter of above-mentioned various components and parts is a kind of preferred embodiment of the present utility model, and those skilled in the art can realize similar effect by the parameter adjusting above-mentioned components and parts, and these are all within protection range of the present utility model.
The foregoing is only embodiment of the present utility model, these describe just in order to explain principle of the present utility model, and can not be interpreted as the restriction to the utility model protection range by any way.Based on explanation herein, those skilled in the art does not need to pay performing creative labour can associate other specific implementation method of the present utility model, and these modes all will fall within protection range of the present utility model.
Claims (5)
1. a parallel charging circuit, it is characterized in that, comprise: control circuit, charging circuit, amplifying circuit and booster circuit, described charging circuit is connected with control circuit, described booster circuit is connected with control circuit, described amplifying circuit is connected with control circuit and booster circuit respectively, and described booster circuit comprises synchronous boost chip;
Wherein, described control circuit comprises: control chip U1, electric capacity C1, electric capacity C2, electric capacity C3, electric capacity C21, resistance R1, resistance R28, resistance R29, resistance R30, resistance R34, resistance R35, resistance R41, switch S 1 and debugging interface J1, wherein, the model of control chip U1 is STM8S003, the pin one of control chip U1 is connected with one end of switch S 1, the other end ground connection of switch S 1, the pin two connected node LED1 of control chip U1, the pin one 7 connected node LED2 of control chip U1, the pin one 6 connected node LED3 of control chip U1, the pin one 5 connected node LED4 of control chip U1, the pin one 3 connected node LED5 of control chip U1, the pin 3 connected node ENU of control chip U1, the pin 4 connected node RST of control chip U1, one end of node R ST and electric capacity C2, the terminal 4 of debugging interface J1 and one end of resistance R1 link together, the other end ground connection of electric capacity C2, the other end of resistance R1 connects VCC-3V3 power interface, the pin 5 connected node STAT1 of control chip U1, the pin 6 connected node VBUS of control chip U1, one end of node VBUS and resistance R28 and one end of resistance R29 link together, the other end of resistance R28 connects VCC-5V power interface, the other end ground connection of resistance R29, pin 7 ground connection together with one end of electric capacity C1 of control chip U1, the pin 8 of the other end connection control chip U1 of electric capacity C1, the pin 9 of control chip U1 and one end of electric capacity C3, one end and the VCC-3V3 power interface of electric capacity C21 link together, other end ground connection together with the other end of electric capacity C21 of electric capacity C3, the pin one 0 connected node EN of control chip U1, one end of the pin one 1 contact resistance R34 of control chip U1, one end of the pin one 2 contact resistance R30 of control chip U1, the other end of resistance R30 is connected to VCC-3V3 power interface together with the other end of resistance R34, the pin one 4 connected node V-ADC of control chip U1, the pin one 8 connected node SWIM of control chip U1, node SWIM connects the terminal 2 of debugging interface J1, the terminal 1 of debugging interface J1 connects VCC-3V3 power interface, terminal 3 ground connection of debugging interface J1, the pin one 9 connected node I-ADC of control chip U1, the pin two 0 connected node NTC-ADC of control chip U1, one end of node NTC-ADC and resistance R35 and one end of resistance R41 link together, the other end of resistance R35 connects VCC_3V3 power interface, the other end ground connection of resistance R41,
Wherein, described amplifying circuit comprises: operation amplifier chip U6A, operation amplifier chip U6B, resistance R8, resistance R9, resistance R20, resistance R21, resistance R22, electric capacity C4, electric capacity C5, electric capacity C15 and electric capacity C18, wherein, two operation amplifier chips that operation amplifier chip U6A and U6B is LM358 by model split and form, the pin one of operation amplifier chip U6A and one end of resistance R20, one end of node I-ADC and electric capacity C15 links together, the pin two of operation amplifier chip U6A and the other end of resistance R20, the other end of electric capacity C15 and one end of resistance R8 link together, the other end ground connection of resistance R8, one end of the pin 3 contact resistance R9 of operation amplifier chip U6A, the other end of resistance R9 is connected to node CURRENT together with one end of electric capacity C18, the other end ground connection of electric capacity C18, pin 4 ground connection of operation amplifier chip U6A, the pin 8 of operation amplifier chip U6A links together with one end of node ENU and electric capacity C4, the other end ground connection of electric capacity C4, the pin 5 of operation amplifier chip U6B and one end of resistance R21, one end of resistance R22 and one end of electric capacity C5 link together, the other end of resistance R21 connects VCC-BAR power interface, other end ground connection together with the other end of electric capacity C5 of resistance R22, the pin 6 of operation amplifier chip U6B is connected to node V-ADC together with the pin 7 of operation amplifier chip U6B,
Wherein, described charging circuit comprises: charging chip U9, USB interface J10, electric capacity C11, electrochemical capacitor C20, resistance R11, resistance R27, resistance R36, diode D6 and light-emitting diode D7, wherein, the model of charging chip U9 is LP28056S, the pin one of charging chip U9 is unsettled, one end of the pin two contact resistance R27 of charging chip U9, the other end of resistance R27 and the pin 3 of charging chip U9, one end of electric capacity C11, the terminal 4 of USB interface J10, terminal 5 ground connection together, the pin 4 of charging chip U9 and the other end of electric capacity C11, the negative pole of diode D6 is connected to VCC-5V power interface together, the terminal 1 of USB interface J10 is connected to the positive pole of diode D6 together with terminal 2, the terminal 3 of USB interface J10 is unsettled, the pin 5 of charging chip U9 is connected to VCC-BAR power interface together with the positive pole of electrochemical capacitor C20, the minus earth of electrochemical capacitor C20, a negative pole of the pin 6 connecting luminous diode D7 of charging chip U9, the pin 7 of charging chip U9 is connected to another negative pole of light-emitting diode D7 together with node STAT1, one end of the positive pole contact resistance R11 of light-emitting diode D7, the other end of resistance R11 connects VCC-3V3 power interface, one end of the pin 8 contact resistance R36 of charging chip U9, the other end of resistance R36 connects VCC-5V power interface,
Wherein, described booster circuit comprises: synchronous boost chip U2, inductance L 1, electric capacity C6, electric capacity C7, electric capacity C8, electric capacity C12, electric capacity C13, electric capacity C26, resistance R2, resistance R12, resistance R13, resistance R14, resistance R15, resistance R16, resistance R17, resistance R18, resistance R37, resistance R38, resistance R39, resistance R40, resistance R42, interface J4 and interface J5, wherein, the model of synchronous boost chip U2 is LA7502, the pin one of synchronous boost chip U2 and one end of inductance L 1, one end of electric capacity C12, one end of electric capacity C6 is connected to VCC-BAR power interface together, one end of the pin two contact resistance R2 of synchronous boost chip U2, and the other end of resistance R2 and one end of node EN and resistance R42 link together, the other end of resistance R42 and the other end of electric capacity C6, the other end of electric capacity C12, the pin 3 of synchronous boost chip U2, the pin 4 of synchronous boost chip U2, one end of electric capacity C7, one end of electric capacity C8, one end of electric capacity C13, one end of resistance R12, one end ground connection together of resistance R13, the pin 5 of synchronous boost chip U2 and the other end of electric capacity C7, the other end of electric capacity C8, the other end of electric capacity C13, one end of resistance R14, one end of resistance R18 and the terminal 1 of interface J5 are connected to VCC-5VO power interface together, the pin 6 of synchronous boost chip U2 is connected to the other end of inductance L 1 together with pin 7, pin 8 ground connection of synchronous boost chip U2, the other end of resistance R12 and the other end of resistance R13, one end of resistance R15, node CURRENT, one end of resistance R16, the terminal 4 of interface J5, the terminal 4 of interface J4, one end of resistance R38, one end of resistance R39 and one end of electric capacity C26 link together, the other end of resistance R15 is connected to the terminal 3 of interface J5 together with the other end of resistance R14, the other end of resistance R16 is connected to the terminal 2 of interface J5 together with the other end of resistance R18, the terminal 1 of interface J4 connects VCC-5VO power interface, the terminal 2 connected node D1-of interface J4, the terminal 3 connected node D1+ of interface J4, the other end of resistance R39 and one end of resistance R17, node D1-, one end of resistance R40 links together, the other end of resistance R17 and the other end of resistance R38, node D1+, one end of resistance R37 links together, the other end of resistance R37 and the other end of resistance R40, the other end of electric capacity C26 is connected to VCC-5VO power interface together.
2. one according to claim 1 walks abreast charging circuit, it is characterized in that, also comprise indicator light circuit, in order to indicate the operating state of parallel charging circuit, described indicator light circuit comprises: light-emitting diode D1, light-emitting diode D2, light-emitting diode D3, dichromatic LED D4, resistance R3, resistance R4, resistance R5, resistance R6 and resistance R7, wherein, the model of dichromatic LED D4 is LED-4P, the negative pole connected node LED1 of light-emitting diode D1, one end of the positive pole contact resistance R3 of light-emitting diode D1, the negative pole connected node LED2 of light-emitting diode D2, one end of the positive pole contact resistance R4 of light-emitting diode D2, the negative pole connected node LED3 of light-emitting diode D3, one end of the positive pole contact resistance R5 of light-emitting diode D3, the pin one connected node LED4 of dichromatic LED D4, the pin 3 connected node LED5 of dichromatic LED D4, one end of the pin two contact resistance R6 of dichromatic LED D4, one end of the pin 4 contact resistance R7 of dichromatic LED D4, the other end of resistance R3 and the other end of resistance R4, the other end of resistance R5, the other end of resistance R6 and the other end of resistance R7 are connected to VCC-3V3 power interface together.
3. one according to claim 1 walks abreast charging circuit, it is characterized in that, also comprise reduction voltage circuit, in order to regulation voltage size, described reduction voltage circuit comprises: high pressure step-down chip U5, diode D5, inductance L 2, electrochemical capacitor C9, electric capacity C10, electric capacity C19, electric capacity C22, electric capacity C23, electric capacity C24, electric capacity C25, resistance R19, resistance R24, resistance R25, resistance R33, power interface J6P-and power interface J7P+, wherein, the model of high pressure step-down chip U5 is LP6492, the pin one of high pressure step-down chip U5 connects one end of electric capacity C22, the other end of electric capacity C22 and the pin 3 of high pressure step-down chip U5 and one end of inductance L 2 link together, the other end of inductance L 2 and node OUT, the positive pole of diode D5, one end of electric capacity C25 and the positive pole of electrochemical capacitor C9 link together, the negative pole of diode D5 connects VCC-5V power interface, other end ground connection together with the negative pole of electrochemical capacitor C9 of electric capacity C25, the pin two of high pressure step-down chip U5 is connected to VCC-12V power interface together with one end of electric capacity C10, pin 4 ground connection together with the other end of electric capacity C10 of high pressure step-down chip U5, the pin 5 of high pressure step-down chip U5 links together with one end of resistance R24 and one end of resistance R25, the other end ground connection of resistance R24, the other end connected node OUT of resistance R25, the pin 6 of high pressure step-down chip U5 links together with one end of resistance R19 and one end of electric capacity C23, the other end of resistance R19 connects one end of electric capacity C24, other end ground connection together with the other end of electric capacity C23 of electric capacity C24, one end of the pin 7 contact resistance R33 of high pressure step-down chip U5, the other end of resistance R33 connects VCC-12V power interface, the pin 8 of high pressure step-down chip U5 connects one end of electric capacity C19, the other end ground connection of electric capacity C19, power interface J6P-ground connection, power interface J7P+ connects VCC-12V power interface.
4. one according to claim 1 walks abreast charging circuit, it is characterized in that, also comprises protective circuit, in order to realize overcharging, cross and put, overvoltage, overcurrent, temperature control, short-circuit protection function, described protective circuit comprises: detect delay chip U4, battery protection chip U7, battery protection chip U8, electric capacity C16, resistance R10, resistance R23, power interface J9B-and power interface J8B+, wherein, the model detecting delay chip U4 is DW01, the model of battery protection chip U7 and U8 is all FS8205A, detect the pin one of delay chip U4 and the pin 4 of battery protection chip U7 and node OD to link together, detect one end of the pin two contact resistance R10 of delay chip U4, the other end of resistance R10 and the pin 6 of battery protection chip U7, the pin 6 of pin 7 and battery protection chip U8, pin 7 ground connection together, detect the pin 3 of delay chip U4 to link together with the pin 5 of battery protection chip U7 and node OC, the pin 4 detecting delay chip U4 is unsettled, the pin 5 detecting delay chip U4 links together with one end of electric capacity C16 and one end of resistance R23, other end ground connection together with detecting the pin 6 of delay chip U4 of electric capacity C16, the other end of resistance R23 connects VCC-BAR power interface, the pin 3 of battery protection chip U7 and the pin two of battery protection chip U7, the pin two of battery protection chip U8, pin 3 is connected to power interface J9B-together, the pin one of battery protection chip U7, the pin one of pin 8 and battery protection chip U8, pin 8 links together, and the pin 5 connected node OC of the pin 4 connected node OD of battery protection chip U8, battery protection chip U8, power interface J8B+ connect VCC-BAR power interface.
5. one according to claim 1 walks abreast charging circuit, it is characterized in that, also comprise voltage stabilizing circuit, described voltage stabilizing circuit comprises: voltage stabilizing chip U3, electric capacity C14, electric capacity C17 and resistance R26, wherein, the model of voltage stabilizing chip U3 is LP3992, the pin one of voltage stabilizing chip U3 is connected to VCC-BAR power interface together with one end of electric capacity C14, pin two ground connection together with the other end of electric capacity C14 of voltage stabilizing chip U3, the pin 3 of voltage stabilizing chip U3 is connected to VCC-BAR power interface together with one end of resistance R26, the other end ground connection of resistance R26, the pin 4 of voltage stabilizing chip U3 is unsettled, the pin 5 of voltage stabilizing chip U3 is connected to VCC-3V3 power interface together with one end of electric capacity C17, the other end ground connection of electric capacity C17.
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|---|---|---|---|
| CN201420444689.2U CN204179689U (en) | 2014-08-07 | 2014-08-07 | A kind of parallel charging circuit |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201420444689.2U CN204179689U (en) | 2014-08-07 | 2014-08-07 | A kind of parallel charging circuit |
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| CN204179689U true CN204179689U (en) | 2015-02-25 |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104901413A (en) * | 2015-05-22 | 2015-09-09 | 成都前锋电子仪器有限责任公司 | Power supply control system used for intelligent gas meter |
| CN106714384A (en) * | 2017-01-22 | 2017-05-24 | 湖南电将军新能源有限公司 | Light-emitting diode (LED) drive circuit and LED drive method for automobile starting power supply |
| CN108335139A (en) * | 2018-02-02 | 2018-07-27 | 吴霜 | Instant Ads system, device and method |
| CN110556891A (en) * | 2019-08-15 | 2019-12-10 | 闻泰科技(无锡)有限公司 | Charging circuit of double-charger |
-
2014
- 2014-08-07 CN CN201420444689.2U patent/CN204179689U/en not_active Expired - Fee Related
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104901413A (en) * | 2015-05-22 | 2015-09-09 | 成都前锋电子仪器有限责任公司 | Power supply control system used for intelligent gas meter |
| CN104901413B (en) * | 2015-05-22 | 2018-05-04 | 成都前锋电子仪器有限责任公司 | A kind of power control system for intelligent gas meter |
| CN106714384A (en) * | 2017-01-22 | 2017-05-24 | 湖南电将军新能源有限公司 | Light-emitting diode (LED) drive circuit and LED drive method for automobile starting power supply |
| CN108335139A (en) * | 2018-02-02 | 2018-07-27 | 吴霜 | Instant Ads system, device and method |
| CN108335139B (en) * | 2018-02-02 | 2022-05-03 | 吴霜 | Instant advertisement system, equipment and method |
| CN110556891A (en) * | 2019-08-15 | 2019-12-10 | 闻泰科技(无锡)有限公司 | Charging circuit of double-charger |
| CN110556891B (en) * | 2019-08-15 | 2024-04-02 | 闻泰科技(无锡)有限公司 | Charging circuit of double chargers |
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Effective date of registration: 20170907 Address after: 518109 Guangdong city of Shenzhen province Baoan District Longhua District East two Ring Road Northeast jinhuafa District 6 Building 3 floor Patentee after: SHENZHEN WISTEK ENERGY Co.,Ltd. Address before: 518000 Guangdong city of Shenzhen province Baoan District Longhua District East two Ring Road Northeast jinhuafa District 6 Building 3 floor Patentee before: Sun Hui |
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