CN204178680U - A kind of shift register, gate driver circuit and display device - Google Patents
A kind of shift register, gate driver circuit and display device Download PDFInfo
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- CN204178680U CN204178680U CN201420697282.0U CN201420697282U CN204178680U CN 204178680 U CN204178680 U CN 204178680U CN 201420697282 U CN201420697282 U CN 201420697282U CN 204178680 U CN204178680 U CN 204178680U
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Abstract
The utility model relates to a kind of shift register, gate driver circuit and display device, described shift register comprises pull-up module, drop-down module and control module, described pull-up module is used for the signal pull-up exported by the output terminal of shift register at the corresponding levels, it comprises and pulling up transistor, the described grid pulled up transistor is connected with described control module, first pole is connected with pull-up signal input part, and the second pole is connected with described output terminal; The break-make of described control module for pulling up transistor described in controlling; The signal that described drop-down module is used for the output terminal of shift register at the corresponding levels to export is drop-down, and it comprises pull-down transistor, and grid, first pole of described pull-down transistor are connected with described pulldown signal input end, and the second pole is connected with described output terminal.Above-mentioned shift register decreases the quantity of transistor, makes the space that it takies, and namely border width reduces, thus contributes to the narrow frame realizing display device.
Description
Technical field
The utility model relates to technical field of liquid crystal display, particularly, relates to a kind of shift register, gate driver circuit and display device.
Background technology
In Organic Light Emitting Diode (Organic Light-Emitting Diode, hereinafter referred to as OLED) display device, each pixel under the control of thin film transistor (TFT) independently luminescence show.In the gate driver circuit of OLED display, need to arrange light emitting control shift register, described light emitting control shift register is by exporting shutdown signal a pulse, and all export start signal in all the other periods, to realize being in normally open at pixel light emission stage control pixel light emission.
Fig. 1 is the circuit diagram of existing light emitting control shift register.As shown in Figure 1, this light emitting control shift register comprises pull-up module 1, drop-down module 2, one-level control module 3 ＇ and Two-stage control module 3 〞.Wherein, the signal pull-up of pull-up module 1 for the output terminal 4 of shift register at the corresponding levels is exported, it comprises and pulls up transistor 10, described in pull up transistor 10 the first pole be connected with pull-up signal input part 5, the second pole is connected with output terminal 4.Drop-down module 2 is drop-down for the signal exported by the output terminal 4 of shift register at the corresponding levels, and it comprises pull-down transistor 20, and the first pole of described pull-down transistor 20 is connected with described pulldown signal input end 6, and the second pole is connected with output terminal 4.One-level control module 3 ＇ and Two-stage control module 3 〞 is for the break-make of pull up transistor described in controlling 10 and pull-down transistor 20; Wherein, one-level control module 3 ＇ comprises start signal module 3c ＇, the first electric capacity C
s0and with the first electric capacity C
s0one-level first submodule 3a ＇, one-level second submodule 3b ＇ in parallel; Two-stage control module 3 〞 comprises secondary first submodule 3a 〞 and secondary second submodule 3b 〞; One-level first submodule 3a ＇, one-level second submodule 3b ＇ with pull up transistor 10 grid be connected, for control to pull up transistor 10 break-make, simultaneously, one-level first submodule 3a ＇, one-level second submodule 3b ＇ are also connected with secondary first submodule 3a 〞, for controlling the break-make of each transistor in secondary first submodule 3a 〞; Secondary first submodule 3a 〞 is connected with the grid of pull-down transistor 20, opens for controlling pull-down transistor 20, and secondary second submodule 3b 〞 is connected with the grid of pull-down transistor 20, closes for controlling pull-down transistor 20.Particularly, start signal module 3c ＇ comprises signal control transistor 30; One-level first submodule 3a ＇ comprises the first transistor 31, transistor seconds 32, third transistor 33 and the second electric capacity C
s1; One-level second submodule 3b ＇ comprises the 4th transistor 34; Secondary first submodule 3a 〞 comprises the 5th transistor 35 and the 6th transistor 36; Secondary second submodule 3b 〞 comprises the 7th transistor 37 and the 3rd electric capacity C
s2; The annexation of above-mentioned each transistor as shown in Figure 1.
Below for transistor each in light emitting control shift register and thin film transistor (TFT) for P type, composition graphs 2, illustrates the principle of work of light emitting control shift register.Particularly, at first stage a, the start signal introduced from start signal input end 8 is positioned at low level, the first clock signal introduced from the first clock signal input terminal 7 is positioned at low level, the second clock signal introduced from second clock signal input part 9 is positioned at high level, one-level second submodule 3b ＇ is made to control to pull up transistor 10, in secondary first submodule 3a 〞, each transistor is closed, secondary second submodule 3b 〞 controls pull-down transistor 20 and opens, thus drop-down module 2 is by drop-down for the signal of light emitting control shift register output, namely output terminal 4 exports start signal.At subordinate phase b, start signal becomes high level, first clock signal becomes high level, second clock signal becomes low level, make that one-level second submodule 3b ＇ controls to pull up transistor 10, each transistor is opened in secondary first submodule 3a 〞, further, secondary first submodule 3a 〞 controls pull-down transistor 20 and closes, thus pull-up module 1 is by the signal pull-up of light emitting control shift register output, namely output terminal 4 exports shutdown signal.At phase III c, start signal maintains high level, first clock signal becomes low level, second clock signal becomes high level, make that one-level first submodule 3a ＇ controls to pull up transistor 10, each transistor is closed in secondary first submodule 3a 〞, secondary second submodule 3b 〞 controls pull-down transistor 20 and opens, thus drop-down module 2 is by drop-down for the signal of light emitting control shift register output, and namely output terminal 4 exports start signal.At fourth stage d, start signal maintains high level, first clock signal becomes high level, second clock signal becomes low level, make that one-level first submodule 3a ＇ controls to pull up transistor 10, each transistor is closed in secondary first submodule 3a 〞, secondary second submodule 3b 〞 controls pull-down transistor 20 and opens, thus drop-down module 2 is by drop-down for the signal of light emitting control shift register output, and namely output terminal 4 exports start signal.In each stage afterwards, constantly repeat above-mentioned phase III c and fourth stage d, make the signal exported by output terminal 4 be start signal.
In above-mentioned light emitting control shift register, it is made only to export shutdown signal a pulse by more transistor (amounting to 10), and export start signal in other periods, light emitting control shift register is so just made to need to take larger space, i.e. border width, thus be unfavorable for the narrow frame realizing display device.
Utility model content
The utility model is intended at least to solve one of technical matters existed in prior art, propose a kind of shift register, gate driver circuit and display device, described shift register can reduce the quantity of the transistor that it comprises, make the space that it takies, namely border width reduces, thus contributes to the narrow frame realizing display device.
A kind of shift register is provided for realizing the purpose of this utility model, comprise pull-up module, drop-down module and control module, described pull-up module is used for the signal pull-up exported by the output terminal of shift register at the corresponding levels, it comprises and pulling up transistor, the described grid pulled up transistor is connected with described control module, first pole is connected with pull-up signal input part, and the second pole is connected with described output terminal; The break-make of described control module for pulling up transistor described in controlling; The signal that described drop-down module is used for the output terminal of shift register at the corresponding levels to export is drop-down, and it comprises pull-down transistor, and grid, first pole of described pull-down transistor are connected with described pulldown signal input end, and the second pole is connected with described output terminal.
Wherein, described control module comprises start signal module, the first electric capacity and the first control module, the second control module with described first Capacitance parallel connection; Described start signal module is used for providing start signal to the first electric capacity, the first control module, the second control module, the first end of described first electric capacity and start signal model calling, and the second end is connected with the described grid pulled up transistor; The break-make pulled up transistor described in the first clock signal that described first control module is used for inputting according to described start signal and the first clock signal input terminal controls; The break-make pulled up transistor described in the second clock signal that described second control module is used for inputting according to described start signal and second clock signal input part controls.
Wherein, described start signal module comprises signal and controls transistor, the grid that described signal controls transistor is connected with described first clock signal input terminal, first pole is connected with described start signal input end, and the first end of the second pole and described first electric capacity, the first control module and the second control module are connected.
Wherein, described first control module comprises the first transistor, transistor seconds and third transistor; Grid, first pole of described the first transistor are connected with described first clock signal input terminal, and the second pole is connected with the second pole of described transistor seconds and the grid of described third transistor; The second pole that grid and the described signal of described transistor seconds control transistor is connected, and the first pole is connected with described pull-up signal input part, and the second pole is also connected with the grid of described third transistor; The grid of described third transistor is also connected with one end of the second electric capacity, the other end of described second electric capacity is connected with pull-up signal input part, first pole of described third transistor is connected with described pull-up signal input part, and the grid that the second pole pulls up transistor with described, the second end of the first electric capacity are connected.
Wherein, described second control module comprises the 4th transistor, described 4th transistor grid controls the second pole of transistor with described signal, the first end of the first electric capacity is connected, first pole is connected with described second clock signal input part, and the grid that the second pole pulls up transistor with described, the second end of the first electric capacity are connected.
As another technical scheme, the utility model also provides a kind of gate driver circuit, comprises multi-stage shift register, the above-mentioned shift register that described shift register adopts the utility model to provide.
As another technical scheme, the utility model also provides a kind of display device, comprises grid and gate driver circuit, the above-mentioned gate driver circuit that described gate driver circuit adopts the utility model to provide.
The utility model has following beneficial effect:
The shift register that the utility model provides, the grid of its pull-down transistor is connected with pulldown signal input end, namely, the opening and closing of pull-down transistor is directly controlled by pulldown signal, thus without the need to arranging separately extra transistor for controlling the unlatching of pull-down transistor, and without the need to arranging separately the closedown of extra transistor controls pull-down transistor, compared to existing technology, the shift register that the utility model provides decreases the quantity of transistor, thus the space that takies required for shift register can be reduced, contribute to the narrow frame realizing display device.
The gate driver circuit that the utility model provides, its above-mentioned shift register adopting the utility model to provide, without the need to arranging separately extra transistor for controlling the unlatching of pull-down transistor, and without the need to arranging separately the closedown of extra transistor controls pull-down transistor, compared to existing technology, decrease the quantity of transistor, thus the space that takies required for shift register and gate driver circuit can be reduced, contribute to the narrow frame realizing display device.
The display device that the utility model provides, its above-mentioned gate driver circuit adopting the utility model to provide, can reduce the space taken required for gate driver circuit, contributes to the narrow frame realizing display device.
Accompanying drawing explanation
Accompanying drawing is used to provide further understanding of the present utility model, and forms a part for instructions, is used from explanation the utility model, but does not form restriction of the present utility model with embodiment one below.In the accompanying drawings:
Fig. 1 is the circuit diagram of existing light emitting control shift register;
Fig. 2 is the sequential chart of each signal in light emitting control shift register when each transistor and thin film transistor (TFT) are P type in light emitting control shift register;
The circuit diagram of the preferred implementation of the shift register that Fig. 3 provides for the utility model;
Fig. 4 is the sequential chart of each signal in shift register when each transistor and thin film transistor (TFT) are P type in shift register.
Wherein, Reference numeral:
1: pull-up module; 2: drop-down module; 3: control module; 3a: the first control module; 3b: the second control module; 3c: start signal module; 3 ＇: one-level control module; 3 〞: Two-stage control module; 3c ＇: start signal module; 3a ＇: one-level first submodule; 3b ＇: one-level second submodule; 3a 〞: secondary first submodule; 3b 〞: secondary second submodule; 4: output terminal; 5: pull-up signal input part; 6: pulldown signal input end; 7: the first clock signal input terminals; 8: start signal input end; 9: second clock signal input part; 10: pull up transistor; 20: pull-down transistor; 30: signal controls transistor; 31: the first transistor; 32: transistor seconds; 33: third transistor; 34: the four transistors; 35: the five transistors; 36: the six transistors; 37: the seven transistors; C
s0: the first electric capacity; C
s1: the second electric capacity; C
s2: the 3rd electric capacity.
Embodiment
Below in conjunction with accompanying drawing, embodiment of the present utility model is described in detail.Should be understood that, embodiment described herein, only for instruction and explanation of the utility model, is not limited to the utility model.
Please refer to Fig. 3, the circuit diagram of the preferred implementation of the shift register that Fig. 3 provides for the utility model.In the present embodiment, shift register comprises pull-up module 1, drop-down module 2 and control module 3, wherein, the signal pull-up of described pull-up module 1 for the output terminal 4 of shift register at the corresponding levels is exported, it comprises and pulls up transistor 10, described pull up transistor 10 grid be connected with described control module 3, the first pole is connected with pull-up signal input part 5, and the second pole is connected with described output terminal 4; Described control module 3 for pull up transistor described in controlling 10 break-make; Described drop-down module 2 is drop-down for the signal exported by the output terminal 4 of shift register at the corresponding levels, and it comprises pull-down transistor 20, and grid, first pole of described pull-down transistor 20 are connected with described pulldown signal input end 6, and the second pole is connected with described output terminal 4.In the present embodiment, the first pole is source electrode, and the second pole is drain electrode, or the first pole is drain electrode, and the second pole is source electrode.
In the present embodiment, the grid of pull-down transistor 20 is connected with pulldown signal input end 6, namely, the opening and closing of pull-down transistor 20 is directly controlled by pulldown signal, thus without the need to arranging separately extra transistor for controlling the unlatching of pull-down transistor 20, and without the need to arranging separately the closedown of extra transistor controls pull-down transistor 20, compared to existing technology, shift register in present embodiment decreases the quantity of transistor, thus the space that takies required for shift register can be reduced, contribute to the narrow frame realizing display device.
Described control module 3 comprises start signal module 3c, the first electric capacity C
s0and with described first electric capacity C
s0first control module 3a, the second control module 3b in parallel; Described start signal module 3c is used for the first electric capacity C
s0, the first control module 3a, the second control module 3b provide start signal, described first electric capacity C
s0first end be connected with start signal module 3c, the second end with described pull up transistor 10 grid be connected; Described first control module 3a be used for according to described start signal and the first clock signal input terminal 7 input first clock signal control described in pull up transistor 10 break-make; Pull up transistor described in the second clock signal that described second control module 3b is used for inputting according to described start signal and second clock signal input part 9 controls 10 break-make.
Start signal module 3c comprises signal and controls transistor 30, and the grid that described signal controls transistor 30 is connected with described first clock signal input terminal 7, and the first pole is connected with described start signal input end 8, the second pole and described first electric capacity C
s0first end, the first control module 3a be connected with the second control module 3b.
Described first control module 3a comprises the first transistor 31, transistor seconds 32 and third transistor 33; Grid, first pole of described the first transistor 31 are connected with described first clock signal input terminal 7, and the second pole is connected with the second pole of described transistor seconds 32 and the grid of described third transistor 33; The second pole that grid and the described signal of described transistor seconds 32 control transistor 30 is connected, and the first pole is connected with described pull-up signal input part 5, and the second pole is also connected with the grid of described third transistor 33; The grid of described third transistor 33 also with the second electric capacity C
s1one end connect, described second electric capacity C
s1the other end be connected with pull-up signal input part 5, the first pole of described third transistor 33 is connected with described pull-up signal input part 5, the second pole and described pull up transistor 10 grid, the first electric capacity C
s0second end connect.
Second control module 3b comprises the 4th transistor 34, and the grid of described 4th transistor 34 and described signal control the second pole, the first electric capacity C of transistor 30
s0first end connect, the first pole is connected with described second clock signal input part 9, the second pole and described pull up transistor 10 grid, the first electric capacity C
s0second end connect.
Below for transistor each in shift register and thin film transistor (TFT) for P type, composition graphs 4, illustrates the principle of work of shift register.Particularly, as shown in Figure 3 and Figure 4, at first stage a, the start signal introduced from start signal input end 8 is positioned at low level, the first clock signal introduced from the first clock signal input terminal 7 is positioned at low level, the second clock signal introduced from second clock signal input part 9 is positioned at high level, and in the case, signal controls transistor 30, the first transistor 31 is opened; Start signal is to the first electric capacity C
s0charging, and is input to the grid of transistor seconds 32, the 4th transistor 34, makes transistor seconds 32, the 4th transistor 34 opens; The unlatching of transistor seconds 32, makes pull-up signal through the first pole of transistor seconds 32, grid that the second pole is input to third transistor 33, and third transistor 33 is closed; The unlatching of the 4th transistor 34, makes second clock signal be input to pull up transistor the grid of 10, makes 10 closedowns that pull up transistor; Pulldown signal is input to the grid of pull-down transistor 20, and pull-down transistor 20 is opened, thus drop-down module 2 is by drop-down for the signal of shift register output, and namely output terminal 4 exports start signal.
At subordinate phase b, start signal becomes high level, and the first clock signal becomes high level, and second clock signal becomes low level, and in the case, signal controls transistor 30, the first transistor 31 is closed, and the first electric capacity C
s0the start signal of the first stage a kept is input to the grid of transistor seconds 32 and the 4th transistor 34, and transistor seconds 32 and the 4th transistor 34 are opened; The unlatching of transistor seconds 32, makes pull-up signal through the first pole of transistor seconds 32, grid and the second electric capacity C that the second pole is input to third transistor 33
s1first end, thus third transistor 33 is closed, and to the second electric capacity C
s1charging; 4th transistor 34 is opened, make second clock signal through the first pole of the 4th transistor 34, the second pole be input to pull up transistor 10 grid, make 10 unlatchings that pull up transistor; In this process, pulldown signal is input to the grid of pull-down transistor 20, pull-down transistor 20 is still opened, but 10 to open owing to pulling up transistor, the voltage of pull-up signal is higher than the voltage of pulldown signal, finally, pull-up module 1 is by the signal pull-up of shift register output, and namely output terminal 4 exports shutdown signal.
At phase III c, start signal maintains high level, and the first clock signal becomes low level, and second clock signal becomes high level, and in the case, signal controls transistor 30, the first transistor 31 is opened, and start signal is to the first electric capacity C
s0charging, and is input to the grid of transistor seconds 32, the 4th transistor 34, makes transistor seconds 32, the 4th transistor 34 closes; The unlatching of the first transistor 31, makes the first clock signal through the first pole of the first transistor 31, grid that the second pole is input to third transistor 33, and third transistor 33 is opened; The unlatching of third transistor 33, make pull-up signal through the first pole of third transistor 33, the second pole be input to pull up transistor 10 grid, make 10 closedowns that pull up transistor; Meanwhile, pull-up signal is also to the second electric capacity C
s1charging; Pulldown signal is input to the grid of pull-down transistor 20, and pull-down transistor 20 is opened, thus drop-down module 2 is by drop-down for the signal of shift register output, and namely output terminal 4 exports start signal.
At fourth stage d, start signal maintains high level, and the first clock signal becomes high level, and second clock signal becomes low level, and in the case, signal controls transistor 30, the first transistor 31 is closed, and the first electric capacity C
s0the start signal of the first stage a kept is input to the grid of transistor seconds 32 and the 4th transistor 34, and transistor seconds 32 and the 4th transistor 34 are closed; Second electric capacity C
s1the pull-up signal of the phase III c kept is input to the grid of third transistor 33, and third transistor 33 is opened; Similar with above-mentioned phase III c, pull-up signal through the first pole of third transistor 33, the second pole be input to pull up transistor 10 grid, make 10 closedowns that pull up transistor; Pulldown signal is input to the grid of pull-down transistor 20, and pull-down transistor 20 is opened, thus drop-down module 2 is by drop-down for the signal of shift register output, and namely output terminal 4 exports start signal.In each stage afterwards, constantly repeat above-mentioned phase III c and fourth stage d, make the signal exported by output terminal 4 be start signal.
Above-mentioned for transistor each in shift register and thin film transistor (TFT) for P type describes the principle of work of shift register, but each transistor and thin film transistor (TFT) are not limited to P type in shift register, such as, in shift register, each transistor and thin film transistor (TFT) can also be N-type, in the case, by controlling start signal, the sequential of the first clock signal and second clock signal, make to pull up transistor 10 only a pulse closedown, and be held open in remaining period, thus make shift register only export shutdown signal a pulse, and start signal is exported within all the other periods.
In sum, the shift register that the utility model provides, the grid of its pull-down transistor 20 is connected with pulldown signal input end 6, namely, the opening and closing of pull-down transistor 20 is directly controlled by pulldown signal, thus without the need to arranging separately extra transistor for controlling the unlatching of pull-down transistor 20, and without the need to arranging separately the closedown of extra transistor controls pull-down transistor 20, compared to existing technology, the shift register that the utility model provides decreases the quantity of transistor, thus the space that takies required for shift register can be reduced, contribute to the narrow frame realizing display device.
As another technical scheme, the utility model also provides a kind of gate driver circuit, comprises multi-stage shift register, the above-mentioned shift register that described shift register the utility model provides.
The gate driver circuit that the utility model provides, its above-mentioned shift register adopting the utility model to provide, without the need to arranging separately extra transistor for controlling the unlatching of pull-down transistor, and without the need to arranging separately the closedown of extra transistor controls pull-down transistor, compared to existing technology, decrease the quantity of transistor, thus the space that takies required for shift register and gate driver circuit can be reduced, contribute to the narrow frame realizing display device.
As another technical scheme, the utility model also provides a kind of display device, comprises grid and gate driver circuit, the above-mentioned gate driver circuit that described gate driver circuit adopts the utility model to provide.
Particularly, described display device is OLED display.
The display device that the utility model provides, its above-mentioned gate driver circuit adopting the utility model to provide, can reduce the space taken required for gate driver circuit, contributes to the narrow frame realizing display device.
Be understandable that, the illustrative embodiments that above embodiment is only used to principle of the present utility model is described and adopts, but the utility model is not limited thereto.For those skilled in the art, when not departing from spirit of the present utility model and essence, can make various modification and improvement, these modification and improvement are also considered as protection domain of the present utility model.
Claims (7)
1. a shift register, comprise pull-up module, drop-down module and control module, it is characterized in that, described pull-up module is used for the signal pull-up exported by the output terminal of shift register at the corresponding levels, it comprises and pulling up transistor, the described grid pulled up transistor is connected with described control module, and the first pole is connected with pull-up signal input part, and the second pole is connected with described output terminal;
The break-make of described control module for pulling up transistor described in controlling;
The signal that described drop-down module is used for the output terminal of shift register at the corresponding levels to export is drop-down, and it comprises pull-down transistor, and grid, first pole of described pull-down transistor are connected with pulldown signal input end, and the second pole is connected with described output terminal.
2. shift register according to claim 1, is characterized in that, described control module comprises start signal module, the first electric capacity and the first control module, the second control module with described first Capacitance parallel connection;
Described start signal module is used for providing start signal to the first electric capacity, the first control module, the second control module;
The first end of described first electric capacity and start signal model calling, the second end is connected with the described grid pulled up transistor;
The break-make pulled up transistor described in the first clock signal that described first control module is used for inputting according to described start signal and the first clock signal input terminal controls;
The break-make pulled up transistor described in the second clock signal that described second control module is used for inputting according to described start signal and second clock signal input part controls.
3. shift register according to claim 2, it is characterized in that, described start signal module comprises signal and controls transistor, the grid that described signal controls transistor is connected with described first clock signal input terminal, first pole is connected with described start signal input end, and the first end of the second pole and described first electric capacity, the first control module and the second control module are connected.
4. shift register according to claim 3, is characterized in that, described first control module comprises the first transistor, transistor seconds and third transistor;
Grid, first pole of described the first transistor are connected with described first clock signal input terminal, and the second pole is connected with the second pole of described transistor seconds and the grid of described third transistor;
The second pole that grid and the described signal of described transistor seconds control transistor is connected, and the first pole is connected with described pull-up signal input part, and the second pole is connected with the grid of described third transistor;
The grid of described third transistor is also connected with one end of the second electric capacity, the other end of described second electric capacity is connected with pull-up signal input part, first pole of described third transistor is connected with described pull-up signal input part, and the grid that the second pole pulls up transistor with described, the second end of the first electric capacity are connected.
5. shift register according to claim 4, it is characterized in that, described second control module comprises the 4th transistor, described 4th transistor grid controls the second pole of transistor with described signal, the first end of the first electric capacity is connected, first pole is connected with described second clock signal input part, and the grid that the second pole pulls up transistor with described, the second end of the first electric capacity are connected.
6. a gate driver circuit, comprises multi-stage shift register, it is characterized in that, described shift register adopts the shift register described in Claims 1 to 5 any one.
7. a display device, comprises grid and gate driver circuit, it is characterized in that, described gate driver circuit adopts gate driver circuit according to claim 6.
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| CN201420697282.0U CN204178680U (en) | 2014-11-19 | 2014-11-19 | A kind of shift register, gate driver circuit and display device |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104361860A (en) * | 2014-11-19 | 2015-02-18 | 京东方科技集团股份有限公司 | Shift register, gate drive circuit and display device |
| JP2019517008A (en) * | 2016-05-13 | 2019-06-20 | 京東方科技集團股▲ふん▼有限公司Ｂｏｅ Ｔｅｃｈｎｏｌｏｇｙ Ｇｒｏｕｐ Ｃｏ．，Ｌｔｄ． | Shift register unit, array substrate, display panel, display device, and driving method of shift register unit |
-
2014
- 2014-11-19 CN CN201420697282.0U patent/CN204178680U/en active Active
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104361860A (en) * | 2014-11-19 | 2015-02-18 | 京东方科技集团股份有限公司 | Shift register, gate drive circuit and display device |
| WO2016078264A1 (en) * | 2014-11-19 | 2016-05-26 | 京东方科技集团股份有限公司 | Shift register unit, shift register, grid driving circuit and display device |
| CN104361860B (en) * | 2014-11-19 | 2017-02-22 | 京东方科技集团股份有限公司 | Shift register, gate drive circuit and display device |
| KR101746634B1 (en) | 2014-11-19 | 2017-06-27 | 보에 테크놀로지 그룹 컴퍼니 리미티드 | Shift register unit, shift register, gate drive circuit and display device |
| JP2019517008A (en) * | 2016-05-13 | 2019-06-20 | 京東方科技集團股▲ふん▼有限公司Ｂｏｅ Ｔｅｃｈｎｏｌｏｇｙ Ｇｒｏｕｐ Ｃｏ．，Ｌｔｄ． | Shift register unit, array substrate, display panel, display device, and driving method of shift register unit |
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