CN204168323U - A kind of full SDN switch able to programme - Google Patents
A kind of full SDN switch able to programme Download PDFInfo
- Publication number
- CN204168323U CN204168323U CN201420703213.6U CN201420703213U CN204168323U CN 204168323 U CN204168323 U CN 204168323U CN 201420703213 U CN201420703213 U CN 201420703213U CN 204168323 U CN204168323 U CN 204168323U
- Authority
- CN
- China
- Prior art keywords
- processor
- programmable logic
- logic cells
- module
- sdn switch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 230000015654 memory Effects 0.000 claims description 17
- 230000003068 static effect Effects 0.000 claims description 10
- 230000006855 networking Effects 0.000 claims description 6
- 230000010354 integration Effects 0.000 claims description 4
- 238000012545 processing Methods 0.000 abstract description 2
- 238000007726 management method Methods 0.000 description 9
- 101100283411 Arabidopsis thaliana GMII gene Proteins 0.000 description 4
- 238000004891 communication Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 230000006870 function Effects 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 230000006978 adaptation Effects 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 238000011160 research Methods 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 238000013440 design planning Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000003032 molecular docking Methods 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 238000012163 sequencing technique Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
Landscapes
- Data Exchanges In Wide-Area Networks (AREA)
Abstract
A kind of full SDN switch able to programme.It with programmable logic cells and processor for core, be equipped with high speed network interfaces, data channel processing hardware is realized entirely able to programme, for building and studying high-performance, the middle-size and small-size conventional network system of low-power consumption, SDN/OpenFlow switch system with programmable logic cells.
Description
Technical field:
The utility model relates to the communications field, in particular to a kind of switch.
Background technology:
Software defined network SDN is current network research focus, and its core is that datum plane is separated with control plane, and control plane is abstract, with upper layer software (applications) unified operation, provides great flexibility to network design planning with management.At present, Openflow is most popular a kind of SDN agreement, has become the de facto standard of SDN.By OPENFLOW agreement, the controller beyond the network switching equipment can be programmed to rule of conduct such as the Packet forwarding of the network switching equipment and manage, and making controller carry out centralized control and management to the operation of switching equipment in whole network becomes possibility.Support that the switch of Openflow has now successively to appear on the market on a small quantity, but in the switch of the OPENFLOW announced, the scheme of data channel is software process or limited custom asic, handling property is lower or User Defined degree is not high, not yet can not support SDN datum plane with the form of full programmable hardware comprehensively.
Utility model content:
The utility model provides a kind of complete open switch able to programme, there is programmable logic device and the processor interconnecting interface of two-forty, and be equipped with express network port, meet express network research and commercial demand, and, the form of programmable hardware entirely can realize SDN data path.
SDN switch of the present utility model comprises with lower part: processor, programmable logic cells; The management channels network interface be connected with processor, memory card module, user's USB module, USB serial port module; The two groups of memories be connected with programmable logic cells with processor respectively; The storage be connected with programmable logic cells and wireless module, network interface; Mother daughter board connector is connected with processor and programmable logic cells homogeneous phase; And in the power management module that each part mentioned above is connected; It is characterized in that: processor and programmable logic cells are independently discrete devices, interconnected by cabling; Or both merge into single chip, chip internal integration processor and programmable logic cells, interconnected by the bus on chip of high bandwidth between the two.
Preferably, described management channels network interface is supplied to switch correspondence with foreign country path.
Preferably, described memory card module storage system file, system version and user data.
Preferably, processor is connected other external USB equipment by described user's USB module.
Preferably, processor is even connect other serial equipments by described USB serial port module.
Preferably, described two groups of memories all comprise static processor and dynamic processor.
Preferably, described storage and wireless module are received and dispatched mouth with the serial of programmable logic cells and are connected, and programmable logic cells is connected with other memory devices and/or wireless module by storage and wireless module.
Preferably, described network interface comprises 10,000,000,000 network interfaces and gigabit networking interface, and programmable logic cells is connected with Ethernet or wide area network by 10,000,000,000 network interfaces, is connected with electric mouth or light mouth network by gigabit networking interface.
Preferably, SDN switch is expanded subcard with outside be connected by described mother daughter board connector.
Accompanying drawing illustrates:
Fig. 1 is hardware system block diagram of the present utility model.
Fig. 2 be the utility model realize SDN switch sheet on hardware logic block diagram.
Embodiment:
As shown in Figure 1, hardware system of the present utility model comprises with lower part:
Core is processor and programmable logic cells (FPGA), this part can be processor and programmable logic cells independently discrete device, interconnected by high-speed interface plate upward wiring on the same plate, also can be single chip, chip internal integration processor and programmable logic cells, interconnected by the bus on chip of high bandwidth therebetween.When realizing with discrete device, but processor ARM, the frameworks such as X86, MIPS, POWERPC (PPC), programmable logic cells can be field programmable gate array (FPGA); When realizing with integral chip, can be the integrated chip (ASIC) of integration processor and programmable logic cells, also can be utilize soft core to build the FPGA of processor with logical resource.Processor and programmable logic cells, dynamically/static memory, management channels gigabit network interface, storage card, user USB, USB serial ports; Programmable logic cells and processor, high speed plate are interconnected, massive store/wireless module, data channel, dynamically/static memory are connected.
Management channels network interface, comprises the fast self adaptation RJ45 electricity mouth of several 1000M/100M/10M tri-or optical network interface, by GMII/RGMII/SGMII connection handling device, is supplied to the correspondence with foreign country path that system one is different from data channel network.This interface & processor is connected.
Memory card module, provides the draw-in grooves such as SD, TF, memory stick, by SDIO processor of interface connection, the storage card of suitable capacity can be selected as required to assemble, can back-up system storage of versions and storage of subscriber data.Memory card module is connected with processor.
User's USB module, comprise a USB OTG interface, connect other external USB equipment for the treatment of device, principal and subordinate all can.User's USB module is connected with processor.
USB serial port module, for processor debugging UART serial ports, for convenience of using, veneer transfers USB interface to through conversion chip, also available standards UART interface coordinates discrete USB serial converter to realize herein, also directly serial ports can be connected the equipment of another band UART serial ports.USB serial port module is connected with processor.
Dynamically/static memory, processor and programmable logic cells are all outer hangs with dynamically/static memory, and wherein dynamic processor is running memory, static processor storage system version and user data.Dynamic processor is containing SDRAM, DDRSDRAM, RLDRAM, and static memory is containing FLASH, EMMC, EEPROM, SRAM, QDR etc., and wherein highspeed static memory QDR also can be for data processing buffer memory.Dynamically/static memory module is two groups, is connected respectively with processor with programmable logic cells.
Massive store/wireless module, comprises a Mini PCIe draw-in groove, accessible WIFI module, connects programmable logic cells high speed serialization transmitting-receiving mouth.Also can be used for the access realizing mass-memory unit, as disk, solid state hard disc etc.Massive store/wireless is connected with programmable logic cells.
High speed mother daughter board connector, self-defined some power supplys, clock, speed/low speed single end signal 0 line, high-speed differential signal line etc., access processor and programmable logic cells, can expand subcard according to user's actual need.High speed mother daughter board connector is connected with processor, programmable logic cells.
Data channel 10,000,000,000 network interface, comprises several SFP+ or XFP interfaces, and to provide 10Gbps Ethernet or wide area network access, the high speed serialization of the direct-connected programmable logic cells of interface is received and dispatched mouth or passed through 10Gbps physical chip switching programmable logic cells.Data channel 10,000,000,000 network interface is connected with programmable logic cells.
Data channel gigabit networking interface, comprises the fast self adaptation RJ45 electricity mouth of several 1000M/100M/10M tri-or optical network interface, by physical chip PHY through communication dedicated bus (GMII, RGMII, SGMII, QSGMII etc.) access programmable logic cells, network communication path is provided.Wherein physical chip PHY can provide multiple senior complementary network function, comprises synchronous ethernet, IEEE 1588 agreement support etc.Data channel gigabit networking interface is connected with programmable logic cells.
Power management module, provides power-on and power-off sequencing control, the functions such as voltage is monitored in real time, power monitoring.
Preferably, Fig. 2 is shown in by the system hardware block diagram of programmable logic cells, and concrete structure is as follows:
Network Interface Module, the interface driver built in programmable logic cells, for docking external network side PHY chip.Its external interface form can be MII, GMII, SGMII, RGMII and 1000BaseX etc.Network interface is connected with three fast ethernet modules.
Three fast ethernet module AXI_ETH are three speed (10/100/1000Mb/s) MAC (medium access control), support the Network Interface Modules such as MII, GMII, SGMII, RGMII and 1000BaseX.In this MAC module, construct MDIO interface, be used for connecting PHY, register on management PHY, configure PHY function, check state, process and interrupt; Connect top level control system by AXI4-Lite bus, AXI4-Lite slave interface provides the read and write control data of non-burst mode transmission.Transmitting and receive data, is by AXI4-Stream interface.The network service bag received is sent into SDN Openflow primary module by internal bus by AXI_ETH, sends to corresponding MAC after treatment send to network by SDN Openflow primary module.Three fast ethernet modules are connected with Network Interface Module, software defined network SDN Openflow primary module.
Openflow_switch_core is SDN Openflow switch primary module, design follow openflow agreement, data come in after through arbitration, Packet analyzing, according to action process, then by the MAC of corresponding ports, network in transmission.SDN Openflow switch primary module is connected with three fast ethernet modules, dma module.
Dma module, direct memory access (Direct Memory Access, DMA) allows inner hardware subsystem direct read/write system storage independently, and does not need the processor that detours.In the present system, SDN Openflow module and processor all can directly access this module, to realize the action such as buffer memory, exchange to network packet.Dma module is connected with advanced extensive interface AXI.
Processor module, for configuring, inquiring about, manage each module, and the handling process specified for Openflow agreement provides the supports such as control, parsing, instruction.Processor can be the frameworks such as ARM, X86, MIPS, POWERPC (PPC).Processor module is connected with advanced extensive interface AXI.
Advanced extensive interface AXI Interconnect module.AXI (Advanced eXtensible Interface) is a kind of bus protocol, this agreement is most important part in AMBA (Advanced Microcontroller BusArchitecture) 3.0 agreements of ARM company proposition, is a kind of bus on chip towards high-performance, high bandwidth, low delay.One or more AXI memory-mapped main equipment can be connected to one or more AXImemory-mapped from equipment by it, and the AXI agreement of support has AXI3, AXI4, and AXI4-Lite.In our system, with this module done AXI_ETHERNET, SDN Openflow primary module, processor, DMA interconnected.In processor and the discrete design of programmable logic cells, this function can be substituted by bus between high-speed chip.Advanced extensive interface AXI module is connected with three fast ethernet modules, SDN Openflow primary module, processor, DMA.
Claims (9)
1. a SDN switch, comprises with lower part: processor, programmable logic cells; The management channels network interface be connected with processor, memory card module, user's USB module, USB serial port module; The two groups of memories be connected with programmable logic cells with processor respectively; The storage be connected with programmable logic cells and wireless module, network interface; Mother daughter board connector is connected with processor and programmable logic cells homogeneous phase; And in the power management module that each part mentioned above is connected; It is characterized in that: processor and programmable logic cells are independently discrete devices, interconnected by cabling; Or both merge into single chip, chip internal integration processor and programmable logic cells, interconnected by the bus on chip of high bandwidth between the two.
2. SDN switch according to claim 1, is characterized in that: described management channels network interface is supplied to switch correspondence with foreign country path.
3. SDN switch according to claim 1, is characterized in that: described memory card module storage system file, system version and user data.
4. SDN switch according to claim 1, is characterized in that: processor is connected other external USB equipment by described user's USB module.
5. SDN switch according to claim 1, is characterized in that: processor is even connect other serial equipments by described USB serial port module.
6. SDN switch according to claim 1, is characterized in that: described two groups of memories all comprise static processor and dynamic processor.
7. SDN switch according to claim 1, is characterized in that: described storage and wireless module are received and dispatched mouth with the serial of programmable logic cells and be connected, and programmable logic cells is connected with other memory devices and/or wireless module by storage and wireless module.
8. SDN switch according to claim 1, it is characterized in that: described network interface comprises 10,000,000,000 network interfaces and gigabit networking interface, programmable logic cells is connected with Ethernet or wide area network by 10,000,000,000 network interfaces, is connected with electric mouth or light mouth network by gigabit networking interface.
9. SDN switch according to claim 1, is characterized in that: SDN switch is expanded subcard by described mother daughter board connector with outside and is connected.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201420703213.6U CN204168323U (en) | 2014-11-20 | 2014-11-20 | A kind of full SDN switch able to programme |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201420703213.6U CN204168323U (en) | 2014-11-20 | 2014-11-20 | A kind of full SDN switch able to programme |
Publications (1)
Publication Number | Publication Date |
---|---|
CN204168323U true CN204168323U (en) | 2015-02-18 |
Family
ID=52541971
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201420703213.6U Expired - Fee Related CN204168323U (en) | 2014-11-20 | 2014-11-20 | A kind of full SDN switch able to programme |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN204168323U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2017031920A1 (en) * | 2015-08-26 | 2017-03-02 | 浪潮集团有限公司 | Hybrid sdn switch utilizing dynamic migration technology |
-
2014
- 2014-11-20 CN CN201420703213.6U patent/CN204168323U/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2017031920A1 (en) * | 2015-08-26 | 2017-03-02 | 浪潮集团有限公司 | Hybrid sdn switch utilizing dynamic migration technology |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN105335327B (en) | Restructural based on Soc/dual redundant VPX3U signal transacting support plates | |
CN204392269U (en) | A kind of full SDN High_speed NIC able to programme | |
CN112395233A (en) | Software definition switching system and method based on CPU and SDI chip | |
CN102170430A (en) | Multi-port multi-network protocol converter | |
CN202535384U (en) | Network equipment expansion connection and virtual machine interconnection optimization system based on PCIe bus | |
CN100574200C (en) | Smart Ethernet card with hardware acceleration | |
CN103970704A (en) | A hardware system of optical fiber bus based on RapidIO protocol | |
CN105281433A (en) | Distribution terminal communication system | |
CN101650548A (en) | Time setting device for digital substation | |
CN103257946A (en) | High-speed interconnecting method of controllers of tight-coupling multi-control storage system | |
CN103106173A (en) | Interconnection method among cores of multi-core processor | |
CN105099776A (en) | Cloud server management system | |
CN113489594A (en) | PCIE real-time network card based on FPGA module | |
CN213958045U (en) | SoC reconstruction primary and secondary verification board with extensible functional interface | |
CN109783413A (en) | Master control borad and control method based on VPX standard | |
CN205304857U (en) | 10, 000, 000, 000 light network switch | |
CN106095724A (en) | A kind of information processing board system based on MPC8640D | |
CN103067201A (en) | Multi-protocol communication manager | |
CN108156099A (en) | Srio switching system | |
CN205305048U (en) | Giga light network switch | |
CN204168323U (en) | A kind of full SDN switch able to programme | |
CN104679714A (en) | Supercomputer cluster based on ATCA (advanced telecom computing architecture) | |
WO2024183416A1 (en) | Out-of-band ethernet interface switching apparatus, multi-node server system and server device | |
CN104615201A (en) | Centralized management storage system architecture | |
CN107980223A (en) | Ethernet interconnection circuit and device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150218 Termination date: 20211120 |
|
CF01 | Termination of patent right due to non-payment of annual fee |