CN204102883U - Multi-chip stacking is just being equipped with the flat pin metal framework structure of base island combined type - Google Patents
Multi-chip stacking is just being equipped with the flat pin metal framework structure of base island combined type Download PDFInfo
- Publication number
- CN204102883U CN204102883U CN201320787692.XU CN201320787692U CN204102883U CN 204102883 U CN204102883 U CN 204102883U CN 201320787692 U CN201320787692 U CN 201320787692U CN 204102883 U CN204102883 U CN 204102883U
- Authority
- CN
- China
- Prior art keywords
- chip
- pin
- metal
- substrate sheet
- back side
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000002184 metal Substances 0.000 title claims abstract description 79
- 229910052751 metal Inorganic materials 0.000 title claims abstract description 79
- 239000000758 substrate Substances 0.000 claims abstract description 26
- 239000005022 packaging material Substances 0.000 claims abstract description 13
- 239000000463 material Substances 0.000 claims description 8
- 230000003064 anti-oxidating effect Effects 0.000 claims description 4
- 150000002739 metals Chemical class 0.000 abstract description 8
- 230000009286 beneficial effect Effects 0.000 abstract description 2
- 239000002131 composite material Substances 0.000 description 10
- 239000010410 layer Substances 0.000 description 6
- 238000005538 encapsulation Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 239000011229 interlayer Substances 0.000 description 4
- 238000004806 packaging method and process Methods 0.000 description 3
- 230000005855 radiation Effects 0.000 description 3
- 230000010354 integration Effects 0.000 description 2
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 230000000712 assembly Effects 0.000 description 1
- 238000000429 assembly Methods 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
The utility model relates to a kind of multi-chip stacking and combined type flat pin metal framework structure in base island is just being housed, described structure comprises Metal Substrate sheet frame (1), described Metal Substrate sheet frame (1) inside is provided with Ji Dao (2) and pin (3), described pin (3) is in step-like, the step surface of described pin (3) is provided with metal level (4), the first chip (6) is just being equipped with at described Ji Dao (2) back side, the second chip (7) is just being equipped with on described first chip (6) surface, described first chip (6) and the second chip (7) surface are connected by metal wire (8) with between metal level (4) surface, described Metal Substrate sheet frame (1) interior zone is filled with plastic packaging material (8), described plastic packaging material (8) back side flushes with Metal Substrate sheet frame (1) back side.The beneficial effects of the utility model are: cannot imbed object and limit the functional of die-attach area and application performance among the thickness of slab that it can solve conventional metals lead frame.
Description
Technical field
The utility model relates to a kind of multi-chip stacking and combined type flat pin metal framework structure in base island is just being housed, and belongs to technical field of semiconductor encapsulation.
Background technology
Traditional flat-four-side mainly contains two kinds without pin metal leadframe structure:
One be flat-four-side without pin package (QFN) lead frame, the lead frame of this structure is made up of (as shown in Figure 3) copper material metal framework and high temperature resistant glued membrane;
One encapsulates flat-four-side in advance without pin package (PQFN) lead frame, and the lead frame structure of this structure comprises pin and Ji Dao, and the etching area between pin and base island is filled with plastic packaging material (as shown in Figure 4).
There is following shortcoming in above-mentioned conventional metals lead frame:
1, conventional metals lead frame is as the package carrier loading chip, and itself does not possess systemic-function, thus the integrated functionalities limited after conventional metals leadframe package and application performance;
2, because conventional metals lead frame itself does not possess systemic-function, tiling or the stacked package of chip and assembly can only be carried out in lead frame front, and power device and control chip are encapsulated in same packaging body, the heat radiation of power device can affect the transmission of control chip signal;
3, because conventional metals lead frame itself does not possess systemic-function, so multifunction system integration module in conventional metals lead frame front by the tiling of multi-chip and assembly or stacking and realize, correspondingly also can only just increase component module space shared on PCB.
Summary of the invention
The purpose of this utility model is to overcome above-mentioned deficiency, provides a kind of multi-chip stacking that combined type flat pin metal framework structure in base island is just being housed, and it can solve the problem that conventional metals lead frame lacks systemic-function.
The purpose of this utility model is achieved in that a kind of multi-chip stacking is just being equipped with the flat pin metal framework structure of base island combined type, it comprises Metal Substrate sheet frame, described Metal Substrate sheet frame inside is provided with Ji Dao and pin, described pin is step-like, the front of described Ji Dao and pin and Metal Substrate sheet frame front flush, the back side of described pin flushes with the back side of Metal Substrate sheet frame, the described Ji Dao back side flushes with the step surface of pin, the step surface of described pin is provided with metal level, the first chip is just being equipped with by conduction or non-conductive bonding material in the described Ji Dao back side, described first chip surface is just being equipped with the second chip by conduction or non-conductive bonding material, described first chip and the second chip surface are connected by metal wire with between layer on surface of metal, described Metal Substrate sheet frame interior zone is filled with plastic packaging material, described plastic packaging material front flushes with pin step surface, the described plastic packaging material back side flushes with the Metal Substrate sheet frame back side, described Ji Dao front, the front and back of pin and the front and back of Metal Substrate sheet frame are provided with anti oxidation layer.
Metal level is provided with between described chip and the Ji Dao back side.
Described pin step surface is provided with single-turn or multi-turn conductive posts.
Compared with prior art, the utility model has following beneficial effect:
1, the interlayer of composition metal lead frame can imbed active member or assembly or passive assembly in the position needed or region because of the needs of system and function, becomes a system-level metal lead wire frame of individual layer circuit;
2, can't see inner interlayer completely from the outward appearance of composite metal leadframe product and imbed object because system or function need, especially the imbedding X-ray and all cannot inspect of chip of silicon material, fully reaches confidentiality and the protectiveness of system and function;
3, the interlayer of composite metal lead frame can imbed high-power component in manufacturing process, secondary encapsulation carries out the load of control chip again, thus high-power component and control chip are contained in composite metal lead frame both sides respectively, high-power component can be avoided to dispel the heat and disturb the Signal transmissions of control chip;
4, composite metal lead frame itself includes the function imbedding object, the integrated of systemic-function and integration can be fully realized after secondary encapsulation, thus the module that the volume size of the component module of said function encapsulates than conventional lead frame come little, corresponding space shared on PCB is also just fewer, thus also just reduces cost;
5, the interlayer of composite metal lead frame can imbed heat conduction or heat radiation object because heat conduction or heat radiation need in manufacturing process in the position needed or region, thus improves the radiating effect of whole encapsulating structure;
6, composite metal leadframe product has inherently been rich in various assemblies, if when no longer carrying out follow-up second time encapsulation, is cut by composite metal lead frame according to each lattice unit, inherently can become a ultra-thin packaging body;
7, composite metal lead frame can also superpose different unit package or system in package in packaging body periphery again except itself including imbedding except function of object, fully reaches the dual system of individual layer circuit metal lead wire frame or the encapsulation technology ability of polyphyly irrespective of size;
8, the object imbedded in composite metal lead frame or object all flush with metal thickness, embody fully among the ultra-thin and highdensity thickness space be filled in composite metal lead frame.
Accompanying drawing explanation
Fig. 1 is the schematic diagram that a kind of multi-chip stacking of the utility model is just being equipped with base island combined type flat pin metal framework structure embodiment 1.
Fig. 2 is the schematic diagram that a kind of multi-chip stacking of the utility model is just being equipped with base island combined type flat pin metal framework structure embodiment 1.
Fig. 3 is the schematic diagram of traditional flat-four-side without pin package (QFN) lead frame structure.
Fig. 4 is the schematic diagram of pre-encapsulating flat-four-side without pin package (PQFN) lead frame structure.
Wherein:
Metal Substrate sheet frame 1
Base island 2
Pin 3
Metal level 4
Conduction or non-conductive bonding material 5
First chip 6
Second chip 7
Metal wire 8
Plastic packaging material 9
Anti oxidation layer 10
Conductive posts 11.
Embodiment
Embodiment 1:
See Fig. 1, a kind of multi-chip stacking of the utility model is just being equipped with the flat pin metal framework structure of base island combined type, it comprises Metal Substrate sheet frame 1, described Metal Substrate sheet frame 1 inside is provided with base island 2 and pin 3, described pin 3 is in step-like, the front of described base island 2 and pin 3 and Metal Substrate sheet frame 1 front flush, the back side of described pin 3 flushes with the back side of Metal Substrate sheet frame 1, the back side, described base island 2 flushes with the step surface of pin 3, the step surface of described pin 3 is provided with metal level 4, the first chip 6 is just being equipped with by conduction or non-conductive bonding material 5 in the back side, described base island 2, the second chip 7 is just being equipped with by conduction or non-conductive bonding material 5 in described first chip 6 surface, described first chip 6 and the second chip 7 surface are connected by metal wire 8 with between metal level 4 surface, described Metal Substrate sheet frame 1 interior zone is filled with plastic packaging material 9, described plastic packaging material 9 front flushes with pin 3 step surface, described plastic packaging material 9 back side flushes with Metal Substrate sheet frame 1 back side, front, described base island 2, the front and back of pin 3 and the front and back of Metal Substrate sheet frame 1 are provided with anti oxidation layer 10.
Metal level 4 is provided with between described first chip 6 and the back side, base island 2.
Embodiment 2:
See Fig. 2, embodiment 2 is with the difference of embodiment 1: described pin 3 step surface is provided with single-turn or multi-turn conductive posts 11.
Claims (3)
1. a multi-chip stacking is just being equipped with the flat pin metal framework structure of base island combined type, it is characterized in that: it comprises Metal Substrate sheet frame (1), described Metal Substrate sheet frame (1) inside is provided with Ji Dao (2) and pin (3), described pin (3) is in step-like, the front of described Ji Dao (2) and pin (3) and Metal Substrate sheet frame (1) front flush, the back side of described pin (3) flushes with the back side of Metal Substrate sheet frame (1), described Ji Dao (2) back side flushes with the step surface of pin (3), the step surface of described pin (3) is provided with metal level (4), the first chip (6) is just being equipped with by conduction or non-conductive bonding material (5) in described Ji Dao (2) back side, the second chip (7) is just being equipped with by conduction or non-conductive bonding material (5) in described first chip (6) surface, described first chip (6) and the second chip (7) surface are connected by metal wire (8) with between metal level (4) surface, described Metal Substrate sheet frame (1) interior zone is filled with plastic packaging material (9), described plastic packaging material (9) front flushes with pin (3) step surface, described plastic packaging material (9) back side flushes with Metal Substrate sheet frame (1) back side, described Ji Dao (2) front, the front and back of pin (3) and the front and back of Metal Substrate sheet frame (1) are provided with anti oxidation layer (10).
2. a kind of multi-chip stacking according to claim 1 is just being equipped with the flat pin metal framework structure of base island combined type, it is characterized in that: be provided with metal level (4) between described first chip (6) and Ji Dao (2) back side.
3. a kind of multi-chip stacking according to claim 1 and 2 is just being equipped with the flat pin metal framework structure of base island combined type, it is characterized in that: described pin (3) step surface is provided with single-turn or multi-turn conductive posts (11).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320787692.XU CN204102883U (en) | 2013-12-05 | 2013-12-05 | Multi-chip stacking is just being equipped with the flat pin metal framework structure of base island combined type |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320787692.XU CN204102883U (en) | 2013-12-05 | 2013-12-05 | Multi-chip stacking is just being equipped with the flat pin metal framework structure of base island combined type |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN204102883U true CN204102883U (en) | 2015-01-14 |
Family
ID=52271289
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201320787692.XU Expired - Lifetime CN204102883U (en) | 2013-12-05 | 2013-12-05 | Multi-chip stacking is just being equipped with the flat pin metal framework structure of base island combined type |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN204102883U (en) |
-
2013
- 2013-12-05 CN CN201320787692.XU patent/CN204102883U/en not_active Expired - Lifetime
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CX01 | Expiry of patent term | ||
| CX01 | Expiry of patent term |
Granted publication date: 20150114 |