CN204101651U - For the testing circuit of frequency converter three-phase bridge type inverse loop hardware dead area compensation - Google Patents

For the testing circuit of frequency converter three-phase bridge type inverse loop hardware dead area compensation Download PDF

Info

Publication number
CN204101651U
CN204101651U CN201420438272.5U CN201420438272U CN204101651U CN 204101651 U CN204101651 U CN 204101651U CN 201420438272 U CN201420438272 U CN 201420438272U CN 204101651 U CN204101651 U CN 204101651U
Authority
CN
China
Prior art keywords
time
comparer
comparison resistance
resistance
detects
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201420438272.5U
Other languages
Chinese (zh)
Inventor
李涛
陈昆鸿
王百淞
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SUZHOU SHIHLIN ELECTRIC CO Ltd
Original Assignee
SUZHOU SHIHLIN ELECTRIC CO Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SUZHOU SHIHLIN ELECTRIC CO Ltd filed Critical SUZHOU SHIHLIN ELECTRIC CO Ltd
Priority to CN201420438272.5U priority Critical patent/CN204101651U/en
Application granted granted Critical
Publication of CN204101651U publication Critical patent/CN204101651U/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Inverter Devices (AREA)

Abstract

The purpose of this utility model proposes a kind of testing circuit for frequency converter three-phase bridge type inverse loop hardware dead area compensation.This testing circuit comprises: between the upper and lower brachium pontis being connected to frequency converter three-phase bridge type inverse loop, for detecting the conducting turn-off time detecting unit of lower brachium pontis IGBT collector-emitter state; The output terminal of detecting unit is connected with the conducting turn-off time, detects comparing unit for the conducting turn-off time output signal of conducting turn-off time detecting unit and busbar voltage compared; The output terminal detecting comparing unit with the conducting turn-off time is connected, for the optocoupler unit of isolated high-voltage side and low-pressure side.The utility model can reflect the IGBT turn-on and turn-off time accurately, and accomplish to detect in real time and feedback by the high-speed comparator of minimum delay and high speed photo coupling, without the need to current zero-crossing point detection or estimate, the actual phase voltage of motor can be obtained simultaneously, thus effectively judge signal for dead area compensation provides, make dead area compensation corresponding in time.

Description

For the testing circuit of frequency converter three-phase bridge type inverse loop hardware dead area compensation
Technical field
The utility model belongs to frequency converter electronic technology field, is related specifically to a kind of testing circuit for frequency converter three-phase bridge type inverse loop hardware dead area compensation.
Background technology
In the three-phase bridge type inverse loop of traditional frequency conversion device, the work of two switching device IGBT of same brachium pontis is complementary state.Because the service time of general switching device IGBT is less than the turn-off time, if be therefore added on the gate pole of two switching device IGBT of same brachium pontis by the control signal of complementation, so these two switching device IGBT will lead directly to.Must one section of Dead Time be set between switching device IGBT turns on and off.
The existence in above-mentioned dead band makes frequency converter completely accurately can not reappear the waveform of control signal, output voltage produces the error of amplitude and phase place, directly affect motor running performance, its major consequences can make fundamental voltage output of voltage amplitude reduce, current waveform distorts, when low frequency and high carrier frequency, can make motor electromagnetic torque that larger pulsation occurs, seriously have impact on system performance.
Traditional software dead band is detected and is divided into direct-detection current zero-crossing point and current phasor to judge current zero-crossing point.Direct-detection current zero-crossing point calculates fairly simple, and CPU burden is lighter.But direct-detection current zero-crossing point has larger susceptibility to current noise, current amplitude and frequency change.Particularly motor is when low-frequency operation, owing to there is the impact of zero current clamping phenomenon and width modulation noise, harmonic component near switching frequency is more, makes the judgement of direction of current occur mistake at zero crossings, thus the dead time effect when zero crossing is worsened more.The method of usual employing carries out filtering process to stator current.But the introducing of filtering link exacerbates the difficulty to current polarity Real-Time Monitoring, bring the problem that detection signal is delayed, serious detection is delayed, can destroy the correct compensation to Dead Time.Judging that current over-zero point methods is by converting under rotating coordinate system by current phasor, converting threephase stator electric current to Space current vector, indirectly being judged the polarity of threephase stator electric current by the phase angle of current phasor, dead band is compensated.The fundametal compoment of threephase stator electric current then shows as DC component in synchronous rotating frame, carries out filtering process to this DC component, all can not have an impact to amplitude, phase place.This method avoid direct-detection current zero-crossing point and carry out the problem that filtering process brings, but will carry out changes in coordinates, calculated amount is comparatively large, and CPU burden is heavier.
Utility model content
The purpose of this utility model proposes a kind of actual ON time of upper and lower brachium pontis that can detect frequency converter three-phase bridge type inverse loop real-time and accurately, and be the testing circuit for frequency converter three-phase bridge type inverse loop hardware dead area compensation of the real-time accurate signal of subsequent compensation circuit judges current zero-crossing point collection.
Testing circuit for frequency converter three-phase bridge type inverse loop hardware dead area compensation of the present utility model comprises:
Between the upper and lower brachium pontis being connected to frequency converter three-phase bridge type inverse loop, for detecting the conducting turn-off time detecting unit of lower brachium pontis IGBT collector-emitter state;
The output terminal of detecting unit is connected with the conducting turn-off time, detects comparing unit for the conducting turn-off time output signal of conducting turn-off time detecting unit and busbar voltage compared;
The output terminal detecting comparing unit with the conducting turn-off time is connected, for the optocoupler unit of isolated high-voltage side and low-pressure side.
Job step and the principle of the testing circuit for frequency converter three-phase bridge type inverse loop hardware dead area compensation of the present utility model are as follows:
1, conducting turn-off time detecting unit detects the voltage of lower brachium pontis IGBT collector-emitter, thus judge the conducting off state of brachium pontis IGBT collector-emitter, and the lower brachium pontis IGBT collector emitter voltage detected is exported to conducting turn-off time detection comparing unit;
2, lower brachium pontis IGBT collector emitter voltage and busbar voltage compare by conducting turn-off time detection comparing unit, produce the signal driving optocoupler; In order to the trigger comparator the IGBT turn-on and turn-off time can be reflected accurately when turning off high pressure and conducting low pressure close to lower brachium pontis IGBT, the conducting turn-off time detect comparing unit lower brachium pontis IGBT collector emitter voltage, busbar voltage is scaled respectively after compare again;
3, optocoupler cell isolation high-pressure side and low-pressure side, and the detection signal of the output signal of conducting turn-off time detection comparing unit as dead band is transferred out, for subsequent compensation circuit as the foundation judging current zero-crossing point.
The concrete process of above-mentioned single-chip microcomputer can set according to specific circumstances, repeats no more herein.
Specifically, described conducting turn-off time detecting unit detects by connect first and scale smaller resistance R1 and second detects and scale smaller resistance R2 is formed, described first detection and scale smaller resistance R1 are connected between the upper and lower brachium pontis in frequency converter three-phase bridge type inverse loop, and the contact of described first detection and scale smaller resistance R1 and second detection and scale smaller resistance R2 is the output terminal of conducting turn-off time detecting unit.
The described conducting turn-off time is detected comparing unit and detects comparison resistance R3 by first in first order comparator circuit, second detects comparison resistance R4, 3rd detects comparison resistance R5, 4th detects comparison resistance R6, the first comparison resistance R9 in first comparer U1 and second level comparator circuit, second comparison resistance R8, second comparer U2 is formed, the reverse input end of described first comparer U1 is connected with the output terminal of conducting turn-off time detecting unit, described first detects comparison resistance R3, 3rd detects comparison resistance R5, 4th detects comparison resistance R6 is series between the upper brachium pontis bus in frequency converter three-phase bridge type inverse loop and the power end of the first comparer U1, described first detects comparison resistance R3 and the 3rd contact detecting comparison resistance R5 is divided into two-way, leads up to one end ground connection of the second detection comparison resistance R4, and another road is connected with the positive input of the first comparer U1, described 3rd detects comparison resistance R5 is connected with the output terminal of the first comparer U1, the reverse input end of the second comparer U2 respectively with the 4th contact detecting comparison resistance R6, between the power end that described first comparison resistance R9, the second comparison resistance R8 are series at the second comparer U2 and ground, the first comparison resistance R9 is connected with the positive input of the second comparer U2 with the contact of the second comparison resistance R8, the output terminal of the second comparer U2 is the output terminal conducting turn-off time detecting comparing unit.
Described optocoupler unit is by optocoupler U3, form by the pull-up resistor R7 of the input end pull-up of optocoupler U3 and by the pull-up resistor R10 of the output terminal pull-up of optocoupler U3.
Testing circuit for frequency converter three-phase bridge type inverse loop hardware dead area compensation of the present utility model can reflect the IGBT turn-on and turn-off time accurately, and accomplish to detect in real time and feedback by the high-speed comparator of minimum delay and high speed photo coupling, without the need to current zero-crossing point detection or estimate, the actual phase voltage of motor can be obtained simultaneously, thus effectively judge signal for dead area compensation provides, make dead area compensation corresponding in time.
Accompanying drawing explanation
Fig. 1 is the theory diagram of the testing circuit for frequency converter three-phase bridge type inverse loop hardware dead area compensation of the present utility model.
Fig. 2 is the circuit theory diagrams of the testing circuit for frequency converter three-phase bridge type inverse loop hardware dead area compensation of the present utility model.
Embodiment
Contrast accompanying drawing below, by the description to embodiment, the effect and principle of work etc. of embodiment of the present utility model as the mutual alignment between the shape of involved each component, structure, each several part and annexation, each several part are described in further detail.
Embodiment 1:
As shown in Figure 1, the testing circuit for frequency converter three-phase bridge type inverse loop hardware dead area compensation of the present embodiment comprises: between the upper and lower brachium pontis being connected to frequency converter three-phase bridge type inverse loop, for detecting the conducting turn-off time detecting unit of lower brachium pontis IGBT collector-emitter state; The output terminal of detecting unit is connected with the conducting turn-off time, detects comparing unit for the conducting turn-off time output signal of conducting turn-off time detecting unit and busbar voltage compared; The output terminal detecting comparing unit with the conducting turn-off time is connected, for the optocoupler unit of isolated high-voltage side and low-pressure side.
As shown in Figure 2, IGBT1 and IGBT2 represents the IGBT of the upper and lower brachium pontis of inversion part one phase, for simplicity, only represents mutually with one when setting forth the utility model herein.C1 and C2 represents the flat wave capacitor on frequency changer direct current bus.Voltage between DC bus P, N represents with VPN.The reverse input end voltage V1 of the first comparer U1 represents, the positive input voltage V2 of the first comparer U1 represents, the output end voltage of the first comparer U1 represents with V3, and the positive input voltage V4 of the second comparer U2 represents, the output voltage of optocoupler U3 represents with V5.
Above-mentioned conducting turn-off time detecting unit detects by connect first and scale smaller resistance R1 and second detects and scale smaller resistance R2 is formed, described first detection and scale smaller resistance R1 are connected between the upper and lower brachium pontis in frequency converter three-phase bridge type inverse loop, and the contact of described first detection and scale smaller resistance R1 and second detection and scale smaller resistance R2 is the output terminal of conducting turn-off time detecting unit.
The above-mentioned conducting turn-off time is detected comparing unit and detects comparison resistance R3 by first in first order comparator circuit, second detects comparison resistance R4, 3rd detects comparison resistance R5, 4th detects comparison resistance R6, the first comparison resistance R9 in first comparer U1 and second level comparator circuit, second comparison resistance R8, second comparer U2 is formed, the reverse input end of described first comparer U1 is connected with the output terminal of conducting turn-off time detecting unit, described first detects comparison resistance R3, 3rd detects comparison resistance R5, 4th detects comparison resistance R6 is series between the upper brachium pontis bus in frequency converter three-phase bridge type inverse loop and the power end of the first comparer U1, described first detects comparison resistance R3 and the 3rd contact detecting comparison resistance R5 is divided into two-way, leads up to one end ground connection of the second detection comparison resistance R4, and another road is connected with the positive input of the first comparer U1, described 3rd detects comparison resistance R5 is connected with the output terminal of the first comparer U1, the reverse input end of the second comparer U2 respectively with the 4th contact detecting comparison resistance R6, between the power end that described first comparison resistance R9, the second comparison resistance R8 are series at the second comparer U2 and ground, the first comparison resistance R9 is connected with the positive input of the second comparer U2 with the contact of the second comparison resistance R8, the output terminal of the second comparer U2 is the output terminal conducting turn-off time detecting comparing unit.
Above-mentioned optocoupler unit is by optocoupler U3, be pulled to power supply VCC by the pull-up resistor R7(of the input end pull-up of optocoupler U3) and the pull-up resistor R10(of the output terminal pull-up of optocoupler U3 is pulled to power vd D) form.
During frequency converter work, IGBT1 and IGBT2 alternate conduction turns off, R1 and R2 detects IGBT2 collector emitter voltage and this voltage ratio is reduced the reverse input end producing voltage signal V1 to the first comparer U1, and R3, R4, R5, R6 produce the positive input of voltage signal V2 to the first comparer U1 by dividing potential drop VPN and VCC.
When IGBT1 conducting IGBT2 turns off, it is VPN that IGBT2 collector emitter voltage raises by 0, when IGBT2 collector emitter voltage is close to VPN, first comparer U1 output voltage V3 is lower than the signal V4 of R9, R8 dividing potential drop VCC, second comparer U2 open collector exports, optocoupler U3 conducting, output voltage V5 approximates 0V.
When IGBT1 turns off IGBT2 conducting, IGBT2 collector emitter voltage is reduced to 0 by VPN, when IGBT2 collector emitter voltage close to 0 time, first comparer U1 output voltage V3 is higher than the signal V4 of R9, R8 dividing potential drop VCC, it is 0 that second comparer U2 exports, optocoupler U3 turns off, and output voltage V5 approximates VDD.
Optocoupler exports the turn-on and turn-off state that V5 signal reflects IGBT2.
From the above, the feature of frequency converter dead area compensation circuit of the present utility model is: just start action close to when busbar voltage VPN, decline close to the first comparer U1 during 0V when lower brachium pontis IGBT collector emitter voltage rises, almost can react the conducting off state of IGBT2 without distortion.Two comparers and optocoupler are all high-speed type, and whole line delay is minimum, are exported in time by the IGBT conducting cut-off signals of reality.So hardware dead area compensation circuit of the present utility model is without the need to detecting and estimating zero crossing electric current, accurately and timely by IGBT turn-on and turn-off feedback of status to single-chip microcomputer current zero-crossing point signal accurately can be provided.

Claims (4)

1., for a testing circuit for frequency converter three-phase bridge type inverse loop hardware dead area compensation, it is characterized in that comprising:
Between the upper and lower brachium pontis being connected to frequency converter three-phase bridge type inverse loop, for detecting the conducting turn-off time detecting unit of lower brachium pontis IGBT collector-emitter state;
The output terminal of detecting unit is connected with the conducting turn-off time, detects comparing unit for the conducting turn-off time output signal of conducting turn-off time detecting unit and busbar voltage compared;
The output terminal detecting comparing unit with the conducting turn-off time is connected, for the optocoupler unit of isolated high-voltage side and low-pressure side.
2. the testing circuit for frequency converter three-phase bridge type inverse loop hardware dead area compensation according to claim 1, it is characterized in that described conducting turn-off time detecting unit detects by connect first and scale smaller resistance R1 and second detects and scale smaller resistance R2 is formed, described first detection and scale smaller resistance R1 are connected between the upper and lower brachium pontis in frequency converter three-phase bridge type inverse loop, and the contact of described first detection and scale smaller resistance R1 and second detection and scale smaller resistance R2 is the output terminal of conducting turn-off time detecting unit.
3. the testing circuit for frequency converter three-phase bridge type inverse loop hardware dead area compensation according to claim 1, it is characterized in that the described conducting turn-off time is detected comparing unit and detects comparison resistance R3 by first in first order comparator circuit, second detects comparison resistance R4, 3rd detects comparison resistance R5, 4th detects comparison resistance R6, the first comparison resistance R9 in first comparer U1 and second level comparator circuit, second comparison resistance R8, second comparer U2 is formed, the reverse input end of described first comparer U1 is connected with the output terminal of conducting turn-off time detecting unit, described first detects comparison resistance R3, 3rd detects comparison resistance R5, 4th detects comparison resistance R6 is series between the upper brachium pontis bus in frequency converter three-phase bridge type inverse loop and the power end of the first comparer U1, described first detects comparison resistance R3 and the 3rd contact detecting comparison resistance R5 is divided into two-way, leads up to one end ground connection of the second detection comparison resistance R4, and another road is connected with the positive input of the first comparer U1, described 3rd detects comparison resistance R5 is connected with the output terminal of the first comparer U1, the reverse input end of the second comparer U2 respectively with the 4th contact detecting comparison resistance R6, between the power end that described first comparison resistance R9, the second comparison resistance R8 are series at the second comparer U2 and ground, the first comparison resistance R9 is connected with the positive input of the second comparer U2 with the contact of the second comparison resistance R8, the output terminal of the second comparer U2 is the output terminal conducting turn-off time detecting comparing unit.
4. the testing circuit for frequency converter three-phase bridge type inverse loop hardware dead area compensation according to claim 1, is characterized in that described optocoupler unit is by optocoupler U3, form by the pull-up resistor R7 of the input end pull-up of optocoupler U3 and by the pull-up resistor R10 of the output terminal pull-up of optocoupler U3.
CN201420438272.5U 2014-08-06 2014-08-06 For the testing circuit of frequency converter three-phase bridge type inverse loop hardware dead area compensation Expired - Fee Related CN204101651U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201420438272.5U CN204101651U (en) 2014-08-06 2014-08-06 For the testing circuit of frequency converter three-phase bridge type inverse loop hardware dead area compensation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201420438272.5U CN204101651U (en) 2014-08-06 2014-08-06 For the testing circuit of frequency converter three-phase bridge type inverse loop hardware dead area compensation

Publications (1)

Publication Number Publication Date
CN204101651U true CN204101651U (en) 2015-01-14

Family

ID=52270068

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201420438272.5U Expired - Fee Related CN204101651U (en) 2014-08-06 2014-08-06 For the testing circuit of frequency converter three-phase bridge type inverse loop hardware dead area compensation

Country Status (1)

Country Link
CN (1) CN204101651U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104917419A (en) * 2015-07-01 2015-09-16 上海中科深江电动车辆有限公司 Dead zone compensation method and device for three-phase inverter
CN110308312A (en) * 2019-08-08 2019-10-08 南京芯长征科技有限公司 It is able to achieve the method and device of Hi-pot test mesohigh isolation

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104917419A (en) * 2015-07-01 2015-09-16 上海中科深江电动车辆有限公司 Dead zone compensation method and device for three-phase inverter
CN110308312A (en) * 2019-08-08 2019-10-08 南京芯长征科技有限公司 It is able to achieve the method and device of Hi-pot test mesohigh isolation
CN110308312B (en) * 2019-08-08 2021-04-23 南京芯长征科技有限公司 Method and device capable of realizing high-voltage isolation in high-voltage test

Similar Documents

Publication Publication Date Title
CN102843059B (en) Dead zone compensating method and device of voltage-type inverter
CN102624276A (en) Novel dead-zone effect compensation method of AC servo inverter
CN104734581B (en) Driving method for position-sensorless of permanent magnet brushless direct current motor
CN103414368B (en) A kind of dead-zone compensation method of three-phase inverter
CN104155564A (en) Brushless direct-current motor inverter single tube open-circuit fault diagnosing and positioning method
CN106533151B (en) The control method and device of partial PFC circuit, household electrical appliance
CN110233564A (en) Drive control circuit and household appliance
CN103346668B (en) Control system for restraining high-frequency electromagnetic interference at output end of indirect matrix converter
CN102780414B (en) Device and method for inhibiting inrush starting current for large-power grid-connected inverter
CN204101651U (en) For the testing circuit of frequency converter three-phase bridge type inverse loop hardware dead area compensation
CN104362881A (en) Dead-time compensation method based on instantaneous current and refined voltage compensation
CN103457498A (en) Motor excitation device and dead-time compensation method thereof
CN103715921A (en) Current-limiting control method for VIENNA rectifier
CN105305483A (en) Inverter grid connected type power source impedance measurement model optimization method under the condition of external disturbance signals
CN103973134A (en) Direct-current power device and PWM (pulse width modulation) pulse control method for improving power factor thereof
CN105808901A (en) Method for determining on-state loss of modularized multilevel converter
CN102882398B (en) DC-AC converter
CN102570873A (en) Dead zone compensation method used in voltage space vector pulse width modulation technology
CN104065070B (en) A kind of digital monocyclic phase method based on compensation of delay controls Active Power Filter-APF
CN106597059B (en) A kind of current sample method of inverter circuit
CN103607105B (en) A kind of dead time compensation control method and system
CN105337539A (en) Brushless direct current motor rotor position detecting technique
CN105375780A (en) Vehicle soft switching inversion power supply and voltage conversion circuit thereof
CN204362336U (en) The high-power high-frequency induction heating power of multi-inverter parallel volume expansion structure
CN102664572B (en) Position sensorless control device of medium and high-voltage commutatorless motor

Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20150114

Termination date: 20200806

CF01 Termination of patent right due to non-payment of annual fee