CN204089842U - Mine sensors demultiplexer - Google Patents

Mine sensors demultiplexer Download PDF

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Publication number
CN204089842U
CN204089842U CN201420433273.0U CN201420433273U CN204089842U CN 204089842 U CN204089842 U CN 204089842U CN 201420433273 U CN201420433273 U CN 201420433273U CN 204089842 U CN204089842 U CN 204089842U
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China
Prior art keywords
resistance
circuit
signal
frequency
operational amplifier
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Withdrawn - After Issue
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CN201420433273.0U
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Chinese (zh)
Inventor
孙超
孙强
张龙淮
廖尉和
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HUAINAN RUNCHENG TECHNOLOGY Co Ltd
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HUAINAN RUNCHENG TECHNOLOGY Co Ltd
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Abstract

A kind of mine sensors demultiplexer, is characterized in that comprising frequency input circuit, the first voltage follower circuit, frequently pressing conversion circuit, the second voltage follower circuit, subtraction circuit, V-I circuit, first frequency output circuit, second frequency output circuit; The signal output part of frequency input circuit connects the signal input part of the first voltage follower circuit, the signal output part of the first voltage follower circuit connects the signal input part of first frequency output circuit, the signal input part of the signal input part of second frequency output circuit, frequently pressure conversion circuit, frequently the signal output part of pressure conversion circuit connects the signal input part of the second voltage follower circuit, the signal output part of the second voltage follower circuit connects the signal input part of subtraction circuit, and the signal output part of subtraction circuit connects the signal input part of V-I circuit; The utility model can realize the compatibility adopted between the mining equipment of unlike signal Output system, and the multichannel of signal is uploaded.

Description

Mine sensors demultiplexer
Technical field
The utility model relates to signal transmitting apparatus, particularly relates to a kind of sensor signal processing unit.
Background technology
At present, the signal Output system of mine sensors has corresponding rower specification, is roughly divided into current mode signal, frequency type signal, numeric type signal.Wherein a kind of standard inputing or outputing signal as device product can be selected by general manufacturer, produces the equipment that different manufacturers is produced thus, problem that can not be completely compatible.The generation of this external signal is with in identification, and the specification that producer is ununified, namely uses same signaling mode, still has the situation not receiving signal and occurs, and this processes the signal of output with regard to needing.Frequency type signal is the standard that most of mine sensors output signal adopts, and produces easily, identifies simple, requires low during multichannel up-delivering signal to adjunct circuit, or without adjunct circuit, is also use maximum signaling modes in the transmission of current coal mine simulation amount.
To transmission and the conversion of frequency type signal, realize communication each other when different mining equipment adopts unlike signal input and output standard, and the multichannel realizing signal being uploaded, is current colliery transducer new problem urgently to be resolved hurrily.
Utility model content
The purpose of this utility model is to provide a kind of mine sensors demultiplexer for solving the problems of the technologies described above.
The utility model mine sensors demultiplexer, comprises frequency input circuit, the first voltage follower circuit, frequently presses conversion circuit, the second voltage follower circuit, subtraction circuit, V-I circuit, first frequency output circuit, second frequency output circuit;
The signal output part of frequency input circuit connects the signal input part of the first voltage follower circuit, the signal output part of the first voltage follower circuit connects the signal input part of first frequency output circuit, the signal input part of the signal input part of second frequency output circuit, frequently pressure conversion circuit, frequently the signal output part of pressure conversion circuit connects the signal input part of the second voltage follower circuit, the signal output part of the second voltage follower circuit connects the signal input part of subtraction circuit, and the signal output part of subtraction circuit connects the signal input part of V-I circuit;
Frequency input circuit is used for the frequency signal of input oppositely to amplify, and the amplitude of frequency signal is improved;
First voltage follower circuit, for reducing the output resistance of frequency signal, improves driving force, ensures and the docking of the receiving circuit of follow-up channelized frequencies signal;
Frequently pressure conversion circuit is used for the frequency signal of reception to change into voltage signal;
Second voltage follower circuit is for reducing the output resistance of voltage signal;
Subtraction circuit be used for by second voltage follower circuit export voltage be processed into be suitable for V-I processing of circuit magnitude of voltage;
V-I circuit is used for the voltage signal of reception to change into current signal, and finally exports;
First frequency output circuit, second frequency output circuit, for amplifying the frequency signal of reception, reduce output resistance simultaneously.
Described frequency input circuit comprises resistance R1, resistance R2, resistance R3, the first triode formation frequency input circuit, ground connection after base series resistor R2, the resistance R1 of the first triode, the transmitter ground connection of the first triode, the collector electrode of the first triode meets power vd D through resistance R3.
Described frequency pressure conversion circuit comprises electric capacity C1, electric capacity C2, electric capacity C3, resistance R4, resistance R5, resistance R6, resistance R7, the first rheostat, the chip of pressure conversion frequently; Frequently pressure conversion chip first draws foot meridian capacitor C2 ground connection, resistance R7 is connected in parallel on electric capacity C2 two ends, frequently pressure transforms chip second pin through the first rheostat ground connection, frequently pressure transforms chip the 3rd pin, the 4th pin ground connection, frequently pressure transforms chip the 5th pin and meets power vd D through resistance R6, frequently pressure conversion chip the 5th draws foot meridian capacitor C3 ground connection, frequently pressure transforms chip the 6th pin and meets power vd D through resistance R4, frequently pressure transforms chip the 7th pin and meets power vd D through resistance R5, and pressure transforms chip the 8th pin and meets power vd D frequently; Frequently pressure transforms one end that chip the 6th pin meets electric capacity C1.
Described subtraction circuit comprises the first operational amplifier, resistance R8, resistance R9, resistance R10, resistance R11, first operational amplifier in-phase input end meets VDD through resistance R9, first operational amplifier in-phase input end through resistance R11 ground connection, the indirect resistance R10 of the first operational amplifier reverse input end, output; One end of first operational amplifier reverse input end connecting resistance R8.
Described V-I circuit comprises the second operational amplifier, resistance R12, resistance R13, the second rheostat, the second triode, the first diode, second operational amplifier reverse input end connects the emitter of the second triode, the base stage of the second triode is connect after second operational amplifier output terminal series resistance R12, the collector electrode of the second triode connects the positive pole of the first diode, and the emitter of the second triode is connected successively after the second rheostat, resistance R13 and met power vd D.
Described first frequency output circuit comprises resistance R14, resistance R15, resistance R16, resistance R17, the 3rd triode, the 4th triode, the second diode, 3rd triode transmitter ground connection, power vd D is met after 3rd transistor collector series resistance R15, the 4th transistor base is connect after 3rd transistor collector series resistance R16,4th transistor emitter meets power vd D, connects the positive pole of the second diode after the 4th transistor collector series resistance R17; One end of 3rd transistor base connecting resistance R14.
The four high guaily unit integrated device that described first operational amplifier, the second operational amplifier, the 3rd operational amplifier and four-operational amplifier can be LM324 by model replaces.
The model that described frequency pressure transforms chip is LM331.
Mine sensors demultiplexer of the present utility model effectively solves the compatibility issue that different mining equipments adopts the existence communicated each other during different signal input and output standards, and the technical problem that the multichannel of signal is uploaded.
Below in conjunction with accompanying drawing, mine sensors demultiplexer of the present utility model is described further.
Accompanying drawing explanation
Fig. 1 is the theory diagram of mine sensors demultiplexer of the present utility model;
Fig. 2 is the circuit connection diagram of mine sensors demultiplexer of the present utility model.
Embodiment
As shown in Figure 1, comprise frequency input circuit, first voltage follower circuit, frequently conversion circuit is pressed, second voltage follower circuit, subtraction circuit, V-I circuit, first frequency output circuit, second frequency output circuit, the signal output part of frequency input circuit connects the signal input part of the first voltage follower circuit, the signal output part of the first voltage follower circuit connects the signal input part of first frequency output circuit respectively, the signal input part of second frequency output circuit, frequently the signal input part of pressure conversion circuit, frequently the signal output part of pressure conversion circuit connects the signal input part of the second voltage follower circuit, the signal output part of the second voltage follower circuit connects the signal input part of subtraction circuit, the signal output part of subtraction circuit connects the signal input part of V-I circuit, the signal output part of V-I circuit connects the mining equipment adopting electric current input and output standard,
Frequency input circuit is used for the frequency signal of input oppositely to amplify, and the amplitude of frequency signal is improved;
First voltage follower circuit, for reducing the output resistance of frequency signal, improves driving force, ensures and the docking of the receiving circuit of follow-up channelized frequencies signal;
Frequently pressure conversion circuit is used for the frequency signal of reception to change into voltage signal;
Second voltage follower circuit is for reducing the output resistance of voltage signal;
Subtraction circuit be used for by second voltage follower circuit export voltage be processed into be suitable for V-I processing of circuit magnitude of voltage;
V-I circuit is used for the voltage signal of reception to change into current signal, and finally exports;
First frequency output circuit, second frequency output circuit are for amplifying the frequency signal of reception, and reduce output resistance, while realizing frequency signal, multichannel is uploaded simultaneously.
As shown in Figure 2, the utility model mine sensors demultiplexer circuit comprises resistance R1 to resistance R21, electric capacity C1 to electric capacity C5, the first triode Q1, the second triode Q2, the 3rd triode Q3 the 4th triode Q4, the 5th triode Q5, the 6th triode Q6, the first operational amplifier IC2A, the second operational amplifier IC2B, the 3rd operational amplifier IC2C, four-operational amplifier IC2D, photovoltaic conversion chip IC 0, voltage-frequency conversion chip IC1, the first rheostat W1, the second rheostat W2, the first diode D1, the second diode D2, the 3rd diode D3; Be interconnected to form power circuit, frequency input circuit, the first voltage follower circuit between above-mentioned components and parts, frequently press conversion circuit, the second voltage follower circuit, subtraction circuit, V-I circuit, first frequency output circuit, second frequency output circuit;
Power circuit comprises photovoltaic conversion chip IC 0, electric capacity C4, electric capacity C5, photovoltaic conversion chip first pin 1 is through electric capacity C4 ground connection, photovoltaic conversion chip second pin 2 is through electric capacity C5 ground connection, photovoltaic conversion chip the 3rd pin 3 ground connection, photovoltaic conversion chip first pin 1 inputs 18V voltage, and photovoltaic conversion chip second pin 2 exports 9V voltage; Photovoltaic conversion chip IC 0 is for becoming 9V voltage by 18V photovoltaic conversion, and photovoltaic conversion chip IC 0 model is LM78L09, adopts that this chip performance is reliable, convenient, structure is simple, and low price;
Frequency input circuit comprises resistance R1, resistance R2, resistance R3, the first triode Q1 form frequency input circuit, ground connection after base series resistor R2, the resistance R1 of the first triode Q1, the transmitter ground connection of the first triode Q1, the collector electrode of the first triode Q1 meets power vd D through resistance R3; Frequency signal is inputted by the exit (i.e. frequency signal input end) between resistance R1, resistance R2, is exported by the collector electrode (i.e. frequency signal output) of the first triode Q1;
First voltage follower circuit is made up of four-operational amplifier IC2D, four-operational amplifier reverse input end 2 is connected with the 3rd pin 3, namely four-operational amplifier in-phase input end 1 is the input of the first voltage follower circuit, and namely four-operational amplifier output 3 is the output of the first voltage follower circuit;
Frequently pressure conversion circuit comprises electric capacity C1, electric capacity C2, electric capacity C3, resistance R4, resistance R5, resistance R6, resistance R7, the first rheostat W1, the chip IC 1 of pressure conversion frequently; Frequently pressure transforms chip first pin 1 through electric capacity C2 ground connection, resistance R7 is connected in parallel on electric capacity C2 two ends, frequently pressure transforms chip second pin 2 through the first rheostat W1 ground connection, frequently pressure transforms chip the 3rd pin 3, the 4th pin 4 ground connection, frequently pressure transforms chip the 5th pin 5 and meets power vd D through resistance R6, frequently pressure transforms chip the 5th pin 5 through electric capacity C3 ground connection, frequently pressure transforms chip the 6th pin 6 and meets power vd D through resistance R4, frequently pressure transforms chip the 7th pin 7 and meets power vd D through resistance R5, and pressure transforms chip the 8th pin 8 and meets power vd D frequently; Frequently pressure transforms one end that chip the 6th pin 6 meets electric capacity C1, and namely the other end of electric capacity C1 is the signal input part of pressure conversion circuit frequently, and pressure transforms the signal output part that namely chip first pin 1 is pressure conversion circuit frequently frequently; Can be changed the conversion range of pressure conversion circuit frequently accordingly by the size adjusting the first rheostat W1, pressure transforms chip IC 1 model is frequently LM331;
Second voltage follower circuit is made up of the 3rd operational amplifier IC2C, 3rd operational amplifier reverse input end 2 is connected with the 3rd pin 3, namely 3rd operational amplifier in-phase input end 1 is the input of the second voltage follower circuit, and namely the 3rd operational amplifier output terminal 3 is the output of the second voltage follower circuit;
Subtraction circuit comprises the first operational amplifier IC2A, resistance R8, resistance R9, resistance R10, resistance R11, first operational amplifier in-phase input end 1 meets VDD through resistance R9, first operational amplifier in-phase input end 1 through resistance R11 ground connection, the indirect resistance R10 of the first operational amplifier reverse input end 2, the 3rd pin 3; One end of first operational amplifier reverse input end 2 connecting resistance R8, namely the other end of resistance R8 is the signal input part of subtraction circuit, and namely the first operational amplifier output terminal 3 is the signal output part of subtraction circuit;
V-I circuit comprises the second operational amplifier IC2B, resistance R12, resistance R13, the second rheostat W2, the second triode Q2, the first diode D1, second operational amplifier reverse input end 2 connects the emitter of the second triode Q2, the base stage of the second triode Q2 is connect after second operational amplifier output terminal 3 series resistance R12, the collector electrode of the second triode Q2 connects the positive pole of the first diode D1, and the emitter of the second triode Q2 is connected successively after the second rheostat W2, resistance R13 and met power vd D; Namely second operational amplifier in-phase input end 1 is the signal input part of V-I circuit, and namely the negative pole of the first diode D1 is the signal output part of V-I circuit;
First frequency output circuit comprises resistance R14, resistance R15, resistance R16, resistance R17, the 3rd triode Q3, the 4th triode Q4, the second diode D2,3rd transistor emitter ground connection, power vd D is met after 3rd transistor collector series resistance R15, the 4th transistor base is connect after 3rd transistor collector series resistance R16,4th transistor emitter meets power vd D, connects the positive pole of the second diode D2 after the 4th transistor collector series resistance R17; One end of 3rd transistor base connecting resistance R14, namely the other end of resistance R14 is the signal input part of first frequency output circuit, and namely the negative pole of the second diode D2 is the signal output part of first frequency output circuit;
Second frequency output circuit comprises resistance R18, resistance R19, resistance R20, resistance R21, the 5th triode Q5, the 6th triode Q6, the 3rd diode D3,5th triode transmitter ground connection, power vd D is met after 5th transistor collector series resistance R19, the 6th transistor base is connect after 5th transistor collector series resistance R20,6th transistor emitter meets power vd D, connects the positive pole of the 3rd diode D3 after the 6th transistor collector series resistance R21; One end of 5th transistor base connecting resistance R18, namely the other end of resistance R18 is the signal input part of second frequency output circuit, and namely the negative pole of the 3rd diode D3 is the signal output part of second frequency output circuit.
The four high guaily unit integrated device that the first operational amplifier IC2A in above-described embodiment, the second operational amplifier IC2B, the 3rd operational amplifier IC2C and four-operational amplifier IC2D can be preferably LM324 by model replaces, according to the annexation of Fig. 2, corresponding by the pin place in circuit of LM324, make circuit structure simpler.
In practical application when frequency signal inputs the utility model mine sensors demultiplexer, first after frequency signal is oppositely amplified by the first triode Q1 in frequency input circuit, the output resistance of signal is reduced again through the first voltage follower process, to realize the multipath reception of frequency signal, after being unlikely to multipath reception, level is drawn too low; Direct three tunnels that are divided into by frequency signal process afterwards, wherein two-way forwards first frequency output circuit, second frequency output circuit respectively to, two-way medium frequency signal sends into corresponding the 4th triode Q4, the 6th triode Q6 respectively after the 3rd triode Q3, the anti-phase amplification of the 5th triode Q5, reduce output resistance, be convenient to frequency signal be detected when frequency signal reception equipment connects below, realize multichannel simultaneously and upload; Another road is that frequency signal changes into current signal, first frequency signal enters pressure conversion circuit frequently and changes into voltage signal, after the second voltage follower circuit, subtraction circuit process, send into V-I circuit afterwards successively change into the output of corresponding current signal, current signal exports between 4-20mA.
Above-described embodiment is only be described preferred implementation of the present utility model; not scope of the present utility model is limited; under the prerequisite not departing from the utility model design spirit; the various distortion that those of ordinary skill in the art make the technical solution of the utility model and improvement, all should fall in protection range that the utility model claims determine.

Claims (8)

1. a mine sensors demultiplexer, is characterized in that comprising frequency input circuit, the first voltage follower circuit, frequently pressing conversion circuit, the second voltage follower circuit, subtraction circuit, V-I circuit, first frequency output circuit, second frequency output circuit;
The signal output part of frequency input circuit connects the signal input part of the first voltage follower circuit, the signal output part of the first voltage follower circuit connects the signal input part of first frequency output circuit, the signal input part of the signal input part of second frequency output circuit, frequently pressure conversion circuit, frequently the signal output part of pressure conversion circuit connects the signal input part of the second voltage follower circuit, the signal output part of the second voltage follower circuit connects the signal input part of subtraction circuit, and the signal output part of subtraction circuit connects the signal input part of V-I circuit;
Frequency input circuit is used for the frequency signal of input oppositely to amplify, and the amplitude of frequency signal is improved;
First voltage follower circuit, for reducing the output resistance of frequency signal, improves driving force, ensures and the docking of the receiving circuit of follow-up channelized frequencies signal;
Frequently pressure conversion circuit is used for the frequency signal of reception to change into voltage signal;
Second voltage follower circuit is for reducing the output resistance of voltage signal;
The voltage that subtraction circuit is used for the second voltage follower circuit exports is processed into the magnitude of voltage being suitable for V-I processing of circuit;
V-I circuit is used for the voltage signal of reception to change into current signal, and finally exports;
First frequency output circuit, second frequency output circuit, for amplifying the frequency signal of reception, reduce output resistance simultaneously.
2. mine sensors demultiplexer according to claim 1, it is characterized in that, described frequency input circuit comprises resistance R1, resistance R2, resistance R3, the first triode (Q1) form frequency input circuit, ground connection after base series resistor R2, the resistance R1 of the first triode (Q1), the transmitter ground connection of the first triode (Q1), the collector electrode of the first triode (Q1) meets power vd D through resistance R3.
3. mine sensors demultiplexer according to claim 2, it is characterized in that, described frequency pressure conversion circuit comprises electric capacity C1, electric capacity C2, electric capacity C3, resistance R4, resistance R5, resistance R6, resistance R7, the first rheostat (W1), frequently pressure conversion chip (IC1), frequently pressure transforms chip first pin (1) through electric capacity C2 ground connection, resistance R7 is connected in parallel on electric capacity C2 two ends, frequently pressure transforms chip second pin (2) through the first rheostat (W1) ground connection, frequently pressure transforms chip the 3rd pin (3), 4th pin (4) ground connection, frequently pressure transforms chip the 5th pin (5) and meets power vd D through resistance R6, frequently pressure transforms chip the 5th pin (5) through electric capacity C3 ground connection, frequently pressure transforms chip the 6th pin (6) and meets power vd D through resistance R4, frequently pressure transforms chip the 7th pin (7) and meets power vd D through resistance R5, frequently pressure transforms chip the 8th pin (8) and meets power vd D, frequently pressure transforms one end that chip the 6th pin (6) meets electric capacity C1.
4. mine sensors demultiplexer according to claim 3, it is characterized in that, described subtraction circuit comprises the first operational amplifier (IC2A), resistance R8, resistance R9, resistance R10, resistance R11, first operational amplifier in-phase input end (1) meets VDD through resistance R9, first operational amplifier in-phase input end (1) through resistance R11 ground connection, the indirect resistance R10 of the first operational amplifier reverse input end (2), output (3); One end of first operational amplifier reverse input end (2) connecting resistance R8.
5. mine sensors demultiplexer according to claim 4, it is characterized in that, described V-I circuit comprises the second operational amplifier (IC2B), resistance R12, resistance R13, second rheostat (W2), second triode (Q2), first diode (D1), second operational amplifier reverse input end (2) connects the emitter of the second triode (Q2), the base stage of the second triode (Q2) is connect after second operational amplifier output terminal (3) series resistance R12, the collector electrode of the second triode (Q2) connects the positive pole of the first diode (D1), the emitter of the second triode (Q2) is connected the second rheostat (W2) successively, power vd D is met after resistance R13.
6. mine sensors demultiplexer according to claim 5, it is characterized in that, described first frequency output circuit comprises resistance R14, resistance R15, resistance R16, resistance R17, 3rd triode (Q3), 4th triode (Q4), second diode (D2), 3rd transistor emitter ground connection, power vd D is met after 3rd transistor collector series resistance R15, the 4th transistor base is connect after 3rd transistor collector series resistance R16, 4th transistor emitter meets power vd D, the positive pole of the second diode (D2) is connect after 4th transistor collector series resistance R17, one end of 3rd transistor base connecting resistance R14.
7. mine sensors demultiplexer according to claim 6, it is characterized in that, the four high guaily unit integrated device that described first operational amplifier (IC2A), the second operational amplifier (IC2B), the 3rd operational amplifier (IC2C) and four-operational amplifier (IC2D) can be LM324 by a model replaces.
8. mine sensors demultiplexer according to claim 6, is characterized in that, the model that described frequency pressure transforms chip (IC1) is LM331.
CN201420433273.0U 2014-08-01 2014-08-01 Mine sensors demultiplexer Withdrawn - After Issue CN204089842U (en)

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Application Number Priority Date Filing Date Title
CN201420433273.0U CN204089842U (en) 2014-08-01 2014-08-01 Mine sensors demultiplexer

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Application Number Priority Date Filing Date Title
CN201420433273.0U CN204089842U (en) 2014-08-01 2014-08-01 Mine sensors demultiplexer

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Publication Number Publication Date
CN204089842U true CN204089842U (en) 2015-01-07

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CN201420433273.0U Withdrawn - After Issue CN204089842U (en) 2014-08-01 2014-08-01 Mine sensors demultiplexer

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104135373A (en) * 2014-08-01 2014-11-05 淮南润成科技股份有限公司 Mining sensor signal separator

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104135373A (en) * 2014-08-01 2014-11-05 淮南润成科技股份有限公司 Mining sensor signal separator
CN104135373B (en) * 2014-08-01 2017-10-31 淮南润成科技股份有限公司 Mine sensors demultiplexer

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Granted publication date: 20150107

Effective date of abandoning: 20171031