CN204028945U

CN204028945U - Hand shape based on DSP and palm vein multimodal recognition device

Info

Publication number: CN204028945U
Application number: CN201420509400.0U
Authority: CN
Inventors: 刘富; 刘慧颖; 李温温; 高雷; 任桐慧
Original assignee: Jilin University
Current assignee: Jilin University
Priority date: 2014-09-05
Filing date: 2014-09-05
Publication date: 2014-12-17
Anticipated expiration: 2024-09-05

Abstract

Hand shape based on DSP and a palm vein multimodal recognition device, belong to electronic device field.The utility model provides a kind of hand shape and palm vein acquisition system based on DSP, has overcome the shortcoming that traditional acquisition system volume is large, processing speed is slow, has increased practicality and the portable hand shape based on DSP and the palm vein multimodal recognition device of system.The utility model is made up of image acquisition part, image processing section, logic control part and result display section.The utlity model has flexible in programming, integrated level is high, the cycle of designing and developing is short, the scope of application is wide, developing instrument is advanced, design and manufacture cost is low, require low, standardized product without features such as test, strong security, price are popular to deviser's hardware experience, the integrated as required logic element of complex digital circuitry, because inside is with flash that can be repeatedly erasable, therefore can repeatedly programme, thus, only need update routine and just can realize different functions without changing external circuit.The sequential of CPLD control chip work.

Description

Hand shape based on DSP and palm vein multimodal recognition device

Technical field

The utility model belongs to electronic device field.

Background technology

In today of scientific and technical fast development, information security comes into one's own all the more, and traditional identity recognizing technology cannot meet our demand for security.Hand shape and palm vein are as biological characteristic, there is higher uniqueness, the two combines, and can effectively complete people's authentication and identification, therefore develops a set of complete reliable hand shape and palm vein identification device and has very high theoretical research and practical application meaning.

Existing hand shape or palm vein acquisition system are sent to image in PC mainly with CCD or cmos camera connection image pick-up card greatly.And PC has the shortcomings such as bulky, cost is higher, processing speed is slow, bring very large inconvenience to user.

Summary of the invention

The utility model provides a kind of hand shape and palm vein acquisition system based on DSP, has overcome the shortcoming that traditional acquisition system volume is large, processing speed is slow, has increased practicality and the portable hand shape based on DSP and the palm vein multimodal recognition device of system.

The utility model is made up of image acquisition part, image processing section, logic control part and result display section;

Image acquisition part is that the CCD camera and the Video Decoder that are connected by video line form, the video output YOUT pin of Video Decoder and VP0D, the VP1D pin of digital signal processor are connected, the SCLK clock pin of video encoder and VP0CLK0, the VP1CLK0 pin of digital signal processor are connected, the INTREQ pin of Video Decoder is connected with digital signal processor VP0CTL, VP1CTL synchronizing signal pin, and SCL, the SDA pin of SCL, SDA pin and the digital signal processor of Video Decoder are connected;

The D pin of A, B pin and the digital signal processor of the programmable logic device in logic control part is connected, A20, B19 pin and the digital signal processor of programmable logic device , pin connects, the CE3 of A21, B21 pin and the digital signal processor of programmable logic device, pin connects; The D data pin of A, B pin and the high speed flash memory of programmable logic device is connected, and the A pin of A22, B22, A23 and the high speed flash memory of programmable logic device is connected, A, B pin and the high speed flash memory of programmable logic device , , , pin electric wire connects;

The EA address wire pin of successively with four synchronous DRAMs of EA address wire pin of digital signal processor is connected; The ED data line pin of digital signal processor and the ED data line pin of synchronous DRAM sheet one are connected; The ED data line pin of digital signal processor and the ED data line pin of synchronous DRAM sheet two are connected; The ED data line pin of digital signal processor is connected with the ED data line pin of synchronous DRAM sheet three successively; The ED data line pin of digital signal processor is connected with the ED data line pin of synchronous DRAM sheet four successively; Digital signal processor , , , and clock interface CLKMEM pin is successively with synchronous DRAM , , , WE, CLK pin connect; BE1, the BE0 pin of digital signal processor are connected with DQM1, the DQM0 pin of synchronous DRAM successively, and EA17, the EA18 pin of digital signal processor are connected with BA0, the BA1 address signal pin of synchronous DRAM successively; The ED data line pin of digital signal processor is connected with A address wire pin with the D data line pin of high speed flash memory successively with EA address wire pin, digital signal processor , pin is successively with high speed flash memory , pin connects;

The SCLK clock pin of video encoder and VP0CLK0, the VP1CLK0 pin of digital signal processor are connected, the INTREQ pin of Video Decoder is connected with digital signal processor VP0CTL, VP1CTL pin, and SCL, the SDA pin electric wire of SCL, SDA pin and the digital signal processor of Video Decoder are connected.

The beneficial effects of the utility model are:

1. hand shape and the palm vein multimodal recognition system based on DSP described in the utility model adopts the digital signal processor that model is TMS320DM642, that American TI Company is released high-performance digital signal processor, its core is C6416 type high-performance digital signal processor, there is extremely strong handling property, dirigibility and the programmability of height, simultaneously peripheral integrated very complete audio frequency, the equipment such as video and network service and interface. when being operated under the clock frequency of 720M hertz, its handling property reaches as high as 5760MI/s, contain direct memory access controller (DMA), external memory interface (EMIF), multichannel buffer serial port (McBSP), USB (universal serial bus) (USB) module, the abundant peripheral hardware resources such as I2C bus module, facilitate user's exploitation, reduce the difficulty of work.

2. the programmable logic device (CPLD) that hand shape based on DSP described in the utility model and palm vein multimodal recognition system adopt has flexible in programming, integrated level is high, the cycle of designing and developing is short, the scope of application is wide, developing instrument advanced person, design and manufacture cost is low, require low to deviser's hardware experience, standardized product is without test, strong security, the features such as price is popular, the integrated as required logic element of complex digital circuitry, because inside is with flash that can be repeatedly erasable, therefore can repeatedly programme, thus, only need update routine and just can realize different functions without changing external circuit.The sequential of CPLD control chip work.

3. the demoder that the model that hand shape based on DSP described in the utility model and palm vein multimodal recognition system adopt is TVP5150 is that a use is simple and easy, super low-power consumption, encapsulate minimum digital video decoder, use single 14.31818MHz clock just can realize the decoding of the various standards of PAL/NTSC/SECAM.Because the image that imageing sensor collects is analog video signal, can not be directly inputted in DSP and process, the effect of TVP5150 scrambler is exactly that the analog video signal collecting is encoded into digital signal, then is defeated by digital signal processor (DSP).Because digital signal processor (DSP) interior storage capacity is limited, thus the synchronous DRAM (SDRAM) that digital signal processor (DSP) need to extend out, in order to the image information of storage of collected.The proper vector of high speed flash memory (FLASH) for extracting before storing, at matching stage, digital signal processor (DSP) is got the deblocking in SDRAM in its internal RAM, mate with the proper vector that gathers in advance extraction in FLASH as the ephemeral data of palm vein image processing and recognizer and by result, finally by liquid crystal display Identification display result.

Brief description of the drawings

Fig. 1 is the utility model digital signal processor (DSP) circuit theory diagrams;

Fig. 2 is the utility model image acquisition sequential, logic control partial circuit schematic diagram;

Fig. 3 is the circuit diagram between the utility model digital signal processor and synchronous DRAM;

Fig. 4 is the circuit diagram between the utility model digital signal processor and scrambler;

Fig. 5 is the circuit diagram between the utility model digital signal processor and ultrasonic wave module, keyboard;

Fig. 6 is the utility model structural principle schematic block diagram.

Embodiment

Below in conjunction with accompanying drawing, the utility model is described in detail:

The utility model comprises the Video Decoder that CCD camera and model are TVP5150, CCD camera and model are to connect by video line between the Video Decoder of TVP5150, are that electric wire connects between the digital signal processor that the Video Decoder that model is TVP5150 and model are TMS320DM642.

The described hand shape based on DSP and palm vein multimodal recognition system comprise that hand shape and palm vein image collecting part, hand shape and palm vein image processing section, result display section and hand shape and palm vein image gather sequential, logic control part.Described hand shape and palm vein image processing section comprise that model is the digital signal processor of TMS320DM642, the synchronous DRAM that model is IS42S16400, the high speed flash memory that model is AM29LV033, and the synchronous DRAM that the digital signal processor that model is TMS320DM642 is IS42S16400 with model, the high speed flash memory that model is AM29LV033 are that electric wire is connected.Described hand shape and the result display section of palm vein recognition system comprise that model is video encoder and the simulated solution crystal display screen of SAA7121, is connected by video line between the video encoder that model is SAA7121 and simulated solution crystal display screen.

Described hand shape image gathers sequential, logic control part adopts the programmable logic device that model is EPM240T100C5N, is electric wire connection between the decoding chip that the programmable logic device that model is EPM240T100C5N and model are TVP5150, the high speed flash memory that model is AM29LV033.

The AIP1A signal input pin of the Video Decoder that the pal mode picture signal of the CCD camera output described in technical scheme is TVP5150 with model is connected by video line, is translated into the digital video signal of the ITU-R BT656 form of 8 bit, model is to refer to for electric wire connects between the Video Decoder of TVP5150 and digital signal processor that model is TMS320DM642: the video output YOUT[7:0 of the Video Decoder that model is TVP5150] VP0D[9:2 of the pin digital signal processor that is TMS320DM642 with model] (VP1D[9:2]) pin electric wire is connected, model is the VP0CLK0(VP1CLK0 of the SCLK clock pin of the video encoder of the TVP5150 digital signal processor that is TMS320DM642 with model) pin electric wire is connected, model is that digital signal processor VP0CTL (VP1CTL) the pin electric wire that the INTREQ pin of the Video Decoder of TVP5150 is TMS320DM642 with model is connected, model is the SCL of the Video Decoder of TVP5150, SDA pin and model are the SCL of the digital signal processor of TMS320DM642, SDA pin electric wire connects, by resistance R 1(R2) be pulled to 3.3V power supply, between the high speed flash memory that described model is the programmable logic device of EPM240T100C5N and digital signal processor that model is TMS320DM642, model is AM29LV033, refer to for electric wire connects: the A[10:13 of the programmable logic device that model is EPM240T100C5N], B[10:13] D[0:7 of the pin digital signal processor that is TMS320DM642 with model] data pin electric wire is connected, model is the A[10:13 of the programmable logic device of EPM240T100C5N], B[10:13] D[0:7 of the pin high speed flash memory that is AM29LV033 with model] data pin electric wire is connected, model is the A[19:21 of A22, B22, A23 and the model of the programmable logic device of the EPM240T100C5N high speed flash memory that is AM29LV033] pin is connected, the A[19:20 of the programmable logic device that model is EPM240T100C5N], B[19:20] pin and the model high speed flash memory that is AM29LV033 , , , pin electric wire connects, model is A20, B19 pin and the model of the programmable logic device of the EPM240T100C5N digital signal processor that is TMS320DM642 , pin connects, the CE3 of the digital signal processor that A21, B21 pin and the model of the programmable logic device that model is EPM240T100C5N is TMS320DM642, pin connects, model is that the electric wire between the digital signal processor of TMS320DM642 and synchronous DRAM that model is IS42S16400 connects and refers to: the EA[16:3 of the digital signal processor that model is TMS320DM642] EA[16:3 of successively with four models of address wire pin synchronous DRAM that is IS42S16400]] address wire pin electric wire is connected, model is the ED[15:0 of the digital signal processor of TMS320DM642] ED[15:0 of the data line pin synchronous DRAM sheet one that is IS42S16400 with model] data line pin electric wire is connected, model is the ED[16:31 of the digital signal processor of TMS320DM642] ED[15:0 of the data line pin synchronous DRAM sheet two that is IS42S16400 with model] data line pin electric wire is connected, model is the ED[32:47 of the digital signal processor of TMS320DM642] ED[15:0 of the data line pin synchronous DRAM sheet three that is IS42S16400 with model successively] data line pin electric wire is connected, model is the ED[48:63 of the digital signal processor of TMS320DM642] ED[15:0 of the data line pin synchronous DRAM sheet four that is IS42S16400 with model successively] data line pin electric wire is connected, model is the digital signal processor of TMS320DM642 , , , and clock interface CLKMEM pin is successively with the model synchronous DRAM that is IS42S16400 , , , WE, CLK pin electric wire connect, model is that the BE1 of the model of the digital signal processor of the TMS320DM642 digital signal processor that is TMS320DM642, DQM1, the DQM0 pin electric wire of synchronous DRAM that BE0 pin is IS42S16400 with model are successively connected, model is the EA[17:18 of the model of the digital signal processor of the TMS320DM642 digital signal processor that is TMS320DM642] BA[0:1 of the pin synchronous DRAM that is IS42S16400 with model successively] pin electric wire is connected, model is the ED[0:7 of the digital signal processor of TMS320DM642] data line pin and EA[3:21] address wire pin successively with the D[0:7 of the model high speed flash memory that is AM29LV033] data line pin and A[0:18] address wire pin electric wire is connected, the digital signal processor that model is TMS320DM642 , pin is successively with the model high speed flash memory that is AM29LV033 , pin electric wire connects.

Hand shape based on DSP described in the utility model and palm vein multimodal recognition system, owing to adopting DSP to complete, have volume little compared with conventional P C machine, convenient mobile advantage, thus realize automatically, the object of identification fast.Hand shape based on DSP and palm vein multimodal recognition system can be used in any place that need to verify to people's identity identification.The utility model has overcome the shortcomings such as tional identification mode (such as password, tag card, user name, PIN, password key, certificate etc.) is easily forged, easy loss well, has higher uniqueness, reliability and intelligent.Therefore can be widely used in work attendance, gate control system etc., the public place such as such as customs, airport, station, athletic meeting also can be utilized in addition.Identifying only need be extracted feature to the image that collects, then stores picture in database into registration phase and compares and just can complete identification, simple and fast, play and maintain order, ensure safe effect.

Consult Fig. 6, hand shape based on DSP and palm vein multimodal recognition system mainly comprise hand shape and palm vein image collecting part, and hand shape and palm vein image gather sequential, logic control part and hand shape and palm vein image is processed and result display section.

The demoder that described hand shape and palm vein image collecting part are mainly TVP5150 by CCD camera and model forms.

Model is that the demoder of TVP5150 is that a use is simple and easy, and super low-power consumption, encapsulates minimum digital video decoder, uses single 14.31818MHz clock just can realize the decoding of the various standards of PAL/NTSC/SECAM.Receive the view data that the image sensor chip of OV7670 transmits, and be converted into digital signal and be defeated by DSP and carry out subsequent treatment.

CCD camera and model are to connect by video line between the demoder of TVP5150, and the demoder that is TVP5150 for model provides write clock signal, the AIP1A signal input pin electric wire of the Video Decoder that the pal mode picture signal of CCD camera output is TVP5150 with model is connected, and TVP5150 is translated into the digital video signal of the ITU-R BT656 form of 8 bit.Model is that the digital signal processor electric wire that the demoder of TVP5150 is TMS320DM642 with model is connected, in the time that data acquisition completes, model is that digital signal is exported to the digital signal processor that model is TMS320DM642 by the demoder of TVP5150, model is the configuration that the digital signal processor of TMS320DM642 just can complete by I2C bus the register to CCD camera after system powers on, and realizes the initialization of CCD camera with this.Resistance R 1(R2 by 10K respectively on SCL and SDL) power supply that is connected to 3.3V realize I2C bus on draw.

2. the palm vein image described in gathers sequential, logic control part adopts the programmable logic device that model is EPM240T100C5N, is electric wire connection between the digital signal processor that the programmable logic device that model is EPM240T100C5N and model are TMS320DM642, the high speed flash memory that model is AM29LV033.Described hand shape image gathers sequential, logic control part essence is digital integrated circuit, by design circuit structure, and the control of the logic while realizing model and be the digital signal processor reading images of TMS320DM642.The palm vein image of the hand shape based on DSP and palm vein multimodal recognition system gathers sequential, logic control part adopts the programmable logic device (CPLD) that model is EPM240T100C5N, model is that the inner export structure of programmable logic device (CPLD) of EPM240T100C5N is programmable logic macrocell, , dirigibility is strong and the construction cycle is short, its basic design method is by Integrated Development software platform, with schematic diagram, the methods such as hardware description language, generate corresponding file destination, by download cable, code is sent in objective chip, realize the digital display circuit of design.

3. the palm vein image processing described in, result display section comprises that model is the digital signal processor of TMS320DM642, model is the synchronous DRAM (SDRAM) of IS42S16400, model is the high speed flash memory (FLASH) of AM29LV033, model is video encoder and the simulated solution crystal display screen of SAA7121, model is the digital signal processor limited storage space of TMS320DM642, the mass data producing for pilot process is not enough, so the digital signal processor peripheral expansion that model is TMS320DM642 data-carrier store and program storage, the synchronous DRAM (SDRAM) that four 8bit models are IS42S16400 is as the intermediate result of data memory serves access hand shape and palm vein image data and processing, model is that the high speed flash memory (FLASH) of AM29LV033 is used for memory image handling procedure ensure not lose after program power down as program storage.Between the high speed flash memory (FLASH) that model is the digital signal processor of TMS320DM642 and synchronous DRAM (SDRAM) that model is IS42S16400, model is AM29LV033, be that electric wire connects.Hand shape after the video decoder decodes that is TVP5150 via model and palm vein data are imported the digital signal processor that model is TMS320DM642 into, the digital signal processor that is TMS320DM642 by model completes a series of processes such as next image pre-service, feature space foundation, pattern match, then carry out D/A conversion via SAA7121 chip, video is outputed to simulated solution crystal display screen with analog video PAL standard coding, observe and show result.

Consult Fig. 1, model is for electric wire is connected between the digital signal processor (DSP) of TMS320DM642 and Video Decoder that model is TVP5150, TVP5150A is a kind of low-power chip, core voltage and input/output voltage are for being respectively 1.8V and 3.3V, and external clock frequency is 14.318MHz or 27MHz.TVP5150A expansion, at video port VP0 and the VP1 of DM642, completes respectively the decoding work to hand shape image, palm vein image.It by CCD camera collection to pal mode vision signal be decoded into digital signal, input to DM642 with the ITU-R BT656 form of 8 bit.The corresponding connection of SDL, SCL of the digital signal processor that the data line pin SDL of TVP5150 is TMS320DM642 with model respectively with clock line pin SCL, and be pulled to 3.3V power supply via R1 (R2) 10K resistance.DM642 realizes configuration and the internally access of portion's register to TVP5150 Video Decoder by the SDL of I2C bus, SCL pin.The system clock pin SCLK of TVP5150 and the VPCLK pin of DM642 are connected, for DM642 provides clock signal.Due to system employing is the video output formats of ITU-R BT656, therefore without discrete synchronizing signal, so row, the field sync signal etc. of TVP5150, all without being connected with DM642, only need be connected the VPCTL control signal pin of the INTERQ pin of TVP5150 and DM642.

Consult Fig. 2, between the high speed flash memory that the digital signal processor that the programmable logic controller (PLC) (CPLD) that model is EPM240T100C5N is TMS320DM642 with model and model are AM29LV033 for electric wire is connected.Native system has selected the AM29LV033 chip of AMD company to expand as Flash, for program data.This chip capacity is 4M*8bit, voltage range 2.7 ~ 3.6V, and can realize and the seamless link of DM642.Control holds water , , , pin, could realize smoothly the read-write operation of DM642 to AM29LV033, below narration respectively: when DM642 is during from chip reading out data, need allow , , the moment level of three pins is respectively low level, low level, high level; And in the time that DM642 writes data to chip, must ensure , , the moment level of 3 pins is respectively low level, high level, low level.The address wire of AM29LV033 chip has 22 A[21:0], the address bus of DM642 only has 20 EA[22:3], therefore DM642 cannot travel through all address locations of Flash.In system, adopt CPLD device, just can address this problem, the address wire pin A[19:21 of AM29LV033 chip] be connected with the I/O pin of CPLD device and A22, the B22 of CPLD, A23 pin, by the high address that produces AM29LV033 chip at CPLD internal extended address register.

Consult Fig. 3, the digital signal processor of model TMS320DM642 expands by EMFIA the synchronous DRAM that 4 8bit models are IS42S16400, (SDRAM), and as data space.Address wire, the data line pin of the address wire pin EA of digital signal processor TMS320DM642, the synchronous DRAM that successively with four models of data line pin ED are IS42S16400 are connected realizes data transmission, the digital signal processor that model is TMS320DM642 , , , and clock interface CLKMEM pin is successively with the model synchronous DRAM that is IS42S16400 , , , WE, CLK pin electric wire connect; pin and pin is respectively the row, column address signal of SDRAM, for reading enable signal pin; EA17, the EA18 pin of digital signal processor TMS320DM642 are connected with BA0, the BA1 address signal pin electric wire of synchronous DRAM IS42S16400 successively, the selection by BA0, BA1 with multi-form 4 the Bank pieces just realizing SDRAM of combining; DQM1, the DQM0 byte enable pin electric wire of the BE1 of digital signal processor TMS320DM642, the synchronous DRAM that BE0 pin is IS42S16400 with model are successively connected, and realize the control to data I/O.

Consulting Fig. 4 digital signal processor TMS320DM642 controls SAA7121 scrambler by I2C bus. and encoder data wire pin SDL is connected with SDL, the SCL correspondence of digital signal processor respectively with clock line pin SCL, and is pulled to 3.3V power supply via 10K resistance R 3, R4.The PLXCLK[0:1 of SAA7121] VP2CLK[0:1 of clock pin and DSP] clock pin is connected, HSVGC, VSVGC, FSVGC are respectively the level of SAA7121, vertical, field sync signal pin, successively with the VP2CTL[0:2 of DSP] control signal is connected.Through DSP image after treatment by data pin VP2[2:9] export to SAA7121 scrambler, scrambler completes the coding to image, and export to simulated solution crystal display screen observe show result.

Consulting Fig. 5, to adopt model be the ultrasonic distance measuring module of HC-SR04, and the system that realizes is to gathering the automatic detection function of palm position.Control end (input) TRIG pin is connected with GP1, the GP2 pin of digital signal processor respectively with return terminal (output) ECHO pin.While having signal to return, by a high level of IO mouth ECHO output, the lasting time of high level is exactly that ultrasound wave is from being transmitted into the time of returning.The PIN[0:7 of 4*4 matrix keyboard] GP[7:14 of pin and DM642] pin is connected, and realizes the control that distinct program function is carried out.

Claims

1. the hand shape based on DSP and a palm vein multimodal recognition device, is characterized in that: be made up of image acquisition part, image processing section, logic control part and result display section;