CN204013446U - Hysteresis window comparator circuit - Google Patents
Hysteresis window comparator circuit Download PDFInfo
- Publication number
- CN204013446U CN204013446U CN201320606648.4U CN201320606648U CN204013446U CN 204013446 U CN204013446 U CN 204013446U CN 201320606648 U CN201320606648 U CN 201320606648U CN 204013446 U CN204013446 U CN 204013446U
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- CN
- China
- Prior art keywords
- comparator
- resistance
- window
- voltage
- diode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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Abstract
The utility model discloses a kind of hysteresis window comparator circuit, this circuit comprises window voltage, lower window voltage, signal input voltage, upper comparator, lower comparator, upper diode, lower diode, upper the first resistance, upper the second resistance, lower the first resistance and lower the second resistance; Upper window voltage is electrically connected to the positive terminal of upper comparator by upper the first resistance, lower window voltage is electrically connected to the negative pole end of lower comparator, the negative pole end of upper comparator is connected with signal input voltage, the positive terminal of lower comparator is connected with signal input voltage by lower the first resistance, and the output of the output of upper comparator and lower comparator also connects and form a delivery outlet.In this circuit of the utility model, the advantage of hysteresis comparator and window comparator is reasonably combined, whether can detect in real time input voltage is limited between two given voltages, if exceed given range, circuit can overturn automatically, and sluggish introducing of comparing has effectively improved interference free performance.
Description
Technical field
The utility model relates to field of power electronics, relates in particular to a kind of hysteresis window comparator circuit.
Background technology
Comparator is that input signal is differentiated and circuit relatively, although traditional single limit comparator has the features such as circuit is simple, sensitivity is high, its poor anti jamming capability.A kind of scheme that improves antijamming capability is to adopt hysteresis comparator.In addition, hysteresis comparator is added with the response speed that positive feedback can be accelerated comparator, because the positive feedback that hysteresis comparator adds is very strong, much better than more than the parasitic couplings in circuit, therefore hysteresis comparator also can be exempted the self-oscillation producing due to circuit parasitic coupling.
Single limit comparator and hysteresis comparator are when input voltage single direction changes, and whether an output voltage transition once, thereby can not detect input voltage and be limited between two given voltages.
Utility model content
For the weak point existing in above-mentioned technology, the utility model provides a kind of hysteresis window comparator circuit, this circuit can improve interference free performance by introducing sluggish comparison, accelerates relatively reversal rate, has eliminated circuit self-oscillation hidden danger to improve the stability of a system.
For achieving the above object, the utility model provides a kind of hysteresis window comparator circuit, comprises window voltage, lower window voltage, signal input voltage, upper comparator, lower comparator, upper diode, lower diode, upper the first resistance, upper the second resistance, lower the first resistance and lower the second resistance, described upper window voltage is electrically connected to the positive terminal of upper comparator by upper the first resistance, described lower window voltage is electrically connected to the negative pole end of lower comparator, the negative pole end of described upper comparator is connected with signal input voltage, the positive terminal of described lower comparator is connected with signal input voltage by lower the first resistance, the output of the output of described upper comparator and lower comparator also connects and forms a delivery outlet, described upper diode, upper the second resistance, between lower diode and lower the second resistance, form positive feedback loop, and described upper diode is connected with upper the second resistance, lower diode is connected with lower the second resistance.
Wherein, when described signal input voltage changes between upper window voltage and lower window voltage, described upper diode and lower diode all end, and on the output voltage of described delivery outlet, draw as high level.
Wherein, when described signal input voltage exceeds window voltage or lower window voltage, described upper diode and the equal conducting of lower diode and formation positive feedback, the output voltage upset of described delivery outlet is low level.
The beneficial effects of the utility model are: compared with prior art, the hysteresis window comparator circuit that the utility model provides, voltage by signal input voltage respectively and between upper window voltage and lower window voltage compares, and carry out conducting or cut-off by positive feedback loop compared result, this positive feedback loop has not only been accelerated relatively reversal rate, and effectively avoided the self-oscillation hidden danger that produces due to circuit parasitic coupling, improved the stability of circuit working.In this circuit, the advantage of hysteresis comparator and window comparator is reasonably combined, whether can detect in real time input voltage is limited between two given voltages, if exceed given range, circuit can overturn automatically, and sluggish introducing of comparing has effectively improved interference free performance.The utlity model has that circuit is simple, simple operation, highly sensitive, stable work in work and the feature such as applicability is strong.
Accompanying drawing explanation
Fig. 1 is the fundamental diagram of hysteresis window comparator circuit of the present utility model;
Fig. 2-3 are oscillogram when applied signal voltage surpasses upper window voltage in the utility model;
Fig. 4-5 are oscillogram when applied signal voltage surpasses lower window voltage in the utility model;
Fig. 6-9 are that the utility model and prior art are based on frequency converter current foldback circuit
Comparison of wave shape figure;
Figure 10-11 are that the utility model and prior art follow the trail of based on mains frequency the comparison of wave shape figure that circuit comparison frequency is followed the trail of.
Main element symbol description is as follows:
U1-A, upper comparator U1-B, lower comparator
D
1, upper diode D
2, lower diode
R
1, upper the first resistance R
2, upper the second resistance
R
3, lower the first resistance R
4, lower the second resistance
V
rH, upper window voltage V
rL, lower window voltage
V
i, applied signal voltage V
0, delivery outlet output voltage
Embodiment
In order more clearly to explain the utility model, below in conjunction with accompanying drawing, the utility model is further described.
Refer to Fig. 1, hysteresis window comparator circuit of the present utility model, comprises window voltage V
rH, lower window voltage V
rL, signal input voltage V
i, upper comparator U1-A, lower comparator U1-B, upper diode D
1, lower diode D
2, upper the first resistance R
1, upper the second resistance R
2, lower the first resistance R
3with lower the second resistance R
4; Upper window voltage V
rHby upper the first resistance R
1be electrically connected to lower window voltage V with the positive terminal of upper comparator U1-A
rLbe electrically connected to the negative pole end of upper comparator U1-A and signal input voltage V with the negative pole end of lower comparator U1-B
iconnect, the positive terminal of lower comparator U1-B is by lower the first resistance R
3with signal input voltage V
iconnect, the output of the output of upper comparator U1-A and lower comparator U1-B also connects and forms a delivery outlet, and the voltmeter of this delivery outlet is shown V
0, upper diode D
1, upper the second resistance R
2, lower diode D
2with lower the second resistance R
4between form positive feedback loop, and upper diode D
1with upper the second resistance R
2series connection, lower diode D
2with lower the second resistance R
4series connection.The supply voltage of upper comparator U1-A and lower comparator U1-B is provided by V-and V+.
Please further consult Fig. 1, as follows to the operation principle of the circuit in the utility model:
1) establishing output high level is V
oH, the output voltage V of initial value delivery outlet
o=V
oH, signal input voltage V
1at upper window voltage V
rHwith lower window voltage V
rLbetween while changing, V
oH> V
rH, upper diode D
1with lower diode D
2all cut-offs, relatively the voltage of output is V
oH.
2) as signal input voltage V
iexceed window, i.e. V
i>=V
rHtime, because of V
oL=V-, now goes up diode D
1with lower diode D
2conducting forms positive feedback, ignores diode D
1with lower diode D
2tube voltage drop, establish V
rH-for upper window V
rHsluggish lower threshold voltage:
,
Upper window noise gate width:
.
3) as signal input voltage V
iexceed lower window, i.e. V
i≤ V
rL, relatively export V
oL, because of V
oL=V-, now goes up diode D
1with lower diode D
2conducting forms positive feedback.Equally, ignore diode D
1with lower diode D
2tube voltage drop, at V
i=V
rLconstantly, establish V
rL+for lower window V
rLsluggish Upper threshold voltage is:
, can obtain:
, lower window noise gate width is:
Circuit of the present utility model, signal input voltage V
iwhile exceeding window voltage or lower window voltage, upper diode D
1with lower diode D
2all conducting and formation positive feedbacks, the output voltage V of delivery outlet
oupset is low level.
Please further consult Fig. 2,3,4 and 5, suppose signal input voltage V
ifor triangular wave, V
rH=+2.5V, V
rL=-2.5V, works as V
iwhen signal is crossed window voltage, record waveform as V in Fig. 2 and 3, Fig. 2
irise to V
rH=2.46V, V
odrag down; In Fig. 3, V
ibe down to V
rH-=2.06V, V
odraw high; Work as V
iwhen signal is crossed lower window voltage, record waveform as Figure 4 and 5, in Fig. 4, V
ibe down to V
rL=-2.51V, V
odrag down; In Fig. 5, V
irise to V
rL+=-2.03V, V
odraw high.
On measured waveform Fig. 2 and 3, window noise gate width is: V
rH-=2.46V-2.06V=0.4V; On measured waveform Figure 4 and 5, window noise gate width is: V
rL+-V
rL=-2.03-(-2.51)=0.48V.
From two picture groups above, can find out with aforementioned formula, when input signal is crossed window, theory analysis and experimental result are basically identical, but from data result, show and also have certain error, the reason that error produces has: 1) aforementioned mathematical expression has been ignored diode current flow pressure drop; 2) all there is measure error in signal input and even reference voltage in experimentation.
Below in conjunction with two specific embodiments, circuit of the present utility model is further described:
Embodiment mono-is for being applied in frequency converter current foldback circuit; current detection signal in frequency converter is often mingled with interference signal; these signal disturbances very easily cause false tripping overcurrent protection; the utility model is applied on AC70, AC70E Series Frequency Converter control board; system rejection to disturbance performance and stability have been improved; in actual job site, use steadily reliably, Fig. 6 and 7 is V
iwhen signal is crossed window voltage, AC70 series retarding window relatively compares the contrast of overcurrent protection oscillogram with other serial legacy windows, and Fig. 6 is the sluggish upper window comparison diagram of AC70 series, other serial upper window comparison diagram of Fig. 7.Fig. 8 and 9 is V
iwhen signal is crossed lower window voltage, Figure 10 is the sluggish upper window comparison diagram of AC70 series, the upper window comparison diagram of other series of Fig. 9, Fig. 7,9 promptings: when input signal disturbance, there is repeatedly upset in comparator output level, makes system occur frequent over current fault or do not reach flow point and produced wrong report phenomenon at actual current.
Fig. 6,8 promptings: only have actual current really to surpass window overvoltage, upset just appears in comparator output level; When input signal disturbance is in noise gate width, have no the repeatedly frequent over-current phenomenon avoidance of upset output.This scheme has been successfully applied to AC70 system frequency converter batch production, releases market, and the information feeding back to shows, overcurrent wrong report drops to current 0.12% by original 5.3%.
Embodiment bis-follows the trail of in circuit for being applied to mains frequency, photovoltaic DC-to-AC converter SIT500KTL, four limit frequency converters are in PWM rectification during in inverter operation, its feedback power frequency requires identical with mains frequency, mains frequency parameter is followed the trail of circuit by mains frequency and is obtained, but because electrical network is often mingled with interference signal, be conducted into detection input signal, make frequency tracking inaccurate.Hysteresis window comparator circuit application, after photovoltaic DC-to-AC converter and four limit frequency converters, has been obtained to frequency tracking accurately, and hysteresis window comparator has improved interference free performance and the response speed in this loop.Figure 10 and 11 is for adopting retarding window relatively to follow the trail of oscillogram contrast with legacy windows comparison frequency, Figure 10 is frequency tracking retarding window comparison diagram, Figure 11 is frequency tracking legacy windows comparison diagram, Figure 11 prompting: when input signal disturbance, there is repeatedly upset in comparator output level, makes the distortion of frequency tracking level counting; Obviously, Figure 10 has reflected actual upset number of times really, can make controller obtain frequency tracking accurately.
Above-mentioned is two specific embodiments of the present utility model, certainly, is not limited to this.In conjunction with specific embodiments, can find out the following advantage that the utlity model has: by signal input voltage V
irespectively with upper window voltage V
rHand the voltage between lower window voltage VRL compares, and by diode D on positive feedback loop
1, upper the second resistance R
2, lower diode D
2with lower the second resistance R
4compared result is carried out conducting or cut-off, and this positive feedback loop has not only been accelerated relatively reversal rate, and has effectively avoided the self-oscillation hidden danger that produces due to circuit parasitic coupling, has improved the stability of circuit working.In this circuit, the advantage of hysteresis comparator and window comparator is reasonably combined, whether can detect in real time input voltage is limited between two given voltages, if exceed given range, circuit can overturn automatically, and sluggish introducing of comparing has effectively improved interference free performance.The utlity model has that circuit is simple, simple operation, highly sensitive, stable work in work and the feature such as applicability is strong.
Disclosed is above only several specific embodiment of the present utility model, but the utility model is not limited thereto, and the changes that any person skilled in the art can think of all should fall into protection range of the present utility model.
Claims (1)
1. a hysteresis window comparator circuit, it is characterized in that, comprise window voltage, lower window voltage, signal input voltage, upper comparator, lower comparator, upper diode, lower diode, upper the first resistance, upper the second resistance, lower the first resistance and lower the second resistance, described upper window voltage is electrically connected to the positive terminal of upper comparator by upper the first resistance, described lower window voltage is electrically connected to the negative pole end of lower comparator, the negative pole end of described upper comparator is connected with signal input voltage, the positive terminal of described lower comparator is connected with signal input voltage by lower the first resistance, the output of the output of described upper comparator and lower comparator also connects and forms a delivery outlet, described upper diode, upper the second resistance, between lower diode and lower the second resistance, form positive feedback loop, and described upper diode is connected with upper the second resistance, lower diode is connected with lower the second resistance.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320606648.4U CN204013446U (en) | 2013-09-29 | 2013-09-29 | Hysteresis window comparator circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320606648.4U CN204013446U (en) | 2013-09-29 | 2013-09-29 | Hysteresis window comparator circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN204013446U true CN204013446U (en) | 2014-12-10 |
Family
ID=52053380
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201320606648.4U Expired - Lifetime CN204013446U (en) | 2013-09-29 | 2013-09-29 | Hysteresis window comparator circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN204013446U (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104348451A (en) * | 2013-09-29 | 2015-02-11 | 深圳市伟创电气有限公司 | Hysteresis window comparator circuit |
| CN105449744A (en) * | 2015-11-24 | 2016-03-30 | 上海空间电源研究所 | Hysteresis comparison circuit with fixed bandwidth |
| CN113640570A (en) * | 2021-07-07 | 2021-11-12 | 深圳市信瑞达电力设备有限公司 | Self-oscillation method and current measuring device for inductive load driving |
-
2013
- 2013-09-29 CN CN201320606648.4U patent/CN204013446U/en not_active Expired - Lifetime
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104348451A (en) * | 2013-09-29 | 2015-02-11 | 深圳市伟创电气有限公司 | Hysteresis window comparator circuit |
| CN105449744A (en) * | 2015-11-24 | 2016-03-30 | 上海空间电源研究所 | Hysteresis comparison circuit with fixed bandwidth |
| CN105449744B (en) * | 2015-11-24 | 2018-02-06 | 上海空间电源研究所 | The stagnant ring comparison circuit that a kind of bandwidth is fixed |
| CN113640570A (en) * | 2021-07-07 | 2021-11-12 | 深圳市信瑞达电力设备有限公司 | Self-oscillation method and current measuring device for inductive load driving |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| TR01 | Transfer of patent right | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20181109 Address after: 215000 No. 1000 Songhua Road, Guo Xiang street, Wuzhong Economic and Technological Development Zone, Suzhou, Jiangsu Patentee after: SUZHOU WEICHUANG ELECTRICAL EQUIPMENT TECHNOLOGY Co.,Ltd. Address before: 518000 Baoan District Shiyan street, Shenzhen, Guangdong Province, the third phase of the two phase Industrial Zone, C Patentee before: SHENZHEN VEICHI ELECTRIC CO.,LTD. |
|
| CP01 | Change in the name or title of a patent holder | ||
| CP01 | Change in the name or title of a patent holder |
Address after: 215000 No. 1000 Songhua Road, Guo Xiang street, Wuzhong Economic and Technological Development Zone, Suzhou, Jiangsu Patentee after: Suzhou Weichuang Electrical Technology Co.,Ltd. Address before: 215000 No. 1000 Songhua Road, Guo Xiang street, Wuzhong Economic and Technological Development Zone, Suzhou, Jiangsu Patentee before: SUZHOU WEICHUANG ELECTRICAL EQUIPMENT TECHNOLOGY Co.,Ltd. |
|
| CX01 | Expiry of patent term | ||
| CX01 | Expiry of patent term |
Granted publication date: 20141210 |