CN203968241U - A kind of time delay circuit of transmitter input signal - Google Patents

A kind of time delay circuit of transmitter input signal Download PDF

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Publication number
CN203968241U
CN203968241U CN201420384873.2U CN201420384873U CN203968241U CN 203968241 U CN203968241 U CN 203968241U CN 201420384873 U CN201420384873 U CN 201420384873U CN 203968241 U CN203968241 U CN 203968241U
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CN
China
Prior art keywords
resistance
output
operational amplifier
input signal
capacitor
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201420384873.2U
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Chinese (zh)
Inventor
郭学生
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CHENGDU TENG YUE ELECTRONICS Co Ltd
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CHENGDU TENG YUE ELECTRONICS Co Ltd
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Priority to CN201420384873.2U priority Critical patent/CN203968241U/en
Application granted granted Critical
Publication of CN203968241U publication Critical patent/CN203968241U/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Abstract

The utility model relates to digital broadcast television field, be specifically related to a kind of time delay circuit of transmitter input signal, the radio frequency electrically adjusted attenuator, operational amplifier and the control circuit that comprise electric connection, wherein the output of radio frequency electrically adjusted attenuator and operational amplifier is electrically connected, control circuit comprises resistance R 3 and resistance R 4 and capacitor C 2 and the diode D1 parallel with one another that input is all connected with power supply, the output of resistance R 3 connects two branch roads, article one, connect a resistance R 2, resistance R 2 output head groundings, the end of oppisite phase of another concatenation operation amplifier; The output of resistance R 4 connects two branch roads, and one connects described capacitor C parallel with one another 2 and diode D1, the input end grounding of diode D1, the in-phase end of another concatenation operation amplifier.The utility model can effectively control transmitter the impact of booting moment input signal to transmitter power amplifier, and then reaches the object of protection transmitter.

Description

A kind of time delay circuit of transmitter input signal
Technical field
The utility model relates to digital broadcast television field, is specifically related to a kind of time delay circuit of transmitter input signal.
Background technology
At present, the equipment of known control figure TV and radio emission machine input signal amplitude rising function is single channel exciter; And for multichannel, or single channel is while providing information source for many transmitters simultaneously, and existing equipment does not possess this function.Multichannel (broadband) TV and radio emission machine, complete machine gain is all very high, particularly wireless forwarding station.Because input signal is extremely faint, transmitting is in order to reach specified output microwave power, and often its complete machine ratio of gains optical fiber repeater is contour a lot.So high gain, at booting moment, as bad in the amplitude control of incoming signal level, be easy to cause burning of transmitter microwave power amplifier part.
Utility model content
For overcoming the above problems, the utility model proposes a kind of time delay circuit of transmitter input signal, effectively control transmitter the impact of booting moment input signal to transmitter power amplifier, and then reach the object of protection transmitter.
The technical solution of the utility model is achieved in that a kind of time delay circuit of transmitter input signal, the radio frequency electrically adjusted attenuator, operational amplifier and the control circuit that comprise electric connection, wherein the output of radio frequency electrically adjusted attenuator and operational amplifier is electrically connected, control circuit comprises resistance R 3 and resistance R 4 and capacitor C 2 and the diode D1 parallel with one another that input is all connected with power supply, the output of described resistance R 3 connects two branch roads, article one, connect a resistance R 2, described resistance R 2 output head groundings, the end of oppisite phase of another concatenation operation amplifier; The output of described resistance R 4 connects two branch roads, and one connects described capacitor C parallel with one another 2 and diode D1, the input end grounding of described diode D1, the in-phase end of another concatenation operation amplifier.
Further, described control circuit also comprises resistance R parallel with one another 1 and capacitor C 1, and one end of described capacitor C 1 is connected with the output of resistance R 3, is electrically connected together with the output of the other end and operational amplifier with radio frequency electrically adjusted attenuator.
Further, described operational amplifier adopts integrated operational amplifier LM258, and described integrated operational amplifier LM258 comprises eight pins, in these eight pins, includes a power interface.
Further, between the power interface of described operational amplifier and power supply, be connected with a capacitor C 3, these capacitor C 3 other end ground connection.
Further, described resistance R 3 and resistance R 2 are slide-changing resistor.
The utility model mainly utilizes the characteristic of operational amplifier in-phase end, backward end, output; voltage signal is controlled in output; control the pad value of radio frequency electrically adjusted attenuator to radiofrequency signal; thereby complete, the level amplitude of transmitter input signal is controlled; effectively control transmitter booting moment; the impact of input signal to transmitter power amplifier, and then reach the object of protecting transmitter.
Accompanying drawing explanation
In order to be illustrated more clearly in the utility model embodiment or technical scheme of the prior art, to the accompanying drawing of required use in embodiment or description of the Prior Art be briefly described below, apparently, accompanying drawing in the following describes is only embodiment more of the present utility model, for those of ordinary skills, do not paying under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is circuit theory diagrams of the present utility model.
Embodiment
Below in conjunction with the accompanying drawing in the utility model embodiment, the technical scheme in the utility model embodiment is clearly and completely described, obviously, described embodiment is only the utility model part embodiment, rather than whole embodiment.Embodiment based in the utility model, those of ordinary skills are not making the every other embodiment obtaining under creative work prerequisite, all belong to the scope of the utility model protection.
According to the time delay circuit of a kind of transmitter input signal shown in Fig. 1, it is characterized in that: the radio frequency electrically adjusted attenuator 10, operational amplifier 11 and the control circuit that comprise electric connection, wherein radio frequency electrically adjusted attenuator 10 is electrically connected with the output of operational amplifier 11, control circuit comprises resistance R 3 and resistance R 4 and capacitor C 2 and the diode D1 parallel with one another that input is all connected with power supply, the output of described resistance R 3 connects two branch roads, article one, connect a resistance R 2, described resistance R 2 output head groundings, the end of oppisite phase of another concatenation operation amplifier 11; The output of described resistance R 4 connects two branch roads, and one connects described capacitor C parallel with one another 2 and diode D1, the input end grounding of described diode D1, the in-phase end of another concatenation operation amplifier 11.U1 is the end of oppisite phase input voltage of operational amplifier 11, and U2 is the in-phase end input voltage of operational amplifier 11, and U3 is the output voltage of operational amplifier 11, is control signal voltage.
In transmitter-on moment, in-phase end and the equal no-voltage input of end of oppisite phase because of operational amplifier 11, so control signal voltage U 3 is low, be 0V, by the effect of radio frequency electrically adjusted attenuator 10, make to reach maximum at the pad value of booting moment input signal, then in control circuit, according to actual conditions, select the size of resistance R 2 and resistance R 3, making end of oppisite phase input voltage U1 is fixed value, capacitor C 2 is charged simultaneously, make the continuous increase of in-phase end input voltage U2 finally reach a stationary value, in the continuous increase of in-phase end input voltage U2, finally reach in the process of a stationary value, according to the in-phase end of operational amplifier 11, backward end, the characteristic of output, make control signal voltage U 3 constantly increase and reach a stationary value, so that the pad value of input signal is tending towards reducing, finally reach zero attenuation, thereby realized the time delay function of input signal.
Described control circuit also comprises resistance R parallel with one another 1 and capacitor C 1, and one end of described capacitor C 1 is connected with the output of resistance R 3, is electrically connected together with the output of the other end and operational amplifier 11 with radio frequency electrically adjusted attenuator 10.In practice, described operational amplifier 11 can adopt integrated operational amplifier LM258, and described integrated operational amplifier LM258 comprises eight pins, wherein pin 1 is output, and pin 2 is end of oppisite phase, and pin 3 is in-phase end, pin 4 is earth terminal, and pin 8 is power interface.Between the power interface of described operational amplifier 11 and power supply, be connected with a capacitor C 3, these capacitor C 3 other end ground connection.So, when powered-down, capacitor C 1, capacitor C 2, capacitor C 3 are all discharged, and capacitor C 1 and capacitor C 2 electric discharges are respectively used to the end of oppisite phase of operational amplifier 11 and the input of the voltage of in-phase end, and capacitor C 3 electric discharges are for the operation of operational amplifier 11.And described resistance R 3 and resistance R 2 are slide-changing resistor, can be used for regulating according to actual conditions the size of end of oppisite phase input voltage U1, to coordinate the time delay demand of the transmitter input signal of different needs.
The utility model mainly utilizes in-phase end, the backward end of operational amplifier 11, the characteristic of output; voltage signal is controlled in output; control the pad value of radio frequency electrically adjusted attenuator to radiofrequency signal; thereby complete, the level amplitude of transmitter input signal is controlled; effectively control transmitter booting moment; the impact of input signal to transmitter power amplifier, and then reach the object of protecting transmitter.
The foregoing is only preferred embodiment of the present utility model; not in order to limit the utility model; all within spirit of the present utility model and principle, any modification of doing, be equal to replacement, improvement etc., within all should being included in protection range of the present utility model.

Claims (5)

1. the time delay circuit of a transmitter input signal, it is characterized in that: the radio frequency electrically adjusted attenuator (10), operational amplifier (11) and the control circuit that comprise electric connection, wherein radio frequency electrically adjusted attenuator (10) is electrically connected with the output of operational amplifier (11), control circuit comprises resistance R 3 and resistance R 4 and capacitor C 2 and the diode D1 parallel with one another that input is all connected with power supply
The output of described resistance R 3 connects two branch roads, and one connects a resistance R 2, described resistance R 2 output head groundings, the end of oppisite phase of another concatenation operation amplifier (11);
The output of described resistance R 4 connects two branch roads, and one connects described capacitor C parallel with one another 2 and diode D1, the input end grounding of described diode D1, the in-phase end of another concatenation operation amplifier (11).
2. the time delay circuit of a kind of transmitter input signal according to claim 1, it is characterized in that: described control circuit also comprises resistance R parallel with one another 1 and capacitor C 1, one end of described capacitor C 1 is connected with the output of resistance R 3, is electrically connected together with the output of the other end and operational amplifier (11) with radio frequency electrically adjusted attenuator (10).
3. the time delay circuit of a kind of transmitter input signal according to claim 1 and 2: described operational amplifier (11) adopts integrated operational amplifier LM258, described integrated operational amplifier LM258 comprises eight pins, in these eight pins, includes a power interface.
4. the time delay circuit of a kind of transmitter input signal according to claim 3: be connected with a capacitor C 3 between the power interface of described operational amplifier (11) and power supply, these capacitor C 3 other end ground connection.
5. the time delay circuit of a kind of transmitter input signal according to claim 1, is characterized in that: described resistance R 3 and resistance R 2 are slide-changing resistor.
CN201420384873.2U 2014-07-12 2014-07-12 A kind of time delay circuit of transmitter input signal Expired - Fee Related CN203968241U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201420384873.2U CN203968241U (en) 2014-07-12 2014-07-12 A kind of time delay circuit of transmitter input signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201420384873.2U CN203968241U (en) 2014-07-12 2014-07-12 A kind of time delay circuit of transmitter input signal

Publications (1)

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CN203968241U true CN203968241U (en) 2014-11-26

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201420384873.2U Expired - Fee Related CN203968241U (en) 2014-07-12 2014-07-12 A kind of time delay circuit of transmitter input signal

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CN (1) CN203968241U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113381821A (en) * 2021-06-11 2021-09-10 董金星 Pre-driving level regulating box of broadcast transmitter

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113381821A (en) * 2021-06-11 2021-09-10 董金星 Pre-driving level regulating box of broadcast transmitter

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C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20141126

Termination date: 20170712