CN203965816U - A kind of timer for power frequency charging set reservation charging - Google Patents
A kind of timer for power frequency charging set reservation charging Download PDFInfo
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- CN203965816U CN203965816U CN201420372795.4U CN201420372795U CN203965816U CN 203965816 U CN203965816 U CN 203965816U CN 201420372795 U CN201420372795 U CN 201420372795U CN 203965816 U CN203965816 U CN 203965816U
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02E60/10—Energy storage using batteries
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Abstract
The utility model provides a kind of timer for power frequency charging set reservation charging, comprises single-chip microcomputer, clock circuit, key circuit, digitron display screen and output relay; Described single-chip microcomputer comprises STC12C5A60S2 chip, reset resistor R9 and crystal oscillating circuit, and described chip is connected with output relay with clock circuit, key circuit, digitron display screen respectively, and the output terminal of described output relay is connected with power frequency charging set.Timer of the present utility model can not change the reservation charge function of realizing power frequency charging set on the circuit board charge mode of existing power frequency charging set and hardware circuit, thereby can utilize fully night electricity consumption less, efficiency is high and use cost is low advantage sets in advance the time at night and charges, improve charge efficiency and also reduce electric cost.
Description
Technical field
The utility model relates to a kind of timer, is specifically related to a kind of timer for power frequency charging set reservation charging.
Background technology
Power frequency charging set adopts ampere-hour equilibrium charging technology, the Intelligent Dynamic of uses advanced is adjusted charging technique consumer is charged, its theory and structure is simple, use electronic devices and components are few, do not allow the interference that is subject to grid disturbance to be particularly suitable for working under severe working environment, reliability and stability are high, long service life, easy care.On market, the quantity of power frequency charging set accounts for major part at present.
Along with the development of market economy, commercial power is also more and more expensive, and country has released the policy of step price and the policy of Peak-valley TOU power price.Electricity consumption on daytime quantity is many, causes efficiency low, and power consumption is large; And night electricity consumption is few, efficiency is high and use cost is low, so user wishes to adopt night charging modes to charge to consumer.In addition, client also wish can according to oneself set time charge.But existing power frequency charging set is not with reservation charge function, can not charge according to client's setting-up time, cause the duration of charging to be restricted, impact is produced, and reduces work efficiency, and cost increases electric power.
Utility model content
The utility model, in order to solve the problems of the technologies described above, provides a kind of timer for power frequency charging set reservation charging, can increase work efficiency and reduce electric cost.
The technical solution of the utility model is: for the timer of power frequency charging set reservation charging, timer comprises single-chip microcomputer, clock circuit, key circuit, digitron display screen and output relay; Described single-chip microcomputer comprises STC12C5A60S2 chip, reset resistor R9 and crystal oscillating circuit, the 9th pin of described STC12C5A60S2 chip is connected with reset resistor R9, the 19th, 23 pin and the crystal oscillating circuit of chip are connected to form loop, and described crystal oscillating circuit is to be made up of crystal oscillator Y1 and capacitor C 5, C6; Described chip is connected with output relay with clock circuit, key circuit, digitron display screen respectively, and the output terminal of described output relay is connected with power frequency charging set.
Further, described single-chip microcomputer, clock circuit are all connected with two-stage feed circuit with the input end of output relay; In described two-stage feed circuit, first order circuit is that second level circuit is to be made up of voltage stabilizing chip 7805 and capacitor C 1, C2 by series with diode D2 after diode D1, stabilivolt Q5 and resistance R 1, R2 series connection; Described first order circuit is connected output 12V voltage with output relay, second level circuit is connected respectively output 5V voltage with described STC12C5A60S2 chip, clock circuit.
Further, described clock circuit comprises DS1302 clock chip, crystal oscillating circuit and button cell, and the 2nd, 3 pin and the crystal oscillating circuit of described clock chip are connected to form loop, and described crystal oscillating circuit is to be made up of crystal oscillator Y2 and capacitor C 3, C4; Between the 1st, 8 pin of clock chip, be connected in series a button cell; The the 7th, 6,5 pin of clock chip are connected and realize communication with the 1st, 2,3 pin of described STC12C5A60S2 chip respectively.
Further, described key circuit comprises five buttons in parallel, and described five buttons are connected with the the the 4th, 5,6,28,29 pin of described STC12C5A60S2 chip successively by current-limiting resistance respectively.Wherein three buttons are touch key, and another two is self-locking button.One is mode key, and this button can be realized the switching of demonstration, the three kinds of patterns in hour, minute; Second and third is plus-minus button; The 4th is clock/timing switching key; The 5th is timing/non-timed function switching key, in the time that the 5th button disconnects, opens timing function, only reaches timing output relay just closed; In the time that the 5th button is closed, open non-timed function, output relay is always closed.
Further, described digitron display screen comprises charactron and triode, and described charactron is connected with described STC12C5A60S2 chip by current-limiting resistance respectively with the input end of triode, and the output terminal of triode is connected with charactron.
Further, described charactron is four eight segment numeral pipes, and every section selects signal to be driven by a triode, realizes the dynamic demonstration of 24 hours forms, the corresponding positions of exporting when single-chip microcomputer selects signal to carry out its triode being connected of conducting, then this charactron of gating shows.
Further, output relay comprises relay K 1 and transistor drive circuit, and the two ends of the coil of described relay K 1 are anti-and connect a sustained diode 3, and the tip side of relay K 1 is connected with the output control line of the circuit board of power frequency charging set; Described transistor drive circuit comprises triode Q6, and one end of described triode Q6 is connected with the coil of described relay K 1, the second end is connected with the 7th pin of described STC12C5A60S2 chip, is connected in series a pull-up resistor R15 between the second end and the 3rd end by current-limiting resistance R14.
So the utility model, on the circuit board charge mode and hardware circuit that do not change existing power frequency charging set, by additional timer, is realized the charging reservation function of existing power frequency charging set.Wherein single-chip microcomputer, by gathering the signal of clock circuit and key circuit, is presented at clock information and timing information on digitron display screen in real time through STC12C5A60S2 chip; When reaching under subscription time or non-timed pattern, export charging control signal to charging set by output relay, realize reservation charging to start charging set.
Control because timer circuit mainly utilizes single-chip microcomputer and clock circuit combination, timing precisely, simple to operate; DS1302 clock chip in clock circuit adopts two-stage feed circuit and two kinds of power supply modes of button cell to power, thereby has ensured charging set also accurately timing under powering-off state.
In the utility model, timer adopts modular design, and it only has the peripheral wiring in 4 roads, installs more convenient.And charging set that can compatible existing various models, easy for installation, reliability is high.Existing timer can only be realized simple timing function in the market, and timer of the present utility model is the special regular module designing for battery charger specially.Its major advantage is as follows: the self-powered module of this timer, and voltage range 24V-100V, is suitable for the charging set of existing various electric pressures; This timer not only can be realized timing charging by button, also can realize reservation charging by the clock module of the inside, and two kinds of patterns can be switched mutually, and function is more powerful; This timer module modular design, integrates demonstration, key-press input, relay output, connects simply with outside charging set, is subject to the impact of peripheral environment little.
Power frequency charging set of the present utility model is owing to being connected with timer, the time that client can set according to oneself in use charges, thereby can utilize fully night electricity consumption less, efficiency is high and use cost is low advantage sets in advance the time at night and charges, improve charge efficiency and also reduce electric cost.
Brief description of the drawings
Below in conjunction with accompanying drawing, the utility model is described in further detail:
Fig. 1 is the utility model circuit theory diagrams.
Fig. 2 is the circuit layout of timer.
Fig. 3 is the circuit diagram of the single-chip microcomputer in timer.
Fig. 4 is the circuit diagram of the two-stage feed circuit in timer.
Fig. 5 is the circuit diagram of the clock circuit in timer.
Fig. 6 is the circuit diagram of the key circuit in timer.
Fig. 7 is the circuit diagram of the digitron display screen in timer.
Fig. 8 is the circuit diagram of the output relay in timer.
Embodiment
As shown in Figure 1, a kind of power frequency charging set of preengaging charging, power frequency charging set 1 is electrically connected with timer 2, described timer 2 comprises single-chip microcomputer 1-4, and the input end of single-chip microcomputer 1-4 is connected with clock circuit 1-2, key circuit 1-3 respectively, output terminal is connected with digitron display screen 1-6, output relay 1-5 respectively; Single-chip microcomputer 1-4, clock circuit 1-2 and output relay 1-5 power by two-stage feed circuit 1-1; The output terminal of described output relay 1-5 is connected with power frequency charging set 1.
As shown in Figure 2,3, single-chip microcomputer comprises STC12C5A60S2 chip, reset resistor R9 and crystal oscillating circuit, the 9th pin of described STC12C5A60S2 chip is connected with reset resistor R9, the 19th, 23 pin and the crystal oscillating circuit of chip are connected to form loop, and described crystal oscillating circuit is to be made up of crystal oscillator Y1 and capacitor C 5, C6; The VOC pin of STC12C5A60S2 chip is connected with two-stage feed circuit.
As shown in Figure 4, in two-stage feed circuit, first order circuit is that second level circuit is to be made up of voltage stabilizing chip 7805 and capacitor C 1, C2 by series with diode D2 after diode D1, stabilivolt Q5 and resistance R 1, R2 series connection; Described first order circuit is connected output 12V voltage with output relay 1-5, second level circuit is connected respectively output 5V voltage with STC12C5A60S2 chip, the clock circuit 1-2 of single-chip microcomputer 1-4.J1 port is the power supply input pin of timer, is connected with external power supply.
As shown in Figure 5, clock circuit comprises DS1302 clock chip, and the 2nd, 3 pin and the crystal oscillating circuit of DS1302 clock chip are connected to form loop, and described crystal oscillating circuit is to be made up of crystal oscillator Y2 and capacitor C 3, C4; Between the 1st, 8 pin of clock chip, be connected in series a button cell; The the 7th, 6,5 pin of clock chip are connected and realize communication with the 1st, 2,3 pin of described STC12C5A60S2 chip respectively.
As shown in Figure 6, key circuit comprises five button S1, S2, S3, S4, S5 in parallel, button S1 is connected with the 4th pin of STC12C5A60S2 chip by current-limiting resistance R3, button S2 is connected with the 5th pin of STC12C5A60S2 chip by current-limiting resistance R4, button S3 is connected with the 6th pin of STC12C5A60S2 chip by current-limiting resistance R5, button S4 is connected with the 28th pin of STC12C5A60S2 chip by current-limiting resistance R7, and button S5 is connected with the 29th pin of STC12C5A60S2 chip by current-limiting resistance R8.Wherein button S1, S2, S3 are touch key, and button S4, S5 are self-locking button.Button S1 is the switching that mode key realizes demonstration, the three kinds of patterns in hour, minute; Button S2, S3 add and subtract button; Button S4 is clock/timing switching key; Button S5 is timing/non-timed function switching key, in the time that the 5th button disconnects, opens timing function, only reaches timing output relay just closed; In the time that the 5th button is closed, open non-timed function, output relay is always closed.
As shown in Figure 7, digitron display screen comprises four eight segment numeral pipe U4 and triode Q1, Q2, Q3, Q4, the input end of four eight segment numeral pipe U4 is connected with the 32-39 pin of STC12C5A60S2 chip by current-limiting resistance R470, the input end of triode Q1, Q2, Q3, Q4 is connected with the 21-24 pin of STC12C5A60S2 chip by current-limiting resistance R10, R11, R12, R13 respectively, the output terminal of triode Q1, Q2, Q3, Q4 is all connected with four eight segment numeral pipe U4, and the 3rd end of triode Q1, Q2, Q3, Q4 is all connected with two-stage feed circuit.
Described charactron is four eight segment numeral pipes, every section selects signal to be driven by a triode, realize the dynamic demonstration of 24 hours forms, when the corresponding positions of single-chip microcomputer output selects signal to carry out its triode being connected of conducting, then this charactron of gating shows.
As shown in Figure 8, output relay comprises relay K 1 and transistor drive circuit, and the two ends of the coil of described relay K 1 are anti-and connect a sustained diode 3, and the tip side of relay K 1 is connected with the output control line of the circuit board of power frequency charging set 1; Described transistor drive circuit comprises triode Q6, and one end of described triode Q6 is connected with the coil of described relay K 1, the second end is connected with the 7th pin of described STC12C5A60S2 chip, is connected in series a pull-up resistor R15 between the second end and the 3rd end by current-limiting resistance R14.
Above embodiment is not limited only to protection domain of the present utility model, all modify based on basic thought of the present utility model or change all belong to protection domain of the present utility model.
Claims (7)
1. for a timer for power frequency charging set reservation charging, it is characterized in that: comprise single-chip microcomputer, clock circuit, key circuit, digitron display screen and output relay; Described single-chip microcomputer comprises STC12C5A60S2 chip, reset resistor R9 and crystal oscillating circuit, the 9th pin of described STC12C5A60S2 chip is connected with reset resistor R9, the 19th, 23 pin and the crystal oscillating circuit of chip are connected to form loop, and described crystal oscillating circuit is to be made up of crystal oscillator Y1 and capacitor C 5, C6; Described chip is connected with output relay with clock circuit, key circuit, digitron display screen respectively, and the output terminal of described output relay is connected with power frequency charging set.
2. the timer for power frequency charging set reservation charging according to claim 1, is characterized in that: described single-chip microcomputer, clock circuit are all connected with two-stage feed circuit with the input end of output relay; In described two-stage feed circuit, first order circuit is that second level circuit is to be made up of voltage stabilizing chip 7805 and capacitor C 1, C2 by series with diode D2 after diode D1, stabilivolt Q5 and resistance R 1, R2 series connection; Described first order circuit is connected output 12V voltage with output relay, second level circuit is connected respectively output 5V voltage with described STC12C5A60S2 chip, clock circuit.
3. the timer for power frequency charging set reservation charging according to claim 1, it is characterized in that: described clock circuit comprises DS1302 clock chip, crystal oscillating circuit and button cell, the 2nd, 3 pin and the crystal oscillating circuit of described clock chip are connected to form loop, and described crystal oscillating circuit is to be made up of crystal oscillator Y2 and capacitor C 3, C4; Between the 1st, 8 pin of clock chip, be connected in series a button cell; The the 7th, 6,5 pin of clock chip are connected and realize communication with the 1st, 2,3 pin of described STC12C5A60S2 chip respectively.
4. the timer for power frequency charging set reservation charging according to claim 1, it is characterized in that: described key circuit comprises five buttons in parallel, described five buttons are connected with the the the 4th, 5,6,28,29 pin of described STC12C5A60S2 chip successively by current-limiting resistance respectively.
5. the timer for power frequency charging set reservation charging according to claim 1, it is characterized in that: described digitron display screen comprises charactron and triode, described charactron is connected with described STC12C5A60S2 chip by current-limiting resistance respectively with the input end of triode, and the output terminal of triode is connected with charactron.
6. the timer for power frequency charging set reservation charging according to claim 5, is characterized in that: described charactron is four eight segment numeral pipes.
7. the timer for power frequency charging set reservation charging according to claim 1, it is characterized in that: described output relay comprises relay K 1 and transistor drive circuit, the two ends of the coil of described relay K 1 are anti-and connect a sustained diode 3, and the tip side of relay K 1 is connected with the output control line of the circuit board of power frequency charging set; Described transistor drive circuit comprises triode Q6, and one end of described triode Q6 is connected with the coil of described relay K 1, the second end is connected with the 7th pin of described STC12C5A60S2 chip, is connected in series a pull-up resistor R15 between the second end and the 3rd end by current-limiting resistance R14.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420372795.4U CN203965816U (en) | 2014-07-08 | 2014-07-08 | A kind of timer for power frequency charging set reservation charging |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420372795.4U CN203965816U (en) | 2014-07-08 | 2014-07-08 | A kind of timer for power frequency charging set reservation charging |
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| Publication Number | Publication Date |
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| CN203965816U true CN203965816U (en) | 2014-11-26 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201420372795.4U Active CN203965816U (en) | 2014-07-08 | 2014-07-08 | A kind of timer for power frequency charging set reservation charging |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104062893A (en) * | 2014-07-08 | 2014-09-24 | 安徽合力股份有限公司 | Timer for power frequency battery charger appointment charging |
| CN108674232A (en) * | 2018-05-28 | 2018-10-19 | 浙江吉利控股集团有限公司 | A kind of reservation charging method |
-
2014
- 2014-07-08 CN CN201420372795.4U patent/CN203965816U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104062893A (en) * | 2014-07-08 | 2014-09-24 | 安徽合力股份有限公司 | Timer for power frequency battery charger appointment charging |
| CN104062893B (en) * | 2014-07-08 | 2017-02-15 | 安徽合力股份有限公司 | Timer for power frequency battery charger appointment charging |
| CN108674232A (en) * | 2018-05-28 | 2018-10-19 | 浙江吉利控股集团有限公司 | A kind of reservation charging method |
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