CN203951492U - A kind of multichannel modulator with level power zero offset capability - Google Patents

A kind of multichannel modulator with level power zero offset capability Download PDF

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Publication number
CN203951492U
CN203951492U CN201420350119.7U CN201420350119U CN203951492U CN 203951492 U CN203951492 U CN 203951492U CN 201420350119 U CN201420350119 U CN 201420350119U CN 203951492 U CN203951492 U CN 203951492U
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China
Prior art keywords
level
module
speed adc
detection module
level detection
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Expired - Fee Related
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CN201420350119.7U
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Chinese (zh)
Inventor
邹伟华
戴圣枫
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Huizhou Wellav Technologies Co ltd
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Huizhou Wellav Technologies Co ltd
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Priority to CN201420350119.7U priority Critical patent/CN203951492U/en
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Abstract

The utility model discloses a kind of multichannel modulator with level power zero offset capability, comprise receiver module, output module, level detection module, level compensation module, high-speed ADC transducer, upconverter, filter, radio frequency signal amplifiers, power splitter, low-converter and high-speed ADC transducer.Receiver module is connected with level detection module, level detection module is connected with level compensation module, level compensation module is connected with high-speed DAC transducer, high-speed ADC transducer is connected with upconverter, upconverter is connected with filter, filter is connected with radio frequency amplifier, and radio frequency amplifier is connected with power splitter, and power splitter is connected with output module; Power splitter is connected with low-converter simultaneously, and low-converter is connected with high-speed ADC transducer, and high-speed ADC transducer is connected with level detection module.That a kind of multichannel modulator with level power zero offset capability of the present utility model has is with low cost, precision is high, fireballing feature.

Description

A kind of multichannel modulator with level power zero offset capability
Technical field
The utility model relates to multichannel modulator, specifically refers to a kind of multichannel modulator with level power zero offset capability.
Background technology
The gross power that the power output of multichannel modulator in the market can only simply detect all output channels in single RF output interface detects, thereby can only accomplish to accomplish the auto-compensation correction of single RF output interface gross power, can not check respectively the power of each passage, thereby can not carry out automatic calibration to the power of each passage, make the level difference of passages different in the multichannel of output apart from larger, be difficult to guarantee that in the product of same batch of production each product all meets the relevant criterion that the flatness of the output level of modulator requires, as American Standard DOCSIS 3.0 DRFI standard CM-SP-DRFI-I1 2-111117 require: the poor want≤0.5dB of output level of adjacent two passages, in the continuous output bandwidth of 64MHz any two channel levels poor≤1dB, any two poor 2dB of channel levels within the scope of full bandwidth 86-1006 MHz.
Utility model content
The purpose of this utility model is to provide a kind of multichannel modulator with level power zero offset capability, realizes multichannel detection, have with low cost, precision is high, the fast feature of speed.
The utility model can be achieved through the following technical solutions:
The utility model discloses a kind of multichannel modulator with level power zero offset capability, comprise receiver module, output module, level detection module, level compensation module, high-speed ADC transducer, upconverter, filter, radio frequency signal amplifiers, power splitter, low-converter and high-speed ADC transducer.
Described receiver module is connected with level detection module and the signal receiving is transferred to level detection module carries out level power detection, level detection module is connected with level compensation module and realizes the result that level compensation module detects according to level power and compensate, level compensation module is connected with high-speed DAC transducer the digital-to-analogue conversion that realizes signal transmission, high-speed ADC transducer be connected with upconverter realize analog signal to high carrier frequency, upconverter is connected the signal filtration that realizes each passage characteristic frequency with filter, filter be connected with radio frequency amplifier realize analog signal the increase of output power to promote output effect, radio frequency amplifier is connected with power splitter realizes multichannel output, power splitter is connected with output module realizes the satisfactory RF signal output of level power.
Described power splitter is connected the signal feedback open detection that realizes multichannel output with low-converter, low-converter is connected with high-speed ADC transducer the reduction that realizes signal frequency, high-speed ADC transducer is connected with level detection module to realize the analog-to-digital conversion of signal and be transferred to level detection module and carries out Real-time and Dynamic Detection, the unblanking second compensation that level power differs greatly, from first effectively having guaranteed the equilibrium output of volume.
Preferably, described level compensation module and level detection module integration are in FPGA integrated circuit.FPGA integrated circuit is the product further developing on the basis of the programming devices such as PAL, GAL, CPLD.It is as a kind of semi-custom circuit in application-specific integrated circuit (ASIC) (ASIC) field, has both solved the deficiency of custom circuit, has overcome again the limited shortcoming of original programming device gate circuit number, and degree of integration is high, applies very extensive.
A kind of multichannel modulator with level power zero offset capability of the utility model, compares with existing multichannel modulator, has following beneficial effect:
The first, with low cost, adopt the design of FPGA modular integrated circuit, without external equipment, manufacturing cost is lower;
The second, precision is high, and the introducing signal of power splitter is realized feedback design, and the level power that can circulate detects and level power compensation, and the signal that meets required precision could be exported;
Three, speed is fast, can meet the demand of multichannel automatic calibration simultaneously, and processing speed effectively improves compared with single channel auto-compensation.
Accompanying drawing explanation
Accompanying drawing 1 is the theory diagram of a kind of multichannel modulator with level power zero offset capability of the utility model.
Embodiment
In order to make those skilled in the art person understand better the technical solution of the utility model, below in conjunction with embodiment and accompanying drawing, the utility model product is described in further detail.
As shown in Figure 1, with a multichannel modulator for level power zero offset capability, comprise receiver module, output module, level detection module, level compensation module, high-speed ADC transducer, upconverter, filter, radio frequency signal amplifiers, power splitter, low-converter and high-speed ADC transducer.
As shown in Figure 1, described receiver module is connected with level detection module and the signal receiving is transferred to level detection module carries out level power detection, level detection module is connected with level compensation module and realizes the result that level compensation module detects according to level power and compensate, level compensation module is connected with high-speed DAC transducer the digital-to-analogue conversion that realizes signal transmission, high-speed ADC transducer be connected with upconverter realize analog signal to high carrier frequency, upconverter is connected the signal filtration that realizes each passage characteristic frequency with filter, filter be connected with radio frequency amplifier realize analog signal the increase of output power to promote output effect, radio frequency amplifier is connected with power splitter realizes multichannel output, power splitter is connected with output module realizes the satisfactory RF signal output of level power.
As shown in Figure 1, described power splitter is connected the signal feedback open detection that realizes multichannel output with low-converter, low-converter is connected with high-speed ADC transducer the reduction that realizes signal frequency, high-speed ADC transducer is connected with level detection module to realize the analog-to-digital conversion of signal and be transferred to level detection module and carries out Real-time and Dynamic Detection, the unblanking second compensation that level power differs greatly, from first effectively having guaranteed the equilibrium output of volume.
As shown in Figure 1, described level compensation module and level detection module integration are in FPGA integrated circuit.Effectively saved occupying of spatial volume.
The above, be only preferred embodiment of the present utility model, not the utility model done to any pro forma restriction; The those of ordinary skill of all industry all can be implemented the utility model with the above shown in by specification accompanying drawing swimmingly; But all those skilled in the art are not departing within the scope of technical solutions of the utility model, can utilize disclosed above technology contents and a little change, the modification of making and the equivalent variations developing, be equivalent embodiment of the present utility model; Meanwhile, the change of any equivalent variations that all foundations essence technology of the present utility model is done above embodiment, modification and differentiation etc., within all still belonging to the protection range of the technical solution of the utility model.

Claims (2)

1. the multichannel modulator with level power zero offset capability, comprise receiver module and output module, it is characterized in that, also comprise level detection module, level compensation module, high-speed ADC transducer, upconverter, filter, radio frequency signal amplifiers, power splitter, low-converter and high-speed ADC transducer;
Described receiver module is connected with level detection module, level detection module is connected with level compensation module, level compensation module is connected with high-speed DAC transducer, high-speed ADC transducer is connected with upconverter, upconverter is connected with filter, filter is connected with radio frequency amplifier, and radio frequency amplifier is connected with power splitter, and power splitter is connected with output module;
Described power splitter is connected with low-converter, and low-converter is connected with high-speed ADC transducer, and high-speed ADC transducer is connected with level detection module.
2. multichannel modulator according to claim 1, is characterized in that: described level compensation module and level detection module integration are in FPGA integrated circuit.
CN201420350119.7U 2014-06-29 2014-06-29 A kind of multichannel modulator with level power zero offset capability Expired - Fee Related CN203951492U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201420350119.7U CN203951492U (en) 2014-06-29 2014-06-29 A kind of multichannel modulator with level power zero offset capability

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201420350119.7U CN203951492U (en) 2014-06-29 2014-06-29 A kind of multichannel modulator with level power zero offset capability

Publications (1)

Publication Number Publication Date
CN203951492U true CN203951492U (en) 2014-11-19

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CN201420350119.7U Expired - Fee Related CN203951492U (en) 2014-06-29 2014-06-29 A kind of multichannel modulator with level power zero offset capability

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109274468A (en) * 2018-11-23 2019-01-25 中国电子科技集团公司第三十八研究所 A kind of test method and system for channel IQ zero offset capability

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109274468A (en) * 2018-11-23 2019-01-25 中国电子科技集团公司第三十八研究所 A kind of test method and system for channel IQ zero offset capability
CN109274468B (en) * 2018-11-23 2021-04-16 中国电子科技集团公司第三十八研究所 Method and system for testing channel IQ automatic correction function

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CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20141119

Termination date: 20190629

CF01 Termination of patent right due to non-payment of annual fee