CN203932048U - Semiconductor package - Google Patents
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- CN203932048U CN203932048U CN201420288753.2U CN201420288753U CN203932048U CN 203932048 U CN203932048 U CN 203932048U CN 201420288753 U CN201420288753 U CN 201420288753U CN 203932048 U CN203932048 U CN 203932048U
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- Prior art keywords
- electronic component
- encapsulating material
- section
- flexible substrate
- semiconductor package
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 79
- 239000000758 substrate Substances 0.000 claims abstract description 78
- 239000000463 material Substances 0.000 claims abstract description 77
- 238000005452 bending Methods 0.000 claims abstract description 52
- 239000002184 metal Substances 0.000 claims description 8
- 238000010586 diagram Methods 0.000 description 8
- 238000000034 method Methods 0.000 description 7
- 230000001771 impaired effect Effects 0.000 description 4
- 238000005538 encapsulation Methods 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 239000013307 optical fiber Substances 0.000 description 2
- 238000010276 construction Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15158—Shape the die mounting substrate being other than a cuboid
- H01L2924/15159—Side view
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15313—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a land array, e.g. LGA
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
The utility model relates to a kind of semiconductor package, and described semiconductor package comprises: flexible substrate, at least one stop layer, at least one electronic component and encapsulating material.Described flexible substrate has first surface, the first section and at least one bending section.Described at least one stop layer is arranged on described first surface and described at least one bending section.Described at least one electronic component is arranged at the described first surface of described flexible substrate and at described the first section.Described first surface and described at least one electronic component of the coated described flexible substrate of encapsulating material, encapsulating material comprises at least one opening, is formed on the relative position of described at least one stop layer, to appear described at least one stop layer.
Description
Technical field
The utility model relates to a kind of semiconductor package.
Background technology
In conventional encapsulating structure, because encapsulating material is rigid, make the overall package structure after encapsulation not there is flexibility.
Utility model content
This exposure relate in one aspect to a kind of semiconductor package.In one embodiment, described semiconductor package comprises: flexible substrate, at least one stop layer, at least one electronic component and encapsulating material.Described flexible substrate has first surface, the first section and at least one bending section.Described at least one stop layer is arranged on described first surface and described at least one bending section.Described at least one electronic component is arranged at the described first surface of described flexible substrate, and at described the first section.Described first surface and described at least one electronic component of the coated described flexible substrate of encapsulating material, encapsulating material comprises at least one opening, is formed on the relative position of described at least one stop layer, to appear described at least one stop layer.
This exposure relate on the other hand a kind of semiconductor package.In one embodiment, described semiconductor package comprises: flexible substrate, at least one electronic component and encapsulating material.Described flexible substrate has first surface, at least one the first section and at least one bending section, and described at least one bending section bending is reservation shape.Described at least one electronic component is arranged at the described first surface of described flexible substrate, and at described at least one the first section.Described first surface, described at least one bending section and described at least one first section of the coated described flexible substrate of encapsulating material, and described at least one electronic component.
This exposure relate on the other hand a kind of semiconductor package.In one embodiment, described semiconductor package comprises: flexible substrate, at least one the first electronic component, at least one the second electronic component and encapsulating material.Described flexible substrate has first surface, the first section and the second section.Described at least one the first electronic component is arranged at the described first surface of described flexible substrate, and at described the first section.Described at least one the second electronic component is arranged at the described first surface of described flexible substrate, and at described the second section.Described first surface, described at least one electronic component and described at least one second electronic component of the coated described flexible substrate of encapsulating material, encapsulating material comprises at least one opening, be formed between described at least one the first electronic component and described at least one the second electronic component, described at least one the first electronic component and described at least one the second electronic component can relatively move.
This exposure relate on the other hand a kind of semiconductor package.In one embodiment, described semiconductor package comprises: elastic substrate, multiple electronic component, encapsulating material and at least one stop layer.Described elastic substrate has first surface, the first section and at least one elastic segments.Described electronic component is arranged at the described first surface of described elastic substrate, and at described the first section.Described first surface and described at least one electronic component of the coated described elastic substrate of encapsulating material, encapsulating material comprises multiple holes, is formed in described elastic segments.Described at least one stop layer is arranged between described hole and described elastic segments.
Brief description of the drawings
Fig. 1 shows the cross-sectional schematic of an embodiment of the utility model semiconductor package;
Fig. 2 show the opening of the utility model semiconductor package an embodiment on look local enlarged diagram;
Fig. 3 shows the cross-sectional schematic of an embodiment of the utility model semiconductor package;
Fig. 4 shows the cross-sectional schematic of an embodiment of the utility model semiconductor package;
Fig. 5 shows the schematic perspective view of an embodiment of the utility model semiconductor package;
Fig. 6 is to the schematic diagram of an embodiment of the processing procedure of the semiconductor package of 8 demonstration the utility model Fig. 1;
Fig. 9 show the processing procedure of the semiconductor package of the utility model Fig. 5 an embodiment on look schematic diagram; And
Figure 10 is to the schematic diagram of an embodiment of the processing procedure of the semiconductor package of 13 demonstration the utility model Fig. 3.
Embodiment
With reference to figure 1, show the cross-sectional schematic of an embodiment of the utility model semiconductor package.Described semiconductor package 10 comprises: flexible substrate 11, at least one electronic component 121,122, encapsulating material 13 and at least one stop layer 14.Described flexible substrate 11 has first surface 111, second surface 112, at least one bending section 113, the first section 114 and the second section 115.Described second surface 112 is with respect to described first surface 111.In one embodiment, described at least one bending section 113 is arranged between described the first section 114 and described the second section 115, and described at least one bending section 113 can be the 3rd section.
Described at least one electronic component 121,122 is arranged at the described first surface 111 of described flexible substrate 11, and outside described at least one bending section 113.That is, described at least one electronic component 121,122 is not arranged on described at least one bending section 113, and described at least one electronic component 121,122 is arranged on the first section 114 or the second section 115.Described at least one electronic component 121,122 can be processor (Processor), memory (Memory) or application-specific integrated circuit (ASIC) (ASIC, Application-Specific Integrated Circuit) etc.
Described semiconductor package 10 comprises: at least one the first electronic component 121 and at least one the second electronic component 122.Described at least one the first electronic component 121 is arranged at described first section 114 of described flexible substrate 11, and described at least one the second electronic component 122 is arranged at described second section 115 of described flexible substrate 11.
Described first surface 111 and described at least one electronic component 12 of encapsulating material 13 coated described flexible substrate 11, and not coated described at least one bending section 113.Encapsulating material 13 comprises at least one opening 131, is formed on the relative position of described at least one bending section 113, and described at least one bending section 113 can be bent as reservation shape.And described at least one opening 131 is formed between described at least one the first electronic component 121 and described at least one the second electronic component 122, described at least one the second electronic component 121 and described at least one the second electronic component 122 can relatively move, for example: with respect to described at least one opening 131, described at least one the second electronic component 121 and described at least one the second electronic component 122 are removable.
Therefore, described semiconductor package 10 can bend according to predetermined curvature or shape at described bending section 113, the global shape of described semiconductor package 10 can be bent as predetermined curvature or shape, to be widely used in hand-held device, for example: mobile phone, MP3, ipod etc., or object wearing device, for example: glasses, wrist-watch etc.
Described at least one stop layer 14 is arranged on described first surface 111 and described at least one bending section 113.At cutting encapsulating material 13 when forming described at least one opening 131; described at least one stop layer 14 can make cutting tool; be cut to described at least one stop layer 14; appear at least one stop layer 14; can avoid described at least one bending section 113 impaired, and can protect described at least one bending section 113.
Described semiconductor package 10 separately comprises at least one electrical components 15, is arranged at the described second surface 112 of described flexible substrate 11.Described at least one electrical components 15 can be connector, to be connected with the external world; Or can be the passive devices such as resistance, inductance, electric capacity; Or can be active member.
Described semiconductor package 10 separately comprises multiple modules 161,162, and 161,162 of described modules separate with described at least one opening 131 and described at least one bending section 113.For example: the first module 161 comprises the described flexible substrate 11 of part, described at least one the first electronic component 121 and encapsulating material 13; The second module 162 comprises the described flexible substrate 11 of part, described at least one the second electronic component 122 and encapsulating material 13.In one embodiment, in described the first module 161, comprise that the function of 2 first electronic component 121, two first electronic components 121 is similar or identical, or 2 first electronic components 121 are applicable to being packaged in same module.
Described semiconductor package 10 separately comprises multiple electric connection elements 171,172, and in order to be electrically connected described module 161,162, described electric connection element 171,172 is arranged at the described second surface 112 of described flexible substrate 11.In one embodiment, the first module 161 has the first electric connection element 171, the second modules 162 and has the signal connection of the second electric connection element 172, two electric connection elements 171,172 in order to 161,162 of two modules.Be electrically connected element 171,172 and can be optical fiber.In addition, being electrically connected element 171,172 also can be in order to be electrically connected with the external world.
Described semiconductor package 10 separately comprises at least one screen 18, covers described encapsulating material 13.In one embodiment, be taking module as unit, screen 18 is covered on the encapsulating material 13 of each module 161,162, interfere with each other with the electronic component of avoiding 161,162 of adjacent blocks.
Described semiconductor package 10 separately comprises at least one shielding trench 19, in order to separate encapsulating material 13 at least two parts, in shielding trench 19, has metal, to shield described at least one the second electronic component 122 in the encapsulating material 13 of each several part.In one embodiment, be taking module as unit, utilize shielding trench 19 to separate described the second electronic component 122 in described the second module 162, to avoid the electronic component in the second module 162 to interfere with each other.
With reference to figure 2, on an embodiment of the opening of demonstration the utility model semiconductor package, look local enlarged diagram.Described opening 131 comprises at least one side 132,133, and each side has at least one section.In one embodiment, described opening 131 comprises two side faces 132,133, and described side 132 comprises multiple linear section 135,136,137 etc.; Described side 133 comprises circular arc section 138.
With reference to figure 3, show the cross-sectional schematic of an embodiment of the utility model semiconductor package.Described semiconductor package 30 comprises: flexible substrate 31, at least one electronic component 32 and encapsulating material 33.Described flexible substrate 31 has first surface 311, second surface 312, at least one bending section 313 and at least one the first section 314.Described second surface 312 is with respect to described first surface 311.Described at least one bending section 313 is bent is reservation shape.In one embodiment, described flexible substrate 31 has two bending sections 313 and three the first sections 314.
Described at least one electronic component 32 is arranged at the described first surface 311 of described flexible substrate 31, and outside described at least one bending section 313.That is, described at least one electronic component 32 is not arranged on described at least one bending section 313, is arranged at described at least one the first section 314.
Described first surface 311 and described at least one bending section 313 and described at least one first section 314 of encapsulating material 33 coated described flexible substrate 31, and described at least one electronic component 32.
Because described flexible substrate 31 can first bend according to predetermined curvature or shape at described bending section 313, therefore the global shape of described semiconductor package 30 can be predetermined curvature or shape after encapsulation, can be widely used in hand-held device, for example: mobile phone, MP3, ipod etc., or object wearing device, for example: glasses, wrist-watch etc.
Described semiconductor package 30 separately comprises at least one electrical components 35, is arranged at the described second surface 312 of described flexible substrate 31.Described at least one electrical components 35 can be connector, to be connected with the external world; Or can be the passive devices such as resistance, inductance, electric capacity; Or can be active member.
Described semiconductor package 30 separately comprises at least one screen 36, covers described encapsulating material 33.In one embodiment, described screen 36 is covered on encapsulating material 33, to avoid the electronic component in described semiconductor package 30 to be subject to external interference.
Described semiconductor package 30 separately comprises at least one shielding trench 37, in order to separate encapsulating material 33 at least two parts, in shielding trench 37, has metal, to shield the described at least one electronic component 32 in the encapsulating material 33 of each several part.In one embodiment, utilize shielding trench 37 to separate the described electronic component 12 in described semiconductor package 30, to avoid the electronic component in described semiconductor package 30 to interfere with each other.
With reference to figure 4, show the cross-sectional schematic of an embodiment of the utility model semiconductor package.Described semiconductor package 40 comprises: flexible substrate 41, at least one electronic component 42 and encapsulating material 43.The described semiconductor package 40 of Fig. 4 is with the difference of the described semiconductor package 30 of Fig. 3, and described semiconductor package 40 separately comprises at least one stop layer 44 and at least one opening 431.Described at least one stop layer 44 is arranged on described first surface 411 and described at least one bending section 413.Described at least one stop layer 44 can, in cutting encapsulating material 43 when forming described at least one opening 431, be avoided described at least one bending section 413 impaired, and can protect described at least one bending section 413.
The part section of described semiconductor package 40 has bent as reservation shape, separately can utilize described bending section 413 flexibly to bend depending on the required of application, makes the global shape of described semiconductor package 40 can have more the elasticity of adjustment.
Described semiconductor package 40 separately comprises multiple modules 46,46 of described modules separate with described at least one opening 431 and described at least one bending section 413, and each module 46 comprises the described flexible substrate 41 of part, described at least one electronic component 42 and encapsulating material 43.In one embodiment, the function that comprises two electronic component 42, two electronic components 42 in described module 46 is similar or identical, or two electronic components 42 are applicable to being packaged in same module.
Described semiconductor package 40 separately comprises multiple electric connection elements 47, and in order to be electrically connected described module 46, described electric connection element 47 is arranged at the second surface 412 of described flexible substrate 41.In one embodiment, each module 46 has the signal connection of an electric connection element 47, two electric connection elements 47 in order to 46 of two modules.Be electrically connected element 47 and can be optical fiber.In addition, being electrically connected element 47 also can be in order to be electrically connected with the external world.
Described semiconductor package 40 separately comprises at least one screen 48, covers described encapsulating material 43.In one embodiment, be taking module as unit, screen 48 is covered on the encapsulating material 43 of each module 46, interfere with each other with the electronic component of avoiding 46 of adjacent blocks.
With reference to figure 5, show the schematic perspective view of an embodiment of the utility model semiconductor package.Described semiconductor package 50 comprises: elastic substrate 51, at least one electronic component 521,522, encapsulating material 53 and at least one stop layer 54.Described elastic substrate 51 has first surface 511, second surface 512, at least one elastic segments 513 and at least one the first section 514.Described second surface 512 is with respect to described first surface 511.
Described at least one electronic component 521,522 is arranged at the described first surface 511 of described elastic substrate 11, and outside described at least one elastic segments 513.That is, described at least one electronic component 521,522 is not arranged in described at least one elastic segments 513, and described at least one electronic component 521,522 is arranged on described at least one the first section 514.
Described first surface 511 and described at least one electronic component 521,522 of encapsulating material 53 coated described elastic substrate 51.Encapsulating material 53 comprises multiple holes 531, is formed in described elastic segments 513.
Described at least one stop layer 54 is arranged between described hole 531 and described elastic segments 513.In the time forming described hole 531; to remove part encapsulating material 53; described at least one stop layer 54 to avoid described at least one elastic segments 513 impaired, and can be protected described at least one elastic segments 513 till can making part encapsulating material 53 be removed to described at least one stop layer 54.
Because described hole 531 is formed in described elastic segments 513, the relative position of encapsulating material 53 in elastic segments 513 only had between described hole 531 to be connected, therefore the remitted its fury of the encapsulating material 53 of relative position in elastic segments 513, and can be bent together with elastic segments 513 as reservation shape, the global shape of described semiconductor package 50 can be bent as predetermined curvature or shape.
Described semiconductor package 50 can separately comprise at least one screen (scheming not shown), covers described encapsulating material 53, to avoid the electronic component in described semiconductor package 50 to be subject to external interference.Described semiconductor package 50 can separately comprise at least one shielding trench (scheming not shown), in order to separate encapsulating material 53 at least two parts, in shielding trench, there is metal, with the described at least one electronic component in the encapsulating material 53 of shielding each several part, to avoid the electronic component in described semiconductor package 50 to interfere with each other.
Fig. 6 is to the schematic diagram of an embodiment of the processing procedure of the semiconductor package of 8 demonstration the utility model Fig. 1.First with reference to figure 6, provide flexible substrate 11.Described flexible substrate 11 has first surface 111, second surface 112, at least one bending section 113, the first section 114 and the second section 115.Described second surface 112 is with respect to described first surface 111.Then, described at least one electronic component 121,122 is set in the described first surface 111 of described flexible substrate 11, and outside described at least one bending section 113., described at least one electronic component 12 is not arranged on described at least one bending section 113.Described at least one the first electronic component 121 is arranged at described first section 114 of described flexible substrate 11, and described at least one the second electronic component 122 is arranged at described second section 115 of described flexible substrate 11.
Then, electrical components 15 be set and be electrically connected element 171,172 in the described second surface 112 of described flexible substrate 11.At least one stop layer 14 is set again on described first surface 111 and on described at least one bending section 113.
With reference to figure 7, inject encapsulating material 13 to be coated described first surface 111 and described at least one electronic component 121,122 of described flexible substrate 11, and coated described at least one stop layer 14.
With reference to figure 8, cut encapsulating material 13 with laser or cutting tool 20, to form at least one opening 131.Cutting tool 20 is cutting encapsulating materials 13 on described at least one stop layer 14 relative position, and till being cut to described at least one stop layer 14.Described at least one stop layer 14 can avoid described at least one bending section 113 impaired, and can protect described at least one bending section 113.
Referring again to Fig. 1, at least one screen 18 can be set again, cover described encapsulating material 13, interfere with each other with the electronic component of avoiding 161,162 of adjacent blocks.And at least one shielding trench 19 can be set again, in order to separate encapsulating material 13 at least two parts, in shielding trench 19, there is metal, to avoid the electronic component in the second module 162 to interfere with each other.
Fig. 9 shows the schematic diagram of an embodiment of the processing procedure of the semiconductor package of the utility model Fig. 5.Please coordinate with reference to figure 6 to 7, in one embodiment, the step that substrate and injection encapsulating material are provided of the semiconductor package of construction drawing 5, is identical with the step of Fig. 6 to 7, no longer narration.Fig. 9 is a top view, show and form described hole 531 on described at least one stop layer 54, and described hole 531 is only formed in the scope of described at least one stop layer 54.Forming described hole 531 is to remove part encapsulating material 53.In one embodiment, described hole 531 is circular.
Coordinate with reference to figure 5 and Fig. 9, part encapsulating material 53 is removed to form described hole 531, make the remitted its fury of the encapsulating material 53 of relative position in elastic segments 513, and can be bent together with elastic segments 513 as reservation shape, and make circular described hole 531 be stretched as ellipse.In another embodiment, if between described hole 531 every less, may be in drawing process, the encapsulating material 53 connecting is broken, and described hole 531 is communicated with.
Figure 10 is to the schematic diagram of an embodiment of the processing procedure of the semiconductor package of 13 demonstration the utility model Fig. 3.First with reference to Figure 10, provide flexible substrate 31.Described flexible substrate 31 has first surface 311, second surface 312, at least one bending section 313 and at least one the first section 314.Described second surface 312 is with respect to described first surface 311.Then, described at least one electronic component 32 is set in the described first surface 311 of described flexible substrate 31, and outside described at least one bending section 313.That is, described at least one electronic component 32 is not arranged on described at least one bending section 313, is arranged at described at least one first section 314 of described flexible substrate 31.
With reference to Figure 11, described flexible substrate 31 is positioned between mold 61 and bed die 62.Described bed die 62 has reservation shape, and coordinates described at least one bending section 313, makes the described flexible substrate 31 can be according to the shape of described bed die 62, utilizes described at least one bending section 313 to bend into reservation shape, as shown in figure 12.
Then, encapsulating material 33 is injected to be coated described first surface 311 and described at least one electronic component 32 of described flexible substrate 31 in the space between described mold 61 and described flexible substrate 31, and coated described at least one bending section 313.
With reference to Figure 13, remove described mold 61 and described bed die 62.Then, cut encapsulating material 33 and described flexible substrate 31 with laser or cutting tool (scheming not shown) along line of cut, to be made into semiconductor package 30.Described semiconductor package 30 has predetermined semi-circular shape.
Referring again to Fig. 3, at least one screen 36 can be set again, cover described encapsulating material 33, to avoid the electronic component in described semiconductor package 30 to be subject to external interference.And at least one shielding trench 37 can be set again, in order to separate encapsulating material 33 at least two parts, in shielding trench 37, there is metal, to avoid the electronic component in described semiconductor package 30 to interfere with each other.
Above-described embodiment is only explanation principle of the present utility model and effect thereof, but not in order to limit the utility model.Therefore, those skilled in the art modifies to above-described embodiment and changes still not de-spirit of the present utility model.Interest field of the present utility model as described later claims is listed.
Claims (13)
1. a semiconductor package, it comprises:
Flexible substrate, it has first surface, the first section and at least one bending section;
At least one stop layer, it is arranged on described first surface and described at least one bending section;
At least one electronic component, it is arranged at the described first surface of described flexible substrate, and at described the first section; And
Encapsulating material, described first surface and described at least one electronic component of its coated described flexible substrate, encapsulating material comprises at least one opening, it is formed on the relative position of described at least one stop layer, to appear described at least one stop layer.
2. semiconductor package according to claim 1,
It separately comprises multiple modules, described intermodule with described at least one open region every, each module comprises the described flexible substrate of part, described at least one electronic component and encapsulating material.
3. semiconductor package according to claim 1,
It separately comprises at least one screen, covers described encapsulating material.
4. a semiconductor package, it comprises:
Flexible substrate, it has first surface, at least one the first section and at least one bending section, and described at least one bending section bending is reservation shape;
At least one electronic component, it is arranged at the described first surface of described flexible substrate, and at described at least one the first section; And
Encapsulating material, described first surface and described at least one bending section and described at least one first section of its coated described flexible substrate, and described at least one electronic component.
5. semiconductor package according to claim 4,
It separately comprises at least one stop layer, and it is arranged on described first surface and described at least one bending section.
6. semiconductor package according to claim 4,
It separately comprises at least one shielding trench, in order to separate encapsulating material at least two parts, has metal in shielding trench, to shield the described at least one electronic component in the encapsulating material of each several part.
7. a semiconductor package, it comprises:
Flexible substrate, it has first surface, the first section and the second section;
At least one the first electronic component, it is arranged at the described first surface of described flexible substrate, and at described the first section;
At least one the second electronic component, it is arranged at the described first surface of described flexible substrate, and at described the second section; And
Encapsulating material, described first surface, described at least one electronic component and described at least one second electronic component of its coated described flexible substrate, encapsulating material comprises at least one opening, it is formed between described at least one the first electronic component and described at least one the second electronic component, and described at least one the first electronic component and described at least one the second electronic component can relatively move.
8. semiconductor package according to claim 7,
It separately comprises at least one stop layer, it is arranged on the described first surface of described flexible substrate and the 3rd section, described the 3rd section is arranged between described the first section and described the second section, described at least one opening is formed on the relative position of described at least one stop layer, to appear described at least one stop layer.
9. semiconductor package according to claim 7,
It separately comprises multiple modules, described intermodule with described at least one open region every, each module comprises the described flexible substrate of part, described at least one electronic component and encapsulating material.
10. semiconductor package according to claim 7,
It separately comprises at least one shielding trench, in order to separate encapsulating material at least two parts, has metal in shielding trench, to shield the described at least one electronic component in the encapsulating material of each several part.
11. 1 kinds of semiconductor packages, it comprises:
Elastic substrate, it has first surface, the first section and at least one elastic segments;
Multiple electronic components, it is arranged at the described first surface of described elastic substrate, and at described the first section;
Encapsulating material, described first surface and described at least one electronic component of its coated described elastic substrate, encapsulating material comprises multiple holes, it is formed in described elastic segments; And
At least one stop layer, it is arranged between described hole and described elastic segments.
12. semiconductor packages according to claim 11,
It separately comprises at least one screen, and it covers described encapsulating material.
13. semiconductor packages according to claim 11,
It separately comprises at least one shielding trench, in order to separate encapsulating material at least two parts, has metal in shielding trench, to shield the described at least one electronic component in the encapsulating material of each several part.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420288753.2U CN203932048U (en) | 2014-05-30 | 2014-05-30 | Semiconductor package |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420288753.2U CN203932048U (en) | 2014-05-30 | 2014-05-30 | Semiconductor package |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203932048U true CN203932048U (en) | 2014-11-05 |
Family
ID=51827818
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201420288753.2U Expired - Lifetime CN203932048U (en) | 2014-05-30 | 2014-05-30 | Semiconductor package |
Country Status (1)
| Country | Link |
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| CN (1) | CN203932048U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10083911B2 (en) | 2017-02-08 | 2018-09-25 | Advanced Semiconductor Engineering, Inc. | Semiconductor device package and method of manufacturing the same |
-
2014
- 2014-05-30 CN CN201420288753.2U patent/CN203932048U/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10083911B2 (en) | 2017-02-08 | 2018-09-25 | Advanced Semiconductor Engineering, Inc. | Semiconductor device package and method of manufacturing the same |
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