CN203894386U - Fault detection circuit and combination switch arranged in fault detection circuit - Google Patents

Fault detection circuit and combination switch arranged in fault detection circuit Download PDF

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Publication number
CN203894386U
CN203894386U CN201420336800.6U CN201420336800U CN203894386U CN 203894386 U CN203894386 U CN 203894386U CN 201420336800 U CN201420336800 U CN 201420336800U CN 203894386 U CN203894386 U CN 203894386U
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China
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magnetic latching
latching relay
controllable silicon
resistance
pin
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高旭祥
李柏
李铭超
黄子超
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Zhejiang People Electrical Appliance Co Ltd
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Zhejiang People Electrical Appliance Co Ltd
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Abstract

The utility model provides a fault detection circuit and a combination switch arranged in the fault detection circuit. According to the fault detection circuit, the fault detection circuit is connected to a live line and an outgoing line, operating state signals of a silicon controlled rectifier and a magnetic latching relay are filtered through a photoelectric coupler U1 after the live line and the outgoing line form a circuit together with a light emitter of the photoelectric coupler U1 in the fault detection circuit, the signals are amplified through an NPN type triode, reversal processing is carried out on the amplified signals through a chip HEF4010B, and the operating sate signals of the silicon controlled rectifier and the magnetic latching relay are displayed through an oscilloscope, thereby being capable of enabling users to acquire the operating states of the silicon controlled rectifier and the magnetic latching relay visually in real time through an oscillogram and convenient for the users to discover problems timely and take corresponding protective measures, and reducing the loss to minimum.

Description

The combination switch of a kind of failure detector circuit and built-in this failure detector circuit
Technical field
The utility model relates to a kind of failure detector circuit and a kind of combination switch.Relate in particular to the combination switch of a kind of failure detector circuit and built-in this failure detector circuit.
Background technology
Magnetic latching relay is a kind of new type of relay growing up in recent years, is also a kind of automatic switch.The same with other electromagnetic relays, circuit is played to automatic connection and cutting action.Difference is, the normally closed or normally open of magnetic latching relay is the effect that relies on permanent-magnet steel completely, and the conversion of its on off state has triggered by the pulse signal of certain width.In the time that the contact of relay need to be opened or close state, only need to use just (instead) DC pulse voltage drive coil, the state conversion that relay just can complete out and close in moment.Conventionally contact is in the time of hold mode, and coil does not need to continue energising, only depends on the magnetic force of permanent magnet just can maintain the state of relay constant.
Controllable silicon is the abbreviation of silicon controlled rectifier, is also called thyristor, is mainly used in switch aspect, can make device be converted to and open or the state of conducting from the state of closing or blocking, and vice versa.By making its conducting to the extremely additional forward trigger pulse of silicon controlled control, be alternating voltage or pulsating dc voltage and if additional between controllable silicon anode and negative electrode, so, in the time of voltage zero-cross, the controllable silicon of conducting can turn-off voluntarily.
At present, in low-voltage network, transmission line of electricity generally adopts three-phase four-wire system, and wherein three-line represents respectively A, B, and tri-phase lines of C, another is neutral line N (if the neutral ground of this ring current side, the neutral line is also referred to as zero line).In the single phase line that enters user, form loop by the live wire in this phase line and outlet, if disconnect the connection between live wire and the outlet in this phase line, this single phase line is disconnected, the user's no current being connected with this phase line flows through.
In order to reduce the energy consumption in power distribution network switching process, generally control (in combination switch, comprising controllable silicon and the magnetic latching relay of three sets in parallel operation) break-make of each phase line in power distribution network by combination switch, concrete methods of realizing is as follows: by live wire corresponding three phase lines, the controllable silicon of corresponding with it group and a common port of magnetic latching relay are connected respectively, by outlet corresponding three phase lines, the controllable silicon of corresponding with it group and another common port of magnetic latching relay are connected respectively, by the controllable silicon in control combination switch and the break-make of magnetic latching relay, control the break-make of its corresponding phase line.
Therefore, combination switch has advantages of transwitch operating passing zero in the moment switching on and off, and there is magnetic latching relay idle during normal connection, its implementation is: when input, be in the first zero cross fired of voltage zero-cross moment controllable silicon, and then by magnetic latching relay adhesive conducting; And when excision is first magnetic latching relay to be disconnected, controllable silicon delay zero-crossing disconnects afterwards, thereby realizes current over-zero excision, and combination switch is had without remarkable advantages such as impact, low-power consumption, high life.Therefore, in order to ensure the operating characteristic of combination switch operating passing zero, the reliably working of its Primary Component controllable silicon and the magnetic latching relay particular importance that just seems, and in prior art, the effective means that shortage can detect controllable silicon and magnetic latching relay duty, while causing controllable silicon and magnetic latching relay to break down, reminding user takes appropriate measures in time, make combination switch lose the characteristic of operating passing zero, reduce its serviceable life, caused the waste of the energy.
Utility model content
For this reason, technical problem to be solved in the utility model is in prior art, the effective means that shortage can detect controllable silicon and magnetic latching relay duty, while causing controllable silicon and magnetic latching relay to break down, reminding user takes appropriate measures in time, thereby a kind of failure detector circuit that can detect controllable silicon and magnetic latching relay duty and the combination switch of built-in this failure detector circuit are provided.
For solving the problems of the technologies described above, the technical solution of the utility model is as follows:
The utility model provides a kind of failure detector circuit, for detection of the duty of controllable silicon and the magnetic latching relay of every sets in parallel operation in combination switch, it comprises resistance R 4, R6, R10, R13, R18, R20, photoelectrical coupler U1, NPN type triode Q1, diode D4, capacitor C 11 and chip HEF40106B;
Described chip HEF40106B has 14 pins;
One end of described resistance R 10 is connected with the common port that described magnetic latching relay joins with live wire with described controllable silicon, the other end of described resistance R 10 is connected with one end of described resistance R 13, the other end of described resistance R 13 is connected with one end of the light emitting source of described photoelectrical coupler U1, the other end and the outlet of the light emitting source of described photoelectrical coupler U1 are joined, one end ground connection of the light-receiving device of described photoelectrical coupler U1, the other end is connected with one end of described resistance R 18 with one end of described resistance R 4 simultaneously, the other end of described resistance R 18 is connected with one end of described resistance R 20 with power vd D simultaneously, the other end of described resistance R 4 is connected with the base stage of described NPN type triode Q1, the other end while of described resistance R 20 and one end of described resistance R 6, the collector of the negative electrode of described diode D4 and described NPN type triode Q1 is connected, the grounded emitter of described NPN type triode Q1, the other end of described resistance R 6, one end of the anode of described diode D4 and described capacitor C 11 is connected with the pin 1 of described chip HEF40106B after intersecting, the other end ground connection of described capacitor C 11, the pin 2 of described chip HEF40106B is connected with oscillographic first input end.
The utility model also provides a kind of combination switch of built-in described failure detector circuit, controllable silicon and the magnetic latching relay of the sets in parallel operation in described combination switch, be connected with controllable silicon drive circuit, magnetic latching relay control circuit and described failure detector circuit;
Described controllable silicon drive circuit, is connected with described silicon controlled control end, for triggering controllable silicon;
Described magnetic latching relay control circuit, is connected with the coil two ends of described magnetic latching relay, for controlling the break-make of magnetic latching relay;
Described failure detector circuit, be connected with two common ports of described controllable silicon and described magnetic latching relay, for after described controllable silicon drive circuit and the action of described magnetic latching relay control circuit, the duty of described controllable silicon and described magnetic latching relay is detected.
Combination switch described in the utility model, described controllable silicon drive circuit comprises chip HEF4011BT, switch S 7, resistance R 30, R35, R36, NPN type triode Q8, Q9, positive-negative-positive triode Q13, capacitor C 8, common mode inductance T1 and diode D1;
Described chip HEF4011BT comprises 14 pins, built-in four NAND gate circuit;
One end ground connection of described resistance R 35, the other end connects the pin 2 of one end of described switch S 7, oscillographic the second input end and described chip HEF4011BT simultaneously; Another termination power vd D of described switch S 7;
The pin 1 of described chip HEF4011BT connects 7KHZ pulse signal, and pin 3 connects one end of described resistance R 36; The base stage of NPN type triode Q8 described in another termination of described resistance R 36; Ground connection after the emitter of described NPN type triode Q8 is connected with the collector of described positive-negative-positive triode Q13; The collector of described NPN type triode Q8 is connected with base stage, the base stage of described positive-negative-positive triode Q13 and one end of described resistance R 30 of described NPN type triode Q9 simultaneously; The other end of described resistance R 30 is connected with the collector of described NPN type triode Q9 with 12V voltage simultaneously; Emitter, the emitter of described positive-negative-positive triode Q13 and one end of described capacitor C 8 of described NPN type triode Q9 is connected; The input end of common mode inductance T1 described in another termination of described capacitor C 8, the output terminal of described common mode inductance T1 is connected with the anode of described diode D1, and the negative electrode of described diode D1 is connected with described silicon controlled control end.
Combination switch described in the utility model, described magnetic latching relay control circuit comprises switch S 1, S2, chip ULN2003A and relay HFD27/012-S;
Described chip ULN2003A comprises 16 pins; One termination power vd D of described switch S 1, the pin 2 of chip ULN2003A described in its another termination;
One termination power vd D of described switch S 2, the other end connects the pin 3 of described oscillographic the 3rd input end and described chip ULN2003A simultaneously;
A coil pin of described relay HFD27/012-S connects the pin 15 of described chip ULN2003A, another coil pin of described relay HFD27/012-S connects 12V voltage, a normally closed contact of described relay HFD27/012-S is connected with the pin 14 of described chip ULN2003A, another normally closed contact connects 12V voltage, and two normally opened contacts of described relay HFD27/012-S are connected with the coil two ends of described magnetic latching relay.
Combination switch described in the utility model, in described combination switch, the controllable silicon of each sets in parallel operation and magnetic latching relay are all connected with described controllable silicon drive circuit, described magnetic latching relay control circuit and described failure detector circuit.
Technique scheme of the present utility model has the following advantages compared to existing technology:
(1) failure detector circuit described in the utility model, by failure detector circuit being accessed to live wire L1 and outlet C1, and illuminator in photoelectrical coupler U1 in live wire L1 and outlet C1 and failure detector circuit forms behind loop, filter the working state signal of controllable silicon and magnetic latching relay by photoelectrical coupler U1, by NPN type triode, described signal is amplified and is passed through again the working state signal of oscilloscope display controllable silicon and magnetic latching relay after the anti-phase processing of chip HEF4010B, can make user obtain intuitively in real time the duty of controllable silicon and magnetic latching relay by oscillogram, being convenient to user pinpoints the problems in time and takes corresponding safeguard measure, loss is down to minimum.
(2) the utility model also provides a kind of combination switch of built-in described failure detector circuit, drive the controllable silicon in combination switch by controllable silicon drive circuit, by the break-make of magnetic latching relay control circuit control magnetic latching relay, realize combined floodgate or the separating brake of combination switch with this, and after controllable silicon drive circuit and the action of magnetic latching relay control circuit, by failure detector circuit, the duty of the controllable silicon in combination switch and magnetic latching relay is detected.Therefore; the combination switch of built-in described failure detector circuit described in the utility model; carrying out after the combined floodgate or sub-switching operation of combination switch; can obtain in time the duty of controllable silicon and magnetic latching relay; and its duty is checked in real time, when the controllable silicon in combination switch and magnetic latching relay break down, can pinpoint the problems in time and take corresponding safeguard measure; extend the serviceable life of combination switch, reduced energy consumption.
(3) combination switch described in the utility model, its controllable silicon drive circuit, by the break-make of gauge tap S7, can accurately be controlled silicon controlled break-make, and then can control accurately combined floodgate or the separating brake of combination switch.Separately, because one end of switch S 7 is connected with oscillographic the second input end, therefore, user can see the actuating signal of controllable silicon drive circuit very intuitively, for the later stage observes the duty of controllable silicon and magnetic latching relay establish good comparison basis by oscillograph.
(4) combination switch described in the utility model, its magnetic latching relay control circuit is by break-make and the flash switch S2 of gauge tap S1, can change the polarity of magnetic latching relay coil both end voltage, and then control accurately set and the reset of magnetic latching relay, and then can control accurately combined floodgate or the separating brake of combination switch.Separately, the other end of switch S 2 is connected with oscillographic the 3rd input end, therefore, user can watch the actuating signal of magnetic latching relay control circuit very intuitively by oscillograph, for the later stage observes the duty of controllable silicon and magnetic latching relay establish good comparison basis by oscillograph.
(5) combination switch described in the utility model, in described combination switch, controlling with magnetic latching relay of each sets in parallel operation is all connected with described controllable silicon drive circuit, described magnetic latching relay control circuit and described failure detector circuit, therefore, combination switch described in the utility model, can detect the duty of the controllable silicon of the parallel running that in power distribution network, each phase line connects and magnetic latching relay, sensing range is very comprehensive, and testing result is also more accurate.
Brief description of the drawings
For content of the present utility model is more likely to be clearly understood, according to specific embodiment of the utility model also by reference to the accompanying drawings, the utility model is described in further detail, wherein below
Fig. 1 is the circuit theory diagrams of failure detector circuit described in the utility model;
Fig. 2 is the structured flowchart of combination switch described in the utility model;
Fig. 3 is the circuit theory diagrams of the controllable silicon drive circuit of combination switch described in the utility model;
Fig. 4 is the circuit connection diagram of switch S 1 in the magnetic latching relay control circuit of combination switch described in the utility model, S2;
Fig. 5 is the pin circuitry connection diagram of the magnetic latching relay control circuit chips ULN2003A of combination switch described in the utility model;
Fig. 6 is the circuit connection diagram of the magnetic latching relay control circuit repeat circuit HFD27/012-S of combination switch described in the utility model.
In figure, Reference numeral is expressed as: 1-controllable silicon drive circuit, 2-magnetic latching relay control circuit, 3-failure detector circuit.
Embodiment
Embodiment 1
The present embodiment provides a kind of failure detector circuit, for detection of the duty of controllable silicon and the magnetic latching relay of every sets in parallel operation in combination switch, as shown in Figure 1, it comprises resistance R 4, R6, R10, R13, R18, R20, photoelectrical coupler U1, NPN type triode Q1, diode D4, capacitor C 11 and chip HEF40106B.
Described chip HEF40106B has 14 pins.
One end of described resistance R 10 is connected with the common port that described magnetic latching relay joins with live wire with described controllable silicon, the other end of described resistance R 10 is connected with one end of described resistance R 13, the other end of described resistance R 13 is connected with one end of the light emitting source of described photoelectrical coupler U1, the other end and the outlet of the light emitting source of described photoelectrical coupler U1 are joined, one end ground connection of the light-receiving device of described photoelectrical coupler U1, the other end is connected with one end of described resistance R 18 with one end of described resistance R 4 simultaneously, the other end of described resistance R 18 is connected with one end of described resistance R 20 with power vd D simultaneously, the other end of described resistance R 4 is connected with the base stage of described NPN type triode Q1, the other end while of described resistance R 20 and one end of described resistance R 6, the collector of the negative electrode of described diode D4 and described NPN type triode Q1 is connected, the grounded emitter of described NPN type triode Q1, the other end of described resistance R 6, one end of the anode of described diode D4 and described capacitor C 11 is connected with the pin 1 of described chip HEF40106B after intersecting, the other end ground connection of described capacitor C 11, the pin 2 of described chip HEF40106B is connected with oscillographic first input end.
Failure detector circuit described in the present embodiment, in concrete application process, because in the time that combination switch closes a floodgate, need first conducting controllable silicon X1, and then by magnetic latching relay K1 adhesive conducting (set), after this, controllable silicon X1 zero crossing cut-off (live wire input be alternating current, in the time of zero crossing, controllable silicon can become cut-off from conducting, if the pulse signal of silicon controlled control end triggerless, controllable silicon can end always), now, if controllable silicon X1 and magnetic latching relay K1 normally work, live wire L1, magnetic latching relay K1 and outlet C1 can form loop, no current flows through the light emitting source of the photoelectrical coupler U1 in described failure detector circuit, therefore make its light-receiving device cut-off, because one end ground connection of described light-receiving device, the other end, also the one end joining with resistance R 18 and resistance R 4 is also low level, again because the base stage of NPN type triode Q1 is connected with the other end of resistance R 3, the base stage of NPN type triode Q1 is also low level, NPN type triode Q1 cut-off, electric current flows into the pin 1 of chip HEF40106B by resistance R 20 and resistance R 6, now, described pin 1 is low level always, again because form not gate between the pin 1 of chip HEF40106B and pin 2, therefore, its pin 2 is in the time of controllable silicon X1 and magnetic latching relay K1 connection, export high level always, zero cross signal disappears, therefore, after combination switch closes a floodgate, if there is zero cross signal to occur in oscillograph, controllable silicon and magnetic latching relay working state abnormal are described.
Again because in the time of combination switch separating brake, need first conducting controllable silicon X1, and then disconnection magnetic latching relay K1 (reset), after this, controllable silicon X1 also can end by zero crossing, now, if the words of the normal work of controllable silicon X1 and magnetic latching relay K1, after combination switch separating brake, all should end, only has live wire L1, resistance R 10, R18, the light emitting source of photoelectrical coupler U1 and outlet C1 could form loop, therefore, photoelectrical coupler U1 can transfer to oscillograph by the pin 2 of described chip HEF40106B by the signal in the described loop gathering, zero cross signal occurs.Therefore,, when after combination switch separating brake, if there is no zero cross signal in oscillograph, controllable silicon and magnetic latching relay working state abnormal are described.
In sum, failure detector circuit described in the present embodiment, by failure detector circuit being accessed to live wire L1 and outlet C1, and illuminator in photoelectrical coupler U1 in live wire L1 and outlet C1 and failure detector circuit forms behind loop, filter the working state signal of controllable silicon and magnetic latching relay by photoelectrical coupler U1, by NPN type triode, described signal is amplified and is passed through again the working state signal of oscilloscope display controllable silicon and magnetic latching relay after the anti-phase processing of chip HEF4010B, can make user obtain intuitively in real time the duty of controllable silicon and magnetic latching relay by oscillogram, being convenient to user pinpoints the problems in time and takes corresponding safeguard measure, loss is down to minimum.
Embodiment 2
The present embodiment provides the combination switch of failure detector circuit described in a kind of built-in embodiment 1, as shown in Figure 2, controllable silicon and the magnetic latching relay of the sets in parallel operation in described combination switch, be connected with controllable silicon drive circuit 1, magnetic latching relay control circuit 2 and described failure detector circuit 3.
Described controllable silicon drive circuit 1, is connected with described silicon controlled control end, for triggering controllable silicon.
Described magnetic latching relay control circuit 2, is connected with the coil two ends of described magnetic latching relay, for controlling the break-make of magnetic latching relay.
Described failure detector circuit 3, be connected with two common ports of described controllable silicon and described magnetic latching relay, for after described controllable silicon drive circuit 1 and 2 actions of described magnetic latching relay control circuit, the duty of described controllable silicon and described magnetic latching relay is detected.
Combination switch described in the present embodiment, drive the controllable silicon in combination switch by controllable silicon drive circuit 1, control the break-make of magnetic latching relay by magnetic latching relay control circuit 2, realize combined floodgate or the separating brake of combination switch with this, and after controllable silicon drive circuit 1 and 2 actions of magnetic latching relay control circuit, by failure detector circuit, the duty of the controllable silicon in combination switch and magnetic latching relay is detected.Therefore; the combination switch of the built-in described failure detector circuit described in the present embodiment; carrying out after the combined floodgate or sub-switching operation of combination switch; can obtain in time the duty of controllable silicon and magnetic latching relay; and its duty is checked in real time, when the controllable silicon in combination switch and magnetic latching relay break down, can pinpoint the problems in time and take corresponding safeguard measure; extend the serviceable life of combination switch, reduced energy consumption.
As one preferred embodiment, combination switch described in the present embodiment, as shown in Figure 3, described controllable silicon drive circuit 1 comprises chip HEF4011BT, switch S 7, resistance R 30, R35, R36, NPN type triode Q8, Q9, positive-negative-positive triode Q13, capacitor C 8, common mode inductance T1 and diode D1.
Described chip HEF4011BT comprises 14 pins, built-in four NAND gate circuit.
One end ground connection of described resistance R 35, the other end connects the pin 2 of one end of described switch S 7, oscillographic the second input end and described chip HEF4011BT simultaneously; Another termination power vd D of described switch S 7.
The pin 1 of described chip HEF4011BT connects 7KHZ pulse signal, and pin 3 connects one end of described resistance R 36; The base stage of NPN type triode Q8 described in another termination of described resistance R 36; Ground connection after the emitter of described NPN type triode Q8 is connected with the collector of described positive-negative-positive triode Q13; The collector of described NPN type triode Q8 is connected with base stage, the base stage of described positive-negative-positive triode Q13 and one end of described resistance R 30 of described NPN type triode Q9 simultaneously; The other end of described resistance R 30 is connected with the collector of described NPN type triode Q9 with 12V voltage simultaneously; Emitter, the emitter of described positive-negative-positive triode Q13 and one end of described capacitor C 8 of described NPN type triode Q9 is connected; The input end of common mode inductance T1 described in another termination of described capacitor C 8, the output terminal of described common mode inductance T1 is connected with the anode of described diode D1, and the negative electrode of described diode D1 is connected with described silicon controlled control end.
Combination switch described in the present embodiment, in concrete application process, described controllable silicon drive circuit 1, a because termination power vd D of switch S 7, the pin 2 of another chip termination HEF4011BT, and the pin 1 of chip HEF4011BT connects 7KHZ pulse signal, therefore, when pressing after switch S 7, pin 2 places are high level, pin 1 place is pulse voltage, again because the pin 1 of chip HEF4011BT, pin 2 and pin 3 form Sheffer stroke gate, what now pin 3 places exported is also pulse signal, and then NPN type triode Q8 is constantly changed between conducting and cut-off state, and in the time of NPN type triode Q8 conducting, the base stage of NPN type triode Q9 and positive-negative-positive triode Q13 is low level, now NPN type triode Q9 cut-off, one end that capacitor C 8 is connected with the input end of common mode inductance T1 is low level, in the time that NPN type triode Q8 ends, the base stage of NPN type triode Q9 and positive-negative-positive triode Q13 is high level, now NPN type triode Q9 conducting, and positive-negative-positive triode Q13 cut-off, one end that capacitor C 8 is connected with the input end of common mode inductance T1 is high level, now, after common mode inductance T1 filters, being that combination switch silicon controlled control end is received can trigger silicon controlled pulse signal.
When after cut-off switch S7, pin 2 places are always in low level state, according to the characteristic of Sheffer stroke gate, so now pin 3 places will be always in high level state, NPN type triode Q8 is always in conducting state, therefore, and the input end of common mode inductance T1 input low level always, cause combination switch silicon controlled control end to can not receive pulse signal, nature cannot again set out controllable silicon again after silicon control zero-cross cut-off.
Therefore, combination switch described in the present embodiment, its controllable silicon drive circuit 1, by the break-make of gauge tap S7, can accurately be controlled silicon controlled break-make, and then can control accurately combined floodgate or the separating brake of combination switch.Separately, because one end of switch S 7 is connected with oscillographic the second input end, therefore, user can see the actuating signal of controllable silicon drive circuit very intuitively, for the later stage observes the duty of controllable silicon and magnetic latching relay establish good comparison basis by oscillograph.
As one preferred embodiment, the combination switch described in the present embodiment, as shown in Fig. 4, Fig. 5, Fig. 6, described magnetic latching relay control circuit 2 comprises switch S 1, S2, chip ULN2003A and relay HFD27/012-S.
Described chip ULN2003A comprises 16 pins; One termination power vd D of described switch S 1, the pin 2 of chip ULN2003A described in its another termination.
One termination power vd D of described switch S 2, the other end connects the pin 3 of described oscillographic the 3rd input end and described chip ULN2003A simultaneously.
A coil pin of described relay HFD27/012-S connects the pin 15 of described chip ULN2003A, another coil pin of described relay HFD27/012-S connects 12V voltage, a normally closed contact of described relay HFD27/012-S is connected with the pin 14 of described chip ULN2003A, another normally closed contact connects 12V voltage, and two normally opened contacts of described relay HFD27/012-S are connected with the coil two ends of described magnetic latching relay.
Combination switch described in the present embodiment, in specifically should process, described magnetic latching relay control circuit 2, in the process of set (conducting) magnetic latching relay, first conducting controllable silicon (in order to realize operating passing zero), open again switch S 1, now, pin 2 places of chip ULN2003A are low level, because be not gate between the pin 2 of chip ULN2003A and pin 15, therefore the pin 15 of chip ULN2003A is exported high level (12V), relay HFD27/012-S is failure to actuate, the coil a end of magnetic latching relay is contacted with that normally closed contact being connected with 12V voltage in relay HFD27/012-S, also be the coil a termination 12V voltage of magnetic latching relay, the coil b end of magnetic latching relay contacts with that normally closed contact being connected with the pin 14 of chip ULN2003A in relay HFD27/012-S, now, if Closing Switch S2, the pin 3 of chip ULN2003A is high level, because be not gate between the pin 3 of chip ULN2003A and pin 14, therefore pin 14 output low levels of chip ULN2003A, also the coil b end that is magnetic latching relay is low level, therefore magnetic latching relay just connects, make magnetic latching relay set (conducting) (after this, even cut-off switch S2, magnetic latching relay also can continue to keep conducting state).
In the process of reset magnetic latching relay, because controllable silicon zero crossing cut-off before, now need first to press switch S 7, by controllable silicon drive circuit output pulse signal to SCR control end, conducting controllable silicon (in order to realize operating passing zero), Closing Switch S1 more afterwards, now, pin 15 output low levels of chip ULN2003A, relay HFD27/012-S action, the coil b end of magnetic latching relay is contacted with that normally closed contact being connected with 12V voltage in relay HFD27/012-S, also be the coil b termination 12V voltage of magnetic latching relay, the coil a end of magnetic latching relay contacts with that normally closed contact being connected with the pin 14 of chip ULN2003A in relay HFD27/012-S, now, if Closing Switch S2, the pin 3 of chip ULN2003A is high level, because be not gate between the pin 3 of chip ULN2003A and pin 14, therefore pin 14 output low levels of chip ULN2003A, also the coil a end that is magnetic latching relay is low level, therefore magnetic latching relay reversal connection, make magnetic latching relay reset (cut-off).
Therefore, combination switch described in the present embodiment, its magnetic latching relay control circuit is by break-make and the flash switch S2 of gauge tap S1, can change the polarity of magnetic latching relay coil both end voltage, and then control accurately set and the reset of magnetic latching relay, and then can control accurately combined floodgate or the separating brake of combination switch.Separately, the other end of switch S 2 is connected with oscillographic the 3rd input end, therefore, user can watch the actuating signal of magnetic latching relay control circuit very intuitively by oscillograph, for the later stage observes the duty of controllable silicon and magnetic latching relay establish good comparison basis by oscillograph.
As one preferred embodiment, combination switch described in the present embodiment, in described combination switch, the controllable silicon of each sets in parallel operation and magnetic latching relay are all connected with described controllable silicon drive circuit 1, described magnetic latching relay control circuit 2 and described failure detector circuit 3.
Therefore, the combination switch described in the present embodiment, can detect the duty of the controllable silicon of the parallel running that in power distribution network, each phase line connects and magnetic latching relay, and sensing range is very comprehensive, and testing result is also more accurate.
Obviously, above-described embodiment is only for example is clearly described, and the not restriction to embodiment.For those of ordinary skill in the field, can also make other changes in different forms on the basis of the above description.Here without also giving exhaustive to all embodiments.And among the protection domain that the apparent variation of being extended out thus or variation are still created in the utility model.

Claims (5)

1. a failure detector circuit, for detection of the duty of controllable silicon and the magnetic latching relay of every sets in parallel operation in combination switch, it is characterized in that, it comprises resistance R 4, R6, R10, R13, R18, R20, photoelectrical coupler U1, NPN type triode Q1, diode D4, capacitor C 11 and chip HEF40106B;
Described chip HEF40106B has 14 pins;
One end of described resistance R 10 is connected with the common port that described magnetic latching relay joins with live wire with described controllable silicon, the other end of described resistance R 10 is connected with one end of described resistance R 13, the other end of described resistance R 13 is connected with one end of the light emitting source of described photoelectrical coupler U1, the other end and the outlet of the light emitting source of described photoelectrical coupler U1 are joined, one end ground connection of the light-receiving device of described photoelectrical coupler U1, the other end is connected with one end of described resistance R 18 with one end of described resistance R 4 simultaneously, the other end of described resistance R 18 is connected with one end of described resistance R 20 with power vd D simultaneously, the other end of described resistance R 4 is connected with the base stage of described NPN type triode Q1, the other end while of described resistance R 20 and one end of described resistance R 6, the collector of the negative electrode of described diode D4 and described NPN type triode Q1 is connected, the grounded emitter of described NPN type triode Q1, the other end of described resistance R 6, one end of the anode of described diode D4 and described capacitor C 11 is connected with the pin 1 of described chip HEF40106B after intersecting, the other end ground connection of described capacitor C 11, the pin 2 of described chip HEF40106B is connected with oscillographic first input end.
2. the combination switch of failure detector circuit described in a built-in claim 1, it is characterized in that, controllable silicon and the magnetic latching relay of the sets in parallel operation in described combination switch, be connected with controllable silicon drive circuit (1), magnetic latching relay control circuit (2) and described failure detector circuit (3);
Described controllable silicon drive circuit (1), is connected with described silicon controlled control end, for triggering controllable silicon;
Described magnetic latching relay control circuit (2), is connected with the coil two ends of described magnetic latching relay, for controlling the break-make of magnetic latching relay;
Described failure detector circuit (3), be connected with two common ports of described controllable silicon and described magnetic latching relay, for after described controllable silicon drive circuit (1) and described magnetic latching relay control circuit (2) action, the duty of described controllable silicon and described magnetic latching relay is detected.
3. combination switch according to claim 2, it is characterized in that, described controllable silicon drive circuit (1) comprises chip HEF4011BT, switch S 7, resistance R 30, R35, R36, NPN type triode Q8, Q9, positive-negative-positive triode Q13, capacitor C 8, common mode inductance T1 and diode D1;
Described chip HEF4011BT comprises 14 pins, built-in four NAND gate circuit;
One end ground connection of described resistance R 35, the other end connects the pin 2 of one end of described switch S 7, oscillographic the second input end and described chip HEF4011BT simultaneously; Another termination power vd D of described switch S 7;
The pin 1 of described chip HEF4011BT connects 7KHZ pulse signal, and pin 3 connects one end of described resistance R 36; The base stage of NPN type triode Q8 described in another termination of described resistance R 36; Ground connection after the emitter of described NPN type triode Q8 is connected with the collector of described positive-negative-positive triode Q13; The collector of described NPN type triode Q8 is connected with base stage, the base stage of described positive-negative-positive triode Q13 and one end of described resistance R 30 of described NPN type triode Q9 simultaneously; The other end of described resistance R 30 is connected with the collector of described NPN type triode Q9 with 12V voltage simultaneously; Emitter, the emitter of described positive-negative-positive triode Q13 and one end of described capacitor C 8 of described NPN type triode Q9 is connected; The input end of common mode inductance T1 described in another termination of described capacitor C 8, the output terminal of described common mode inductance T1 is connected with the anode of described diode D1, and the negative electrode of described diode D1 is connected with described silicon controlled control end.
4. according to the combination switch described in claim 2 or 3, it is characterized in that, described magnetic latching relay control circuit (2) comprises switch S 1, S2, chip ULN2003A and relay HFD27/012-S;
Described chip ULN2003A comprises 16 pins; One termination power vd D of described switch S 1, the pin 2 of chip ULN2003A described in its another termination;
One termination power vd D of described switch S 2, the other end connects the pin 3 of described oscillographic the 3rd input end and described chip ULN2003A simultaneously;
A coil pin of described relay HFD27/012-S connects the pin 15 of described chip ULN2003A, another coil pin of described relay HFD27/012-S connects 12V voltage, a normally closed contact of described relay HFD27/012-S is connected with the pin 14 of described chip ULN2003A, another normally closed contact connects 12V voltage, and two normally opened contacts of described relay HFD27/012-S are connected with the coil two ends of described magnetic latching relay.
5. combination switch according to claim 4, it is characterized in that, in described combination switch, the controllable silicon of each sets in parallel operation and magnetic latching relay are all connected with described controllable silicon drive circuit (1), described magnetic latching relay control circuit (2) and described failure detector circuit (3).
CN201420336800.6U 2014-06-23 2014-06-23 Fault detection circuit and combination switch arranged in fault detection circuit Active CN203894386U (en)

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104980134A (en) * 2015-07-01 2015-10-14 青岛歌尔声学科技有限公司 Reset circuit and electronic equipment having the same
CN106646215A (en) * 2017-01-12 2017-05-10 中国计量大学 Selector switch and own switching fault determining method
CN106680704A (en) * 2017-01-12 2017-05-17 中国计量大学 Composite switch and methods of passing-zero switching control and self-switching fault judgment thereof
CN107015142A (en) * 2017-04-01 2017-08-04 蚌埠市双环电子集团股份有限公司 A kind of intelligent high-pressure D.C. contactor
CN110920545A (en) * 2019-12-04 2020-03-27 华人运通(上海)云计算科技有限公司 Emergency call switch fault detection circuit and car
CN114113908A (en) * 2021-12-03 2022-03-01 蚌埠依爱消防电子有限责任公司 High-voltage signal output and line fault detection circuit thereof

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104980134A (en) * 2015-07-01 2015-10-14 青岛歌尔声学科技有限公司 Reset circuit and electronic equipment having the same
CN104980134B (en) * 2015-07-01 2018-10-19 青岛歌尔声学科技有限公司 A kind of reset circuit and electronic equipment with the circuit
CN106646215A (en) * 2017-01-12 2017-05-10 中国计量大学 Selector switch and own switching fault determining method
CN106680704A (en) * 2017-01-12 2017-05-17 中国计量大学 Composite switch and methods of passing-zero switching control and self-switching fault judgment thereof
CN106680704B (en) * 2017-01-12 2019-06-25 中国计量大学 Combination switch and its operating passing zero control and itself switching fault judgment method
CN106646215B (en) * 2017-01-12 2019-07-02 中国计量大学 Combination switch and its own switching fault judgment method
CN107015142A (en) * 2017-04-01 2017-08-04 蚌埠市双环电子集团股份有限公司 A kind of intelligent high-pressure D.C. contactor
CN110920545A (en) * 2019-12-04 2020-03-27 华人运通(上海)云计算科技有限公司 Emergency call switch fault detection circuit and car
CN114113908A (en) * 2021-12-03 2022-03-01 蚌埠依爱消防电子有限责任公司 High-voltage signal output and line fault detection circuit thereof
CN114113908B (en) * 2021-12-03 2022-07-19 蚌埠依爱消防电子有限责任公司 High-voltage signal output and line fault detection circuit thereof

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