CN203894350U - Fault recording device for ship - Google Patents
Fault recording device for ship Download PDFInfo
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- CN203894350U CN203894350U CN201420286749.2U CN201420286749U CN203894350U CN 203894350 U CN203894350 U CN 203894350U CN 201420286749 U CN201420286749 U CN 201420286749U CN 203894350 U CN203894350 U CN 203894350U
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- 238000012545 processing Methods 0.000 claims abstract description 49
- 238000006243 chemical reaction Methods 0.000 claims description 6
- 238000003745 diagnosis Methods 0.000 description 5
- 238000004458 analytical method Methods 0.000 description 4
- 238000004088 simulation Methods 0.000 description 4
- 238000012360 testing method Methods 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 230000003750 conditioning effect Effects 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 238000012544 monitoring process Methods 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
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- 238000013461 design Methods 0.000 description 1
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Abstract
The utility model discloses a fault recording device for a ship, which comprises the components of: at least one signal acquiring/processing circuit, a VME bus back board which is connected with the output end of each signal acquiring/processing circuit, a VME industrial control mainboard which is connected with the VME bus back board, and a memory which is connected with the VME industrial control mainboard; wherein the signal acquiring/processing circuit receives an electric signal from a device to be tested, performs voltage shunting on the received electric signal and outputs a corresponding electric signal to the VME bus back board. The VME bus back board outputs the received electric signal to the VME industrial control mainboard. The VME industrial control mainboard outputs the received electric signal to the memory. The fault recording device for the ship according to the utility model facilitates fault reason determining by a user.
Description
Technical field
The utility model relates to technical field of ships, relates in particular to a kind of failure recording device peculiar to vessel.
Background technology
Fault diagnosis system peculiar to vessel is generally to carry out fault diagnosis for the main power system of boats and ships or marine main engine, and the small fault or the chance failure that for boats and ships, occur can not be found in time.And in ship's navigation with between the operating period, contingency small fault occurs more, and many times these contingency small faults can't affect the operation of boats and ships completely, only have As time goes on, cause more other faults constantly to take place frequently, fault diagnosis system just can detect.In addition,, for the unknown cause burst chance failure that only can just there will be under some operating mode, fault diagnosis system is difficult to obtain failure message.Therefore, the defect of fault diagnosis system is when boats and ships break down, and is difficult to looking up the fault reason.
Foregoing is only understood the technical solution of the utility model for auxiliary, does not represent and admits that foregoing is prior art.
Utility model content
Fundamental purpose of the present utility model is to provide a kind of failure recording device peculiar to vessel, is intended to be convenient to looking up the fault reason.
To achieve these goals, the failure recording device peculiar to vessel that the utility model provides, for recording the electric signal of device output to be measured, described failure recording device peculiar to vessel comprises at least one signal acquisition processing circuit, the VME bus backplane being connected with signal acquisition processing circuit output terminal described in each, the VME industrial control mainboard being connected with described VME bus backplane and the storer being connected with described VME industrial control mainboard;
Wherein, described signal acquisition processing circuit receives the electric signal from device to be measured, and the electric signal receiving is carried out exporting corresponding electric signal to described VME bus backplane after dividing potential drop, described VME bus backplane exports the electric signal of reception to described VME industrial control mainboard, and described VME industrial control mainboard exports the electric signal of reception to described storer.
Preferably, described signal acquisition processing circuit comprises at least one for receiving the voltage of described device output to be measured or the voltage/current input end of current signal, the dividing potential drop electronic circuit connecting one to one with described each voltage/current input end, the MUX switch electronic circuit being connected with each dividing potential drop electronic circuit output terminal, the gain control system circuit being connected with described MUX switch electronic circuit output terminal, the A/D collection electronic circuit being connected with described gain control system circuit output end and gathering with described A/D the FPGA bridge joint electronic circuit that electronic circuit output terminal is connected, wherein
Described voltage/current input end exports the voltage of reception or current signal to corresponding dividing potential drop electronic circuit, described MUX switch electronic circuit is controlled corresponding dividing potential drop electronic circuit and is connected with described gain control system circuit, described dividing potential drop electronic circuit carries out by described MUX switch electronic circuit, exporting described gain control system circuit to after voltage division processing to the voltage or the current signal that receive, described gain control system circuit exports described A/D to after the voltage receiving or current signal are zoomed in or out and gathers electronic circuit, described A/D gathers after electronic circuit gathers the voltage receiving or current signal and exports described FPGA bridge joint electronic circuit to, described FPGA bridge joint electronic circuit carries out by described VME bus backplane, exporting described VME industrial control mainboard to after format conversion to the voltage or the current signal that receive.
Preferably, described signal acquisition processing circuit also comprises at least one for receiving the switching value input end of the switching value signal of described device output to be measured, and described switching value input end is connected with described FPGA bridge joint electronic circuit.
Preferably, described signal acquisition processing circuit also comprises separaant circuit, the output terminal that described A/D gathers electronic circuit is connected with the input end of described separaant circuit with described switching value input end, and the output terminal of described separaant circuit is connected with described FPGA bridge joint electronic circuit.
Preferably, described signal acquisition processing circuit also comprises at least one for adjusting the intrinsic standoff ratio adjustment electronic circuit of described dividing potential drop electronic circuit intrinsic standoff ratio, and the output terminal that described intrinsic standoff ratio is adjusted electronic circuit is connected with the control end of described dividing potential drop electronic circuit.
Preferably, described signal acquisition processing circuit also comprises for adjusting the gain of described gain control system circuit gain adjusts electronic circuit, and the output terminal that electronic circuit is adjusted in described gain is connected with the control end of described gain control system circuit.
Preferably, described signals collecting electronic circuit also comprises the isolated amplifier of being located between described gain control system circuit and described A/D collection electronic circuit.
Preferably, described signals collecting electronic circuit also comprises the demonstration electronic circuit being connected with described gain control system circuit output end.
The failure recording device peculiar to vessel that the utility model provides, by at least one signal acquisition processing circuit, receive the electric signal from device to be measured, and the electric signal receiving is carried out exporting corresponding electric signal after dividing potential drop, by VME bus backplane and described VME industrial control mainboard, export corresponding electric signal to described storer, electric signal device real-time working to be measured being produced for storer stores, thereby when boats and ships break down, user can come the reason of failure judgement generation and the position of fault generation etc. according to the electric signal that can react device duty to be measured of storing in storer, in addition, when boats and ships do not break down, user also can check the work electric signal of the device to be measured of having stored in storer at any time, thereby make user can find in time that some do not affect glitch and some chance failures of the normal operation of boats and ships, user can correspondingly be processed according to these glitch and chance failure in time, avoided these glitch and chance failure to continue development and caused some significant troubles even to affect the normal operation of boats and ships.
Accompanying drawing explanation
Fig. 1 is the principle schematic of the utility model failure recording device one embodiment peculiar to vessel.
The realization of the utility model object, functional characteristics and advantage, in connection with embodiment, are described further with reference to accompanying drawing.
Embodiment
Should be appreciated that specific embodiment described herein is only in order to explain the utility model, and be not used in restriction the utility model.
The utility model provides a kind of failure recording device peculiar to vessel, for recording the electric signal of device output to be measured, with reference to Fig. 1, Fig. 1 is the principle schematic of the utility model failure recording device one embodiment peculiar to vessel, and this failure recording device peculiar to vessel comprises at least one signal acquisition processing circuit 10, the VME bus backplane 20 being connected with 10 output terminals of signal acquisition processing circuit described in each, the VME industrial control mainboard 30 being connected with described VME bus backplane 20 and the storer 40 being connected with described VME industrial control mainboard 30;
Wherein, the electric signal that described signal acquisition processing circuit 10 receives from device to be measured, and the electric signal receiving is carried out exporting corresponding electric signal to described VME bus backplane 20 after dividing potential drop, described VME bus backplane 20 exports the electric signal of reception to described VME industrial control mainboard 30, and described VME industrial control mainboard 30 exports the electric signal of reception to described storer 40.
In the present embodiment, above-mentioned device to be measured can be the sensor on boats and ships, various topworks and control gear.Above-mentioned signal acquisition processing circuit 10 can receive the analog output signal from sensor, topworks and control gear, also can receive the switch output signal from sensor, topworks and control gear.
Above-mentioned VME industrial control mainboard 30 is provided with for connecting the Ethernet interface of peripheral hardware and USB interface etc., and above-mentioned VME bus backplane 20 is located at for connecting the RS232 interface of peripheral hardware and VGA interface etc.Above-mentioned failure recording device peculiar to vessel also comprises CAN bus circuit, analogue quantity output circuit and switching value output circuit, wherein, CAN bus circuit, analogue quantity output circuit and switching value output circuit are connected with VME industrial control mainboard 30 by VME bus backplane 20, and VME industrial control mainboard 30 conducts interviews by 20 pairs of subsystems of VME bus backplane.VME industrial control mainboard 30 is connected to the main frame of centralized control chamber by CAN bus circuit, for capture systems running parameter, by data and the system operational parameters of Ethernet, USB interface transmission Real-Time Monitoring record, for carrying out follow-up fault analysis, location and carrying out record as important historical data, for the security of operation of boats and ships from now on maintenance provides safeguard and record.
During above-mentioned failure recording device work peculiar to vessel, signal acquisition processing circuit 10 can Real-time Collection the various electric signal of above-mentioned device output to be measured, and the electric signal collecting is carried out to corresponding conversion and pass through afterwards VME bus transfer to VME industrial control mainboard 30, VME industrial control mainboard 30 exports the electric signal receiving to storer 40, for storer 40, the electric signal of above-mentioned signal acquisition processing circuit 10 Real-time Collections is stored.Above-mentioned signal acquisition processing circuit 10 can carry out voltage division processing by the voltage collecting or current signal, so that the voltage of output or current signal are in preset range, for subsequent conditioning circuit, it is processed.
The quantity of above-mentioned signal acquisition processing circuit 10 can arrange according to actual needs, and wherein, above-mentioned signal acquisition processing circuit 10 all adopts modular design, and the quantity of the signal gathering as required arranges the quantity of this signal acquisition processing circuit 10.
By the in-depth analysis to ship control system, find, the link that affects boats and ships duty is a lot, wherein work mechanism and control assembly are many on the impact of boats and ships duty, while searching the state of contingency transient fault and fluctuation of service, need to carry out comprehensive on-line monitoring and record analysis to action, sensor feedback signal and the system operational parameters etc. of the control signal in each work mechanism operational process, topworks, to can obtain the failure message in running status, thereby be conducive to follow-up fault analysis.Control signal, sensor signal, the actuating signal of topworks and the running parameter of system that gathers and record each loop of boats and ships is for analysis of failure and search non-steady state and seem particularly important.
The failure recording device peculiar to vessel that the utility model provides, the electric signal receiving from device to be measured by least one signal acquisition processing circuit 10, and the electric signal receiving is carried out exporting corresponding electric signal after dividing potential drop, by VME bus backplane 20 and described VME industrial control mainboard 30, export corresponding electric signal to described storer 40, electric signal device real-time working to be measured being produced for storer 40 stores, thereby when boats and ships break down, user can come the reason of failure judgement generation and the position of fault generation etc. according to the electric signal that can react device duty to be measured of storage in storer 40, in addition, when boats and ships do not break down, user also can check the work electric signal of the device to be measured of having stored in storer 40 at any time, thereby make user can find in time that some do not affect glitch and some chance failures of the normal operation of boats and ships, user can correspondingly be processed according to these glitch and chance failure in time, avoided these glitch and chance failure to continue development and caused some significant troubles even to affect the normal operation of boats and ships.
In addition, above-mentioned failure recording device peculiar to vessel can also be for simulated experiment, when using simulation test function: VME industrial control mainboard 30 can apply simulation test signal (this signal is by the signal of above-mentioned failure recording device collection peculiar to vessel and record) to simulation experiment platform by CAN bus circuit, switching value output circuit and analogue quantity output circuit, and monitor the sensor feedback signal of simulation experiment platform, whether the action of control signal and topworks is normal; Whether the corresponding relation of signal value and input signal and all parts in service there is inefficacy or unstable, can judge thus fault and non-steady state nidus.Parameter under the different operating modes of operation that simultaneously also can be artificial also applies simulating signal to each loop, test and be recorded in the working values such as the actuating signal of control signal under different operating modes, sensor signal, topworks and transmission voltage signal, various thermal parameters, for simulating contingency transient fault and non-steady state.And unnecessary whole boats and ships are all tested under operational configuration, for searching problem, bring great convenience, and saved cost.
Particularly, described signal acquisition processing circuit 10 comprises at least one for receiving the voltage of described device output to be measured or the voltage/current input end 101 of current signal, the dividing potential drop electronic circuit 102 connecting one to one with described each voltage/current input end 101, the MUX switch electronic circuit 103 being connected with each dividing potential drop electronic circuit 102 output terminals, the gain control system circuit 104 being connected with described MUX switch electronic circuit 103 output terminals, the A/D being connected with described gain control system circuit 104 output terminals gathers electronic circuit 105 and gathers with described A/D the FPGA bridge joint electronic circuit 106 that electronic circuit 105 output terminals are connected, wherein,
Described voltage/current input end 101 exports the voltage of reception or current signal to corresponding dividing potential drop electronic circuit 102, described MUX switch electronic circuit 103 is controlled corresponding dividing potential drop electronic circuit 102 and is connected with described gain control system circuit 104, the voltage of 102 pairs of receptions of described dividing potential drop electronic circuit or current signal carry out by described MUX switch electronic circuit 103, exporting described gain control system circuit 104 to after voltage division processing, after the voltage of 104 pairs of receptions of described gain control system circuit or current signal zoom in or out, export described A/D to and gather electronic circuit 105, after gathering, the voltage of 105 pairs of receptions of described A/D collection electronic circuit or current signal export described FPGA bridge joint electronic circuit 106 to, the voltage of 106 pairs of receptions of described FPGA bridge joint electronic circuit or current signal carry out by described VME bus backplane 20, exporting described VME industrial control mainboard 30 to after format conversion.
In the present embodiment, above-mentioned voltage/current input end 101 can connect 0 to 3000V combined-voltage signal, 0 to the 3000V combined-voltage signal that above-mentioned dividing potential drop electronic circuit 102 can receive voltage/current input end 101 is converted to the alternating current-direct current small-signal that above-mentioned gain control system circuit 104 can be processed, so that subsequent conditioning circuit can be processed and gather.Above-mentioned gain control system circuit 104 is an agc circuit, can carry out automatic gain control, can, so that large-signal is dwindled automatically, and small-signal be amplified automatically.Be made as-the 10V of reference voltage that above-mentioned A/D gathers electronic circuit 105 is between+10V, therefore, above-mentioned gain control system circuit 104 output voltage ranges be-10V extremely+10V between.Above-mentioned FPGA bridge joint electronic circuit 106 can be converted to the electric signal that is gathered electronic circuit 105 collections by A/D the electric signal of bus format and export VME bus backplane 20 to.
The quantity of the voltage/current input end 101 that each signal acquisition processing circuit 10 is set can arrange according to actual needs, and in the present embodiment, the quantity of the voltage/current input end 101 that each signal acquisition processing circuit 10 is set is 4.The quantity of above-mentioned dividing potential drop electronic circuit 102 is identical with the quantity of voltage/current input end 101.It is each voltage/current input end 101 dividing potential drop electronic circuit 102 that all connects one to one.
During work, the combined-voltage signal that above-mentioned voltage/current input end 101 receives from device to be measured, and export the combined-voltage signal of reception to above-mentioned dividing potential drop electronic circuit 102, after the combined-voltage signal of 102 pairs of receptions of dividing potential drop electronic circuit carries out voltage division processing, output AC/DC small-signal is to MUX switch electronic circuit 103, MUX switch electronic circuit 103 exports the alternating current-direct current small-signal receiving to gain control system circuit 104, the alternating current-direct current small-signal of 104 pairs of receptions of gain control system circuit exports A/D collection electronic circuit 105 to after zooming in or out processing according to certain gain, the alternating current-direct current small-signal that 105 pairs of electronic circuits of A/D collection receive carries out by above-mentioned FPGA bridge joint electronic circuit 106, being sent to VME bus backplane 20 after analog to digital conversion, and finally by above-mentioned VME industrial control mainboard 30, be stored in storer 40.
Further, described signal acquisition processing circuit 10 also comprises at least one for receiving the switching value input end 107 of the switching value signal of described device output to be measured, and described switching value input end 107 is connected with described FPGA bridge joint electronic circuit 106.The quantity of the switching value input end 107 that each signal acquisition processing circuit 10 is set can arrange according to actual needs, and in the present embodiment, each signal acquisition processing circuit 10 arranges 4 switching value input ends 107.The present embodiment, by switching value input end 107 is set, makes this signal acquisition processing circuit 10 can also gather the switching value signal that device to be measured is exported, and has expanded the usable range of this failure recording device peculiar to vessel.
Further, described signal acquisition processing circuit 10 also comprises separaant circuit 108, the output terminal that described A/D gathers electronic circuit 105 is connected with the input end of described separaant circuit 108 with described switching value input end 107, and the output terminal of described separaant circuit 108 is connected with described FPGA bridge joint electronic circuit 106.Above-mentioned separaant circuit 108 is photoelectric isolating circuit, and the present embodiment, by separaant circuit 108 is set, can suppress system noise effectively, eliminate to disturb, and makes the data that are finally stored in storer 40 more accurate.
Further, described signal acquisition processing circuit 10 also comprises at least one for adjusting the intrinsic standoff ratio adjustment electronic circuit 109 of described dividing potential drop electronic circuit 102 intrinsic standoff ratios, and the output terminal that described intrinsic standoff ratio is adjusted electronic circuit 109 is connected with the control end of described dividing potential drop electronic circuit 102.In the present embodiment, can an intrinsic standoff ratio adjustment electronic circuit 109 be set 10 of each signal acquisition processing circuits, and this intrinsic standoff ratio Circuit tuning is connected to respectively the control end of each dividing potential drop electronic circuit 102, at this moment each set dividing potential drop electronic circuit 102 of each signal acquisition processing circuit 10 shares an intrinsic standoff ratio and adjusts electronic circuit 109; In addition, also can each dividing potential drop electronic circuit 102 respectively correspondence one intrinsic standoff ratio be set adjust electronic circuit 109.
Further, described signal acquisition processing circuit 10 also comprises for adjusting the gain of described gain control system circuit 104 gains adjusts electronic circuit 110, and the output terminal that electronic circuit 110 is adjusted in described gain is connected with the control end of described gain control system circuit 104.In the present embodiment, above-mentioned gain is adjusted electronic circuit 110 and is manual agc circuit, user can adjust electronic circuit 110 to above-mentioned gain according to actual needs and adjust, thereby ride gain is controlled the ratio that 104 pairs of electric signal that receive from dividing potential drop electronic circuit 102 of electronic circuit zoom in or out.
Further, described signals collecting electronic circuit also comprises the isolated amplifier 111 of being located between described gain control system circuit 104 and described A/D collection electronic circuit 105.The present embodiment, by isolated amplifier 111 is set, can suppress system noise effectively, eliminates and disturbs.
Further, described signals collecting electronic circuit also comprises the demonstration electronic circuit 112 being connected with described gain control system circuit 104 output terminals.In the present embodiment, above-mentioned demonstration electronic circuit 112 comprises LED light beam, is mainly used in showing that electric signal after gain control system circuit 104 is processed is whether within presetting range.Gain control system circuit 104 output signal ranges of take in the present embodiment describe to+10V as example at-10V, when gain control system circuit 104 output electrical signals at-10V in+10V time, LED light beam extinguishes, when gain control system circuit 104 output electrical signals at-10V to beyond+10V time, LED light beam is luminous.Thereby when user finds that LED light beam is luminous, judgement gain control system circuit 104 occur abnormal.
These are only preferred embodiment of the present utility model; not thereby limit the scope of the claims of the present utility model; every equivalent structure or conversion of equivalent flow process that utilizes the utility model instructions and accompanying drawing content to do; or be directly or indirectly used in other relevant technical fields, be all in like manner included in scope of patent protection of the present utility model.
Claims (8)
1. a failure recording device peculiar to vessel, for recording the electric signal of device output to be measured, it is characterized in that, described failure recording device peculiar to vessel comprises at least one signal acquisition processing circuit, the VME bus backplane being connected with signal acquisition processing circuit output terminal described in each, the VME industrial control mainboard being connected with described VME bus backplane and the storer being connected with described VME industrial control mainboard;
Wherein, described signal acquisition processing circuit receives the electric signal from device to be measured, and the electric signal receiving is carried out exporting corresponding electric signal to described VME bus backplane after dividing potential drop, described VME bus backplane exports the electric signal of reception to described VME industrial control mainboard, and described VME industrial control mainboard exports the electric signal of reception to described storer.
2. failure recording device peculiar to vessel as claimed in claim 1, it is characterized in that, described signal acquisition processing circuit comprises at least one for receiving the voltage of described device output to be measured or the voltage/current input end of current signal, the dividing potential drop electronic circuit connecting one to one with described each voltage/current input end, the MUX switch electronic circuit being connected with each dividing potential drop electronic circuit output terminal, the gain control system circuit being connected with described MUX switch electronic circuit output terminal, the A/D being connected with described gain control system circuit output end gathers electronic circuit and gathers with described A/D the FPGA bridge joint electronic circuit that electronic circuit output terminal is connected, wherein,
Described voltage/current input end exports the voltage of reception or current signal to corresponding dividing potential drop electronic circuit, described MUX switch electronic circuit is controlled corresponding dividing potential drop electronic circuit and is connected with described gain control system circuit, described dividing potential drop electronic circuit carries out by described MUX switch electronic circuit, exporting described gain control system circuit to after voltage division processing to the voltage or the current signal that receive, described gain control system circuit exports described A/D to after the voltage receiving or current signal are zoomed in or out and gathers electronic circuit, described A/D gathers after electronic circuit gathers the voltage receiving or current signal and exports described FPGA bridge joint electronic circuit to, described FPGA bridge joint electronic circuit carries out by described VME bus backplane, exporting described VME industrial control mainboard to after format conversion to the voltage or the current signal that receive.
3. failure recording device peculiar to vessel as claimed in claim 2, it is characterized in that, described signal acquisition processing circuit also comprises at least one for receiving the switching value input end of the switching value signal of described device output to be measured, and described switching value input end is connected with described FPGA bridge joint electronic circuit.
4. failure recording device peculiar to vessel as claimed in claim 3, it is characterized in that, described signal acquisition processing circuit also comprises separaant circuit, the output terminal that described A/D gathers electronic circuit is connected with the input end of described separaant circuit with described switching value input end, and the output terminal of described separaant circuit is connected with described FPGA bridge joint electronic circuit.
5. failure recording device peculiar to vessel as claimed in claim 2, it is characterized in that, described signal acquisition processing circuit also comprises at least one for adjusting the intrinsic standoff ratio adjustment electronic circuit of described dividing potential drop electronic circuit intrinsic standoff ratio, and the output terminal that described intrinsic standoff ratio is adjusted electronic circuit is connected with the control end of described dividing potential drop electronic circuit.
6. failure recording device peculiar to vessel as claimed in claim 2, it is characterized in that, described signal acquisition processing circuit also comprises for adjusting the gain of described gain control system circuit gain adjusts electronic circuit, and the output terminal that electronic circuit is adjusted in described gain is connected with the control end of described gain control system circuit.
7. failure recording device peculiar to vessel as claimed in claim 2, is characterized in that, described signals collecting electronic circuit also comprises the isolated amplifier of being located between described gain control system circuit and described A/D collection electronic circuit.
8. failure recording device peculiar to vessel as claimed in claim 2, is characterized in that, described signals collecting electronic circuit also comprises the demonstration electronic circuit being connected with described gain control system circuit output end.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420286749.2U CN203894350U (en) | 2014-05-30 | 2014-05-30 | Fault recording device for ship |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420286749.2U CN203894350U (en) | 2014-05-30 | 2014-05-30 | Fault recording device for ship |
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| CN203894350U true CN203894350U (en) | 2014-10-22 |
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| CN201420286749.2U Expired - Fee Related CN203894350U (en) | 2014-05-30 | 2014-05-30 | Fault recording device for ship |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109696902A (en) * | 2018-12-06 | 2019-04-30 | 奇瑞汽车股份有限公司 | A kind of signal recording apparatus, fault point detection circuit and method |
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2014
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109696902A (en) * | 2018-12-06 | 2019-04-30 | 奇瑞汽车股份有限公司 | A kind of signal recording apparatus, fault point detection circuit and method |
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Granted publication date: 20141022 |