CN203858844U

CN203858844U - Driving circuit, display device and electronic equipment

Info

Publication number: CN203858844U
Application number: CN201420205055.1U
Authority: CN
Inventors: 蒋新喜; 莫良华; 张鹏
Original assignee: FocalTech Systems Ltd
Current assignee: Dun Tai Electronics Co., Ltd.
Priority date: 2014-04-24
Filing date: 2014-04-24
Publication date: 2014-10-01
Anticipated expiration: 2024-04-24
Also published as: TWM500968U

Abstract

The utility model provides a driving circuit, a display device and electronic equipment. The driving circuit comprises a clock signal generating unit and a control unit, wherein the clock signal generating unit generates clock signals, variation from a first level to a second level in each clock signal is used for triggering a scan driving circuit to generate scanning signals transmitted by scanning lines correspondingly, the variation from the first level to the second level is defined to be effective signal edges of the clock signals, and the time between the adjacent effective signal edges is the clock time; and the control unit controls the clock time of the clock signals to be not completely identical, the clock time comprises first clock time and second clock time, the second clock time is greater than the first clock time, and the control unit is further used for controlling the clock time to reach the second clock time at least once in the process of displaying a frame image by a display panel. The display device and the electronic equipment comprise the driving circuit. According to the driving circuit, the display device and the electronic equipment, the noise caused by electromagnetic interference in the display panel can be reduced.

Description

Driving circuit, display device and electronic equipment

Technical field

The utility model relates to integrated electronic field, relates in particular to a kind of driving circuit, display device and electronic equipment.

Background technology

Along with the raising gradually that electronic equipment integrated level is required, display device can be integrated in an electronic equipment with other electronic installations conventionally.For example, display device and touching device are integrated in a mobile phone, for realizing touch-control, show.Yet, when display device shows, drive electric current and voltage in signal to change along with the time, thereby produce electromagnetic interference (EMI).The noise signal that described electromagnetic interference (EMI) is other electronic installations of integrating with display device.

Utility model content

The problem that the utility model solves is to provide a kind of driving circuit, display device and electronic equipment, to reduce the impact of the electromagnetic interference (EMI) of display device on other electronic installations.

For addressing the above problem, the utility model provides a kind of driving circuit, be used for driving display panel to carry out image demonstration, described display panel comprises a plurality of display units and multi-strip scanning line, each sweep trace connects a plurality of display units, described multi-strip scanning line, for transmitting sweep signal that scan driving circuit provides to described a plurality of display units, carries out image demonstration to activate the display unit being connected with sweep trace; Described driving circuit comprises: clock signal generation unit, for generation of clock signal, described in each, clock signal is the signal that the first level and second electrical level alternately occur, described the first level is different from the electromotive force of second electrical level, the first level described in each in clock signal to the variation of second electrical level produces the sweep signal of the corresponding transmission of each sweep trace for triggering described scan drive circuit, define described the first level to the useful signal edge that is changed to clock signal of second electrical level, the time between adjacent useful signal edge is clock time; Control module, for controlling the described clock time of described clock signal incomplete same, described clock time comprises the first clock time and second clock time, and the second clock time is greater than the first clock time, described control module also, for show the process of a two field picture at display panel, is controlled at least one times described clock time and is reached the second clock time.

The duration of the described sweep signal that in the clock signal that alternatively, described clock signal generation unit produces, the duration of second electrical level produces with described scan drive circuit is identical, described control module, for controlling each duration that described first level of described clock signal occurs incomplete same, the described duration comprises the first duration and the second duration, and described the second duration is greater than described the first duration, described control module is also for showing the process of a two field picture at display panel, the duration of controlling at least one times described the first level reached for the second duration, the first duration of described the first level and the duration sum of described second electrical level are described the first clock time, the second duration of described the first level and the duration sum of described second electrical level are the described second clock time.

Alternatively, clock signal generation unit, for generation of two clock signals, lines by line scan the described scan drive circuit pair sweep trace being connected with described scan drive circuit; In described two clock signals, the first duration of the first level of one of them person is identical with the second electrical level duration of another one; Described control module is for showing the process of a two field picture at display panel, the duration of controlling at least one times the first level of described two clock signals reached for the second duration.

Alternatively, described scan drive circuit comprises: for the first sub-scan drive circuit that first group of sweep trace lined by line scan, for the second sub-scan drive circuit that second group of sweep trace lined by line scan, described first group of sweep trace and described second group of sweep trace are adjacent horizontal scanning line; Described clock signal generation unit is for generation of the first clock signal, second clock signal, the 3rd clock signal and the 4th clock signal, and described the first clock signal and described the 3rd clock signal are used for triggering described the first sub-scan drive circuit first group of sweep trace lined by line scan; Described second clock signal and described the 4th clock signal are used for triggering described the second sub-scan drive circuit second group of sweep trace are lined by line scan; Described the first clock signal is identical with the second electrical level duration of another one with the first duration of the first level of one of them person of the 3rd clock signal, described second clock signal is identical with the second electrical level duration of another one with the first duration of the first level of one of them person of the 4th clock signal, the second electrical level duration of described the first clock signal and described second clock signal exists overlapping, and the second electrical level duration of described the 3rd clock signal and described four clock signals exists overlapping; Described control module is for showing the process of a two field picture at display panel, the duration of controlling at least one times the first level of described the first clock signal, second clock signal, the 3rd clock signal and the 4th clock signal reached for the second duration.

Alternatively, described scan drive circuit comprises: for the first sub-scan drive circuit that first group of sweep trace lined by line scan, for the second sub-scan drive circuit that second group of sweep trace lined by line scan, described first group of sweep trace and described second group of sweep trace are adjacent horizontal scanning line, described clock signal generation unit is for generation of the first clock signal, second clock signal, the 3rd clock signal and the 4th clock signal, and described the first clock signal and described the 3rd clock signal are used for triggering described the first sub-scan drive circuit first group of sweep trace lined by line scan, described second clock signal and described the 4th clock signal are used for triggering described the second sub-scan drive circuit second group of sweep trace are lined by line scan, described control module, be used for controlling described the first clock signal, each duration that the described second electrical level of the 3rd clock signal occurs is also incomplete same, the described duration comprises the first duration and the second duration, and described the second duration is greater than described the first duration, also for controlling described second clock signal, each duration that described first level of the 4th clock signal occurs is also incomplete same, the described duration comprises the 3rd duration and the 4th duration, and described the 4th duration is greater than described the 3rd duration, described control module is also for showing the process of a two field picture at display panel, control at least one times described the first clock signal, the second electrical level duration of the 3rd clock signal reached for the second duration, described second clock signal, the first level duration of the 4th clock signal reached for the 4th duration, the first duration sum of the duration of described the first clock signal, the 3rd clock signal the first level and described second electrical level is described the first clock time, and the second duration sum of the duration of described the first level and described second electrical level is the described second clock time, the 3rd duration sum of the duration of described second clock signal, the 4th clock signal second electrical level and described the first level is described the first clock time, and the 4th duration sum of the duration of described second electrical level and described the first level is the described second clock time.

The duration of the described sweep signal that in the clock signal that alternatively, described clock signal generation unit produces, the duration sum of the first level and second electrical level produces with described scan drive circuit is identical, described control module, for controlling each duration that described first level of described clock signal occurs incomplete same, the described duration comprises the first duration and the second duration, and described the second duration is greater than described the first duration, described control module is also for showing the process of a two field picture at display panel, the duration of controlling at least one times the first level reached for the second duration, the first duration of described the first level and the duration sum of described second electrical level are described the first clock time, the second duration of described the first level and the duration sum of described second electrical level are the described second clock time, or, described control module, for controlling each duration that the described second electrical level of described clock signal occurs incomplete same, the described duration comprises the first duration and the second duration, and described the second duration is greater than described the first duration, described control module is also for showing the process of a two field picture at display panel, the duration of controlling at least one times second electrical level reached for the second duration, the first duration of described second electrical level and the duration sum of described the first level are described the first clock time, the second duration of described second electrical level and the duration sum of described the first level are the described second clock time.

Alternatively, the demonstration of each two field picture is also provided for the frame synchronizing signal providing according to a frame synchronizing signal unit described multi-strip scanning line; Described scan drive circuit is also for providing line synchronizing signal; Described control module is connected with scan drive circuit with described frame synchronizing signal unit, for judging whether that according to described frame synchronizing signal and line synchronizing signal the clock time of controlling described clock signal reaches the second clock time.

Alternatively, described control module comprises: storer, and for storing default row information, described default row information reaches the row information of second clock time corresponding sweep trace while reaching for controlling described clock time; Judge module, is connected with storer with described frame synchronizing signal unit, scan drive circuit, for the line synchronizing signal that judgement receives after receiving a frame synchronizing signal, whether meets described default row information; Control module, all be connected with described frame synchronizing signal unit, scan drive circuit, judge module, for when judge module judges that described line synchronizing signal meets described default row information, make the clock time of the clock signal of described clock signal generation unit output reach the second clock time.

Alternatively, described control module is also for sending described line synchronizing signal to described clock signal generation unit, so that described clock signal generation unit produces described clock signal; Described control module, for judging that at judge module described line synchronizing signal stops while meeting described default row information providing described line synchronizing signal to reach the first Preset Time to described clock signal generation unit, so that the clock time of described clock signal reaches the second clock time.

Alternatively, described control module, for when judge module judges that described line synchronizing signal meets described default row information, forms stop signal, and described stop signal comprises invalid signals and useful signal; Described clock signal generation unit for making immediately the clock time of output reach the second clock time when described stop signal switches to useful signal from invalid signals; Or described clock signal generation unit makes the clock time of exporting reach the second clock time for switch to the second Preset Time of useful signal from invalid signals in described stop signal after.

Alternatively, described stop signal is the square-wave signal that the 3rd level and the 4th level form, and described the 3rd level is different from the electromotive force of described the 4th level; Described the 3rd level is described useful signal, and described the 4th level is described invalid signals; Or described the 4th level is described useful signal, described the 3rd level is described invalid signals.

Alternatively, described clock signal generation unit, comprising: inceptive impulse generation module, is used to form inceptive impulse; Clock signal generating module, for producing described clock signal according to described inceptive impulse; Reset signal generation module, is used to form reset signal, and described reset signal is used for making described inceptive impulse generation module again to export inceptive impulse after the 3rd Preset Time; Described control module, be connected with described reset signal generation module, for show the process of a two field picture at display panel, control at least one times described reset signal generation module and produce described reset signal, so that the clock time of the clock signal of clock signal generating module output reaches the second clock time.

Alternatively, described clock signal generation unit produces at least two clock signals, the second duration of the first level of described at least two clock signals exists overlapping, described in definition, the second equitant time of duration of the first level of at least two clock signals is time out, at described time out, the first level of described at least two clock signals makes described scan drive circuit time-out scan sweep trace, the clock signal that described clock signal generation unit produces for making described scan drive circuit provide sweep signal at least one horizontal scanning line before time out, to carry out the scanning of sweep trace, described control module makes described scan drive circuit from next line sweep trace, start the clock signal of scanning for control described clock signal generation unit generation after time out.

Alternatively, described clock signal generation unit produces at least two clock signals, the second duration of the first level of described at least two clock signals exists overlapping, described in definition, the second equitant time of duration of the first level of at least two clock signals is time out, at described time out, the first level of described at least two clock signals makes described scan drive circuit time-out scan sweep trace; The clock signal that described clock signal generation unit produces for making described scan drive circuit provide sweep signal at least one horizontal scanning line, to carry out the scanning of sweep trace before time out; Described control module makes described scan drive circuit from a line at least reciprocal of scanned sweep trace, start the clock signal of scanning for control described clock signal generation unit generation after time out.

Alternatively, described clock signal generation unit produces at least two clock signals, the first level of a part of clock signal in described at least two clock signals produces described sweep signal for driven sweep driving circuit, the second electrical level of another part clock signal produces described sweep signal for driven sweep driving circuit, the second duration of the first level of described at least two clock signals exists overlapping, described in definition, the second equitant time of duration of the first level of at least two clock signals is time out, at described time out, the clock signal that adopts the first level driven sweep driving circuit to produce described sweep signal makes described scan drive circuit continue sweep trace to scan, the clock signal that adopts second electrical level driven sweep driving circuit to produce described sweep signal makes described scan drive circuit time-out scan sweep trace.

Alternatively, described driving circuit comprises described scan drive circuit.

Correspondingly, the utility model also provides a kind of display device, comprise: display panel, comprise a plurality of display units and multi-strip scanning line, each sweep trace connects a plurality of display units, described multi-strip scanning line, for transmitting sweep signal that scan driving circuit provides to described a plurality of display units, carries out image demonstration to activate the display unit being connected with sweep trace; Driving circuit, for driving display panel to carry out image demonstration, the driving circuit that described driving circuit provides for the utility model.

Alternatively, described scan drive circuit is arranged on described display panel.

Alternatively, described display panel is display panels.

Correspondingly, the utility model also provides a kind of display device, comprise: display panel, comprise a plurality of display units and multi-strip scanning line, each sweep trace connects a plurality of display units, described multi-strip scanning line, for transmitting sweep signal that scan driving circuit provides to described a plurality of display units, carries out image demonstration to activate the display unit being connected with sweep trace;

Driving circuit, for driving display panel to carry out image demonstration, the driving circuit that described driving circuit provides for the utility model; The touch control detection circuit that described display device further comprises contact panel and is connected with contact panel, touch control detection circuit carries out touch control detection at described time out to described contact panel.

Alternatively, described contact panel or be external hanging touch panel, or be embedded touch control panel.

Correspondingly, the utility model provides a kind of electronic equipment, comprise: display device, described display device comprises: display panel, comprise a plurality of display units and multi-strip scanning line, each sweep trace connects a plurality of display units, and described multi-strip scanning line, for transmitting sweep signal that scan driving circuit provides to described a plurality of display units, carries out image demonstration to activate the display unit being connected with sweep trace; Driving circuit, for driving display panel to carry out image demonstration, described driving circuit is the driving circuit that the utility model offers.

Alternatively, described display panel is display panels.

Alternatively, described electronic equipment is mobile phone, panel computer, notebook computer or desktop computer..

Correspondingly, the utility model also provides a kind of electronic equipment, comprising: electronic equipment comprises first device and the second device, and wherein first device is display device, and the second device is in described time out work.

Alternatively, the second device is contactor control device.

Alternatively, described contactor control device comprises the touch control detection circuit that contact panel is connected with this contact panel, and touch control detection circuit carries out touch control detection at described time out to described contact panel.

Compared with prior art, the technical solution of the utility model has the following advantages:

Under the control of control module, make the clock time of clock signal also incomplete same, clock time comprises the first clock time and second clock time, and the second clock time is greater than the first clock time, described control module is also for showing the process of a two field picture at display panel, control at least one times described clock time and reach the second clock time, can make the time lengthening between adjacent useful signal edge, within the longer time, not trigger sweep circuit produces sweep signal, or sweep signal is scanned in a long time to current scan line, because the sweep signal on sweep trace during this period of time remains unchanged, therefore, can not produce electromagnetic interference (EMI) yet, and then can noise decrease.

In possibility, the clock time of controlling clock signal by the duration of control clock signal the first level is not identical, under the control of described control module, make each duration that described first level of described clock signal occurs incomplete same, described each duration comprises the first duration and the second duration, and the second duration was greater than for the first duration, and show in the process of a two field picture at display panel, the duration of controlling at least one times the first level of described clock signal reached for the second duration, the circuit of not trigger sweep in a long time produces sweep signal, or sweep signal is scanned in a long time to current scan line, because the sweep signal on sweep trace during this period of time remains unchanged, therefore, can not produce electromagnetic interference (EMI) yet, and then can noise decrease.

Accompanying drawing explanation

Fig. 1 is the functional block diagram of the utility model driving circuit the first embodiment;

Fig. 2 is the schematic diagram of the utility model display device one embodiment;

Fig. 3 is the schematic diagram of clock signal generation unit output signal in Fig. 1;

Fig. 4 is the schematic diagram of the utility model driving circuit the second embodiment;

Fig. 5 is the schematic diagram of control module in Fig. 4;

Fig. 6 is the scanning schematic diagram of control module in Fig. 4;

Fig. 7 is the signal schematic representation that driving circuit shown in Fig. 5 forms;

Fig. 8 is another signal schematic representation that driving circuit shown in Fig. 5 forms;

Fig. 9 is the schematic diagram of the utility model driving circuit the 3rd embodiment;

Figure 10 is the schematic diagram of scan driving circuit;

Figure 11 is the signal schematic representation of driving circuit shown in Fig. 9;

Figure 12 is the schematic diagram of the utility model driving circuit the 4th embodiment;

Figure 13 is the signal schematic representation of driving circuit in Figure 12;

Figure 14 is another signal schematic representation of driving circuit in Figure 12;

Figure 15 is the scanning schematic diagram of the utility model driving circuit the 5th embodiment;

Figure 16 is the schematic diagram of the utility model electronic equipment one embodiment.

Embodiment

For above-mentioned purpose of the present utility model, feature and advantage can more be become apparent, below in conjunction with accompanying drawing, specific embodiment of the utility model is explained.

With reference to figure 1 and Fig. 2, Fig. 1 and Fig. 2 show respectively the functional block diagram of the utility model driving circuit the first embodiment and the schematic diagram of the utility model display device one embodiment.Described display device 1 comprises driving circuit 10, display panel 20, scan drive circuit 300 and data line drive circuit (not indicating).Driving circuit 10 is connected with scan drive circuit 300.Scan drive circuit 300 is connected with display panel 20 respectively with data line drive circuit.Described driving circuit 10, for driving display panel 20 to carry out image demonstration.Described display panel 20 comprises a plurality of display units 201 and multi-strip scanning line G ₁, G ₂g _n, each sweep trace G ₁, G ₂g _nconnect a plurality of display units 201, described multi-strip scanning line G ₁, G ₂g _nfor transmitting sweep signal that scan drive circuit 300 provides to described a plurality of display units 201, to activate and sweep trace G ₁, G ₂g _nthe display unit 201 being connected carries out image demonstration.

Particularly, the panel that described display panel 20 can be display panels or other suitable type.Described display unit 201 comprises thin film transistor (TFT) (Thin Film Transistor, TFT do not indicate) and the pixel electrode (not indicating) being connected with thin film transistor (TFT).Described multi-strip scanning line G ₁, G ₂g _nbe connected with the grid (not indicating) of described thin film transistor (TFT), the sweep signal that described scan drive circuit 300 provides is opened and sweep trace G for timesharing ₁, G ₂g _nthin film transistor (TFT), to activate and sweep trace G ₁, G ₂g _nthe display unit 201 being connected, provides data-signal by data line drive circuit to the thin film transistor (TFT) of opening, and to realize image, shows.

The present embodiment driving circuit 10 comprises clock signal generation unit 200 and the control module 100 being connected with clock signal generation unit 200.

Clock signal generation unit 200, for generation of clock signal, described in each, clock signal is the signal that the first level and second electrical level alternately occur, described the first level is different from the electromotive force of second electrical level, the first level in described clock signal to the variation of second electrical level produces the sweep signal of the corresponding transmission of each sweep trace for triggering described scan drive circuit 300, to activate connected display unit 201 corresponding to each sweep trace by described sweep signal, and then realize image demonstration.

Define described the first level to the useful signal edge that is changed to clock signal of second electrical level, the time between adjacent useful signal edge is clock time.For example described the first level is low level, and described second electrical level is high level, and described useful signal edge is rising edge; Or described the first level is high level, described second electrical level is low level, and described useful signal edge is negative edge.

Control module 100, for controlling the described clock time of described clock signal incomplete same, described clock time comprises the first clock time and second clock time, and the second clock time is greater than the first clock time, described control module also, for show the process of a two field picture at display panel 20, is controlled at least one times described clock time and is reached the second clock time.

Alternatively, the duration of the described sweep signal that in the clock signal that described clock signal generation unit 200 produces, the duration of second electrical level produces with described scan drive circuit 300 is identical, described control module 100 can, by controlling the duration of the first level, be controlled the clock time of clock signal.

Particularly, described control module 100 is for each duration controlling described first level of described clock signal and occur incomplete same, described each duration comprises the first duration and the second duration, and the second duration was greater than for the first duration, described control module 100 is also for showing the process of a two field picture at display panel 20, the duration of controlling at least one times the first level of described clock signal reached for the second duration.The first duration of described the first level and the duration sum of described second electrical level are described the first clock time, and the second duration of described the first level and the duration sum of described second electrical level are the described second clock time.In the present embodiment, the scope of described the second duration is preferably [9,400] microsecond (us), and concrete numerical optimization is 200 microseconds.

Fig. 3 shows the schematic diagram of clock signal generation unit 200 output signals in Fig. 1.Clock signal generation unit 200 for generation of two clock signal C K1 and CK2, described two clock signal C K1 and CK2 are the alternately clock signal of output of low level and high level, and described clock signal C K1 and CK2 (when low level changes to high level) when rising edge trigger described scan drive circuit 300 and produce described sweep signal.Described rising edge is useful signal edge, and the time between adjacent rising edge is clock time.

In the present embodiment, the first level of two clock signal C K1 and CK2 is low level, and for the described sweep signal of the non-generation of gated sweep driving circuit, second electrical level is high level, for driven sweep driving circuit, produces described sweep signal.In the present embodiment, low level at-15V for example, in the scope of-7.5V: low level is-12V.High level be 10V for example, in the scope of 15V: high level is 15V.

In the present embodiment, low level the first duration T 1 of described clock signal C K1 (CK2) is identical with the duration of the high level of clock signal C K2 (CK1), that is to say, low level the first duration T 1 of described clock signal C K1 (CK2) is that clock signal C K2 (CK1) driven sweep driving circuit 300 produces the time of sweep signal, thereby can make 300 pairs of sweep traces that are connected with described scan drive circuit 300 of described scan drive circuit line by line scan.

Control module 100 is controlled low level duration T 2 in described clock signal C K1 and CK2 and was reached for the second duration, and the second duration T 2 is greater than the first duration T 1.The equitant timing definition of low level the second duration T 2 of described two clock signal C K1 and CK2 is time out, at described time out internal clock signal CK1 and CK2, all there is no rising edge, can there is not low level to the variation of high level, thereby can not excite described scan drive circuit 300 to produce described sweep signal, and then described scan drive circuit 300 time-outs scan to sweep trace.

As shown in Figure 3, under the driving of clock signal C K1 and CK2, the sweep signal that scan drive circuit produces is to sweep trace G _m, G _m+1complete after scanning, in time out, can suspend next line sweep trace G _m+2scan, until the second duration T 2 of CK1 finishes, low level to high level changes just 300 couples of sweep trace G of trigger sweep driving circuit _m+2scan, correspondingly, until the second duration T 2 of CK2 finishes, low level to high level changes just 300 couples of sweep trace G of trigger sweep driving circuit _m+3scan.

That is to say, display panel 20 can suspend and carry out sweep trace G in described time out ₁, G ₂g _nscanning, described display device 1 can not produce electromagnetic interference (EMI) because carrying out sweep trace scanning, other electronic installations that integrate with display device such as can detect at the operation in this period, can noise decrease impact.

It should be noted that, in the clock signal C K1 that clock signal generation unit 200 produces as shown in Figure 3 and CK2, the lasting time of high level is the lasting time of sweep signal, in other embodiments, can also under the control of described control module 100, make high level lasting time in the clock signal C K1 of clock signal generation unit 200 output and CK2 reach for the second duration, thereby sweep signal is scanned in a long time to current scan line, because the sweep signal on sweep trace during this period of time remains unchanged, therefore, can not produce electromagnetic interference (EMI) yet, and then can noise decrease.

Similarly, in other embodiments, can also excite described scan drive circuit to produce described sweep signal by the negative edge (when high level changes to low level) of clock signal, the duration that control module 100 is controlled high level in described clock signal C K1 and CK2 reached for the second duration, that is to say, under the control of described control module 100, make clock signal C K1 and the CK2 of 200 outputs of clock signal generation unit there is no negative edge in the longer time (time out), described clock signal C K1 and CK2 can not excite described scan drive circuit 300 to produce described sweep signal in a long time, and then make display panel 20 upper tracers have a long period can not transmit and have sweep signal, within the time, suspend sweep trace is scanned, and then the noise of minimizing electromagnetic interference (EMI) generation.

In other embodiments, also can be in clock signal C K1 and CK2 the lasting time of low level be the lasting time of sweep signal, can also under the control of control module 100, make low duration in the clock signal C K1 of clock signal generation unit 200 output and CK2 reach for the second duration, thereby sweep signal is scanned in a long time to current scan line, because the sweep signal on sweep trace during this period of time remains unchanged, also can reduce the noise that electromagnetic interference (EMI) produces.

Please continue to refer to Fig. 2 and Fig. 3, at display panel 20, show in the process of two field pictures, the present embodiment driving circuit 10 can be realized one or many and suspends and carry out sweep trace G ₁, G ₂g _nscanning, suspend and to carry out sweep trace G ₁, G ₂g _nnumber of times, time and the position of scanning can set in advance.

It should be noted that, the duration of the described sweep signal that in the clock signal that in the embodiment shown in Fig. 3, clock signal generation unit 200 produces, the duration of second electrical level produces with described scan drive circuit 300 is identical.But the utility model is not restricted this, in other embodiments, can also be that in the clock signal that produces of described clock signal generation unit 200, the duration sum of the first level and second electrical level is identical with the duration of the described sweep signal of described scan drive circuit 300 generations.

Correspondingly, described control module 100, for controlling each duration that described first level of described clock signal occurs incomplete same, the described duration comprises the first duration and the second duration, and described the second duration is greater than described the first duration, described control module 100 is also for showing the process of a two field picture at display panel 20, the duration of controlling at least one times the first level reached for the second duration, the first duration of described the first level and the duration sum of described second electrical level are described the first clock time, the second duration of described the first level and the duration sum of described second electrical level are the described second clock time.That is to say, described control module 100 can be realized the control to clock time by controlling the duration of the first level.

Or, described control module 100, for controlling each duration that the described second electrical level of described clock signal occurs incomplete same, the described duration comprises the first duration and the second duration, and described the second duration is greater than described the first duration, described control module 100 is also for showing the process of a two field picture at display panel, the duration of controlling at least one times second electrical level reached for the second duration, the first duration of described second electrical level and the duration sum of described the first level are described the first clock time, the second duration of described second electrical level and the duration sum of described the first level are the described second clock time.That is to say, described control module 200 can be realized the control to clock time by controlling the duration of second electrical level.

By controlling clock time, can extend useful signal along the time producing, and then the driving circuit of not trigger sweep in a long time 300 produces sweep signal, or sweep signal is scanned in a long time to current scan line, because the sweep signal on sweep trace during this period of time remains unchanged, therefore, can not produce electromagnetic interference (EMI) yet, and then can noise decrease.

With reference to figure 4, show the schematic diagram of the utility model driving circuit the second embodiment.It should be noted that, the demonstration of each two field picture is also provided for the frame synchronizing signal VS providing according to a frame synchronizing signal unit 302 described multi-strip scanning line; Described scan drive circuit 301 is also for providing line synchronizing signal HS_GIP; The present embodiment driving circuit can arrange the position of suspending scanning appearance based on frame synchronizing signal VS and described line synchronizing signal HS_GIP.

Particularly, in the present embodiment driving circuit, control module 101 is connected with clock signal generation unit 201 with described frame synchronizing signal unit 302 scan drive circuits 301, for judge whether to control the duration of the first level of described clock signal C K according to described frame synchronizing signal VS and line synchronizing signal HS_GIP, reaches for the second duration.Be that in the present embodiment driving circuit, control module 101 is to judge based on frame synchronizing signal VS and line synchronizing signal HS_GIP the position that time out is set.

For example, in one two field picture procedure for displaying, need 1280 horizontal scanning lines to scan, control module 101 is after receiving frame synchronizing signal VS, every 64 line synchronizing signal HS_GIP, the duration of controlling the first level of described clock signal C K reached for the second duration, to form, suspend the time out that sweep trace is scanned, and then produce 19 time outs at a two field picture procedure for displaying.

But whether the utility model arranges described time out according to frame synchronizing signal VS and line synchronizing signal HS_GIP, be not restricted, in other embodiments, control module 101 can also judge and produce described time out by controlling described clock signal generation unit according to other modes.For example, the position that described control module 101 can produce according to set of time time out, for example, since the 1st row, be scanned up to the 1280th horizontal scanning line and need the 10ms time, described control module 101 can reach for the second duration in the duration that the moment that is scanned up to total scanning time half (5ms) since the 1st row is controlled the first level of described clock signal C K, to suspend sweep trace is scanned between the 64th row and the 65th horizontal scanning line.

In conjunction with reference to figure 5 and Fig. 6, schematic diagram and the scanning schematic diagram of control module in Fig. 4 is shown respectively.Particularly, described control module 101 comprises storer 1011, judge module 1012 and control module 1013.

Storer 1011, for storing default row information, described default row information reaches the row information of second clock corresponding sweep trace during the time for controlling described clock time.

Particularly, in the present embodiment, the row information of corresponding sweep trace when described default row information reached for the second duration for controlling the duration of the first level of described clock signal C K.But the utility model is not restricted this, in other embodiments, described default row information can also be for controlling the row information of duration of second electrical level of clock signal corresponding sweep trace when longer.

For example, in one two field picture procedure for displaying, need 1280 horizontal scanning lines to scan, described default row information is for to complete the 64th horizontal scanning line, the 128th horizontal scanning line ... the duration of controlling the first level of described clock signal after the 1216th horizontal scanning line reached for the second duration, with after completing the scanning of the 64th horizontal scanning line, carry out between the scanning of the 65th horizontal scanning line, after completing the scanning of 128 horizontal scanning lines, carry out between the scanning of the 129th horizontal scanning line ... after the scanning of the 1216th horizontal scanning line, the scanning of carrying out the 1217th horizontal scanning line arranges respectively a time out time-out before sweep trace is scanned.

Particularly, described storer 1011 is can edit file, can store different default row information, to adapt to the demand of distinct electronic apparatuses.

Judge module 1012, is connected with described frame synchronizing signal unit 302, scan drive circuit 301 and storer 1011, for the line synchronizing signal HS_GIP that judgement receives after receiving a frame synchronizing signal VS, whether meets described default row information.

For example, described default row information reached for the second duration for control the duration of the first level of described clock signal C K after completing the 64th horizontal scanning line, to suspend sweep trace is scanned in a time out.Described judge module 1012 is after receiving the frame synchronizing signal VS sending frame synchronizing signal unit 302, before receiving the 64th the line synchronizing signal HS_GIP that scan drive circuit 301 sends, the described line synchronizing signal HS_GIP of described judge module 1012 judgement does not meet described default row information, and when receiving the 64th the line synchronizing signal HS_GIP that scan drive circuit 301 sends, judge that described line synchronizing signal HS_GIP meets described default row information.

Control module 1013, all be connected with described frame synchronizing signal unit 302, scan drive circuit 301, judge module 1012, for when the described line synchronizing signal HS_GIP of judge module 1012 judgement meets described default row information, make the duration of the first level of described clock signal generation unit 201 outputs reach for the second duration.

For example: the clock signal C K of clock signal generation unit 201 outputs is the clock signal that high level and low level are alternately exported, the rising edge of clock signal C K is used for exciting scan drive circuit 301 to produce described sweep signal, described control module 1013 can be when the described line synchronizing signal HS_GIP of judge module 1012 judgement meets described default row information, make the lasting time of low level of described clock signal generation unit 201 outputs reach for the second duration, can not form rising edge within longer a period of time, thereby can not excite scan drive circuit 301 to produce described sweep signal, and then reduce the noise that electromagnetic interference (EMI) produces.

It should be noted that control module 1013 can adopt various ways to realize the control to described clock signal generation unit 201, in conjunction with reference to figure 7, shows the signal schematic representation that driving circuit shown in Fig. 5 forms.

Particularly, described control module 1013 is also for sending described line synchronizing signal HS_GIP to described clock signal generation unit 201.Described clock signal generation unit 201 also produces described clock signal C K based on described synchronizing signal HS_GIP.

Herein, the clock signal C K of described clock signal generation unit 201 outputs comprises: the first clock signal C K1_R, second clock signal CK1_L, the 3rd clock signal C K2_R and the 4th clock signal C K2_L, so that the sweep signal providing to four sweep traces is respectively provided scan drive circuit 301.As shown in Figure 7, synchronizing signal HS_GIP comprises a plurality of square-wave signals, and described a plurality of square-wave signals are triggering for generating the first clock signal C K1_R, second clock signal CK1_L, the 3rd clock signal C K2_R and the 4th clock signal C K2_L successively.Particularly, in the present embodiment, the negative edge of described square-wave signal is used for triggering formation clock signal C K.

Described control module 1013, for when the described line synchronizing signal HS_GIP of judge module 1012 judgement meets described default row information, stop providing described line synchronizing signal HS_GIP to reach the first Preset Time to described clock signal generation unit 201, so that the duration of the first level of described clock signal reaches described the second duration.

In Fig. 7, the first clock signal C K1_R, second clock signal CK1_L, the rising edge of the 3rd clock signal C K2_R and the 4th clock signal C K2_L is used for exciting described scan drive circuit 301 to produce sweep signal, control module 1013 is (for example: while judging described line synchronizing signal HS_GIP corresponding to the line synchronizing signal CK2_L of the 64th horizontal scanning line) when the described line synchronizing signal HS_GIP of judge module 1012 judgement meets described default row information, stop corresponding to next line sweep trace (for example: line synchronizing signal HS_GIP the 65th horizontal scanning line) reaches the first Preset Time sending to described clock signal generation unit 201.In described the first Preset Time, clock signal generation unit 201 for example, owing to (: line synchronizing signal HS_GIP the 65th horizontal scanning line) and can not form clock signal not receiving next line sweep trace, and then can not excite described scan drive circuit 301 produce to next line sweep trace (for example: the sweep signal the 65th horizontal scanning line) scanning, thereby reduced the noise that electromagnetic interference (EMI) causes.Until after the first Preset Time, described control module 1013 again to described clock signal generation unit 201 send corresponding to next line sweep trace (for example: line synchronizing signal HS_GIP the 65th horizontal scanning line), for example, to next line sweep trace (: the 65th horizontal scanning line) scan to realize.

It in Fig. 7, between the negative edge of CK2_L and the rising edge of CK1_R, is the first clock signal C K1_R, second clock signal CK1_L, the 3rd clock signal C K2_R and the 4th equitant time of clock signal C K2_L, for time out, in described time out, described scan drive circuit 301 time-outs scan sweep trace.

Can also adopt other modes to realize the control of control module to described clock signal generation unit 201, with reference to figure 8, show another signal schematic representation that driving circuit shown in Fig. 5 forms.In the present embodiment, control module 101 is realized the control to clock signal generation unit 201 by stop signal STOP is set.

Particularly, control module 1013 in described control module 101 is for when the described line synchronizing signal HS_GIP of judge module 1012 judgement meets described default row information, form stop signal STOP, described stop signal STOP comprises invalid signals and useful signal, wherein invalid signals can not affect the clock signal C K that clock signal generation unit 201 produces, invalid signals switches to useful signal for exciting the control to described clock signal C K, and lasting time of described useful signal is relevant to the second duration of the first level in described clock signal.

In the present embodiment, described stop signal is the square-wave signal that the 3rd level (low level) and the 4th level (high level) form, and described the 3rd level is different from the electromotive force of described the 4th level.Wherein, low level is invalid signals, and high level is useful signal.As shown in Figure 8, described stop signal STOP is from low level is switched high level, based on S1 and S2 in line synchronizing signal HS_GIP, described clock signal generation unit 201 is also exported one the 3rd clock signal C K2_R, the 4th clock signal C K2_L, clock signal CK no longer, can suspend to enter the time out that sweep trace is scanned afterwards.That is to say, in the present embodiment, described clock signal generation unit 201 reached for the second duration for switch to the duration of the first level of the CK2_L output that makes output after the second Preset Time of useful signal (high level) from invalid signals (low level) at described stop signal STOP, between the negative edge of CK2_L and the rising edge of CK_1R, was time out.

Please continue to refer to Fig. 8, when described stop signal STOP switches to invalid signals (low level) from useful signal (high level), clock signal generation unit 201 is clock signal CK (being specially the first clock signal C K1_R) immediately, that is to say, when described stop signal STOP switches to invalid signals from useful signal, make immediately to recover described the first duration.

But the utility model is not restricted this, in other embodiments, described clock signal generation unit 201 can also make immediately the duration of the first level of output reach for the second duration when described stop signal switches to useful signal from invalid signals.Or, at described stop signal STOP, from useful signal switches to invalid signals, after a Preset Time, recover again the first duration of described the first level.

In addition, the utility model is not restricted the form of stop signal STOP, except square-wave signal, can be notch cuttype signal, trapezoidal signal etc., should not limit the utility model with this.

With reference to figure 9, Figure 10 and Figure 11, show respectively the signal schematic representation of driving circuit shown in schematic diagram, scan driving circuit and Fig. 9 of the utility model driving circuit the 3rd embodiment.

It should be noted that, in the present embodiment, as shown in figure 10, described scan drive circuit comprises: the first sub-scan drive circuit (not shown) of lining by line scan for odd line interlace line, the second sub-scan drive circuit (not shown) of lining by line scan for dual numbers horizontal scanning line.

The present embodiment driving circuit and the first embodiment driving circuit something in common repeat no more, and in the present embodiment driving circuit, clock signal generation unit 202 comprises:

Inceptive impulse generation module 2021, is used to form the first inceptive impulse SP_L and the second inceptive impulse SP_R; The beginning showing at each two field picture, described the first inceptive impulse SP_L is locked in the shift register RS Cell that is connected sweep trace G1, G2 with the second inceptive impulse SP_R, be used in the follow-up shift register RS Cell propagation to next line to the scanning process of other sweep traces, until complete the scanning of a frame.

Clock signal generating module 2022, for producing the first clock signal C K1_R, second clock signal CK1_L, the 3rd clock signal C K2_R and the 4th clock signal C K2_L according to described the first inceptive impulse SP_L and the second inceptive impulse SP_R.Particularly, described clock signal generating module 2022, after inceptive impulse generation module 2021 sends described the first inceptive impulse SP_L and the second inceptive impulse SP_R, starts to export successively described the first clock signal C K1_R, second clock signal CK1_L, the 3rd clock signal C K2_R and the 4th clock signal C K2_L.

Described the first clock signal C K1_R and described the 3rd clock signal C K2_R are used for triggering described the first sub-scan drive circuit odd line interlace line are lined by line scan; Described second clock signal CK1_L and described the 4th clock signal C K2_L are used for triggering described the second sub-scan drive circuit dual numbers horizontal scanning line and line by line scan;

Described the first clock signal C K1_R is identical with the second electrical level duration of another one with the first duration of the first level of one of them person of the 3rd clock signal C K2_R, described second clock signal CK1_L is identical with the second electrical level duration of another one with the first duration of the first level of one of them person of the 4th clock signal C K2_L, the second electrical level duration of described the first clock signal C K1_R and described second clock signal CK1_L exists overlapping, the second electrical level duration of described the 3rd clock signal C K2_R and described four clock signal C K2_L exists overlapping, described control module 103 is for showing the process of a two field picture at display panel, the duration of controlling at least one times the first level of described the first clock signal C K1_R, second clock signal CK1_L, the 3rd clock signal C K2_R and the 4th clock signal C K2_L reached for the second duration.

Particularly, in the present embodiment driving circuit, clock signal generation unit 202 also comprises reset signal generation module 2023, be used to form reset signal RESET_L, RESET_R, described reset signal RESET_L, RESET_R are used for making described inceptive impulse generation module 2021 again to export inceptive impulse after the 3rd Preset Time, thereby clock signal generating module 2022 is being exported the first clock signal C K1_R, second clock signal CK1_L, the 3rd clock signal C K2_R and the 4th clock signal C K2_L after output pulse signal again again.In described the 3rd Preset Time, the signal of described clock signal generating module 2022 outputs is the low level that the duration reached for the second duration, therefore in during this period of time, scan drive circuit time-out scans sweep trace, has reduced the noise that electromagnetic interference (EMI) produces.

Described control module 102, be connected with described reset signal generation module 2023, for show the process of a two field picture at display panel, control at least one times described reset signal generation module 2023 and produce described reset signal RESET_L, RESET_R, so that the first level reached for the second duration in the clock signal of clock signal generating module 2022 outputs, thereby in a two field picture process, suspend and carry out sweep trace scanning at least one times, reduced the problem of electromagnetic interference (EMI).

It should be noted that, in other embodiments, described the first sub-scan drive circuit can also be lined by line scan for dual numbers horizontal scanning line, and described the second sub-scan drive circuit can also be lined by line scan to odd line interlace line.Those skilled in the art can modify and be out of shape according to the embodiment shown in Fig. 9, Figure 10 and Figure 11.

With reference to Figure 12 and Figure 13, show respectively the signal schematic representation of driving circuit in the schematic diagram of the utility model driving circuit the 4th embodiment and Figure 12.In the present embodiment, clock signal generation unit 203 comprises a plurality of clock signal generators, for a plurality of clock signals are provided.Particularly, described clock signal generation unit 203 comprises the first clock signal generator 2031, second clock signal generator 2032, the 3rd clock signal generator 2033, the 4th clock signal generator 2034.

The same width of same frequency of the first clock CK1_R, second clock CK1_L, the 3rd clock CK2_R, the 4th clock CK2_L, variation from low level to high level and realize successively high level to low level variation successively, be used for making scan drive circuit once to four lines sweep trace, to provide respectively sweep signal, to realize single pass four lines sweep trace, to reduce time, the raising image display efficiency of a two field picture.

Control module 103 is all connected with described the first clock signal generator 2031, second clock signal generator 2032, the 3rd clock signal generator 2033, the 4th clock signal generator 2034, for show the process of a two field picture at display panel, the low level of controlling at least one times described the first clock CK1_R, second clock CK1_L, the 3rd clock CK2_R, the 4th clock CK2_L reached for the second duration.

At the negative edge of the 4th clock signal C K2_L, to recovering between the rising edge of the first clock CK1_R of the first duration T, be the first clock CK1_R, second clock CK1_L, the 3rd clock CK2_R, the 4th equitant time of clock CK2_L, be defined as time out, the first clock signal generator 2031 in described time out, second clock signal generator 2032, the 3rd clock signal generator 2033, the 4th clock signal generator 2034 keeps longer low level time, can to any one scan line, not provide sweep signal by trigger sweep driving circuit, thereby can not produce electromagnetic interference (EMI) in described time out, and then reduced noise.

It should be noted that, the utility model does not limit the quantity of clock signal generator in clock signal generation unit 203, described clock signal generation unit can comprise 1 clock signal generator, also can comprise 4 a plurality of clock signal generators of quantity in addition.

With reference to Figure 14, show another signal schematic representation of driving circuit in Figure 12.

In the present embodiment, described control module, for controlling each duration that the high level of described the first clock signal C K1_R, the 3rd clock signal C K2_R occurs incomplete same, the described duration comprises the first duration and the second duration, and described the second duration is greater than described the first duration, also for controlling second clock signal CK1_L, the 4th low level duration of clock signal C K2_L, the described duration comprises the 3rd duration and the 4th duration, and described the 4th duration is greater than described the 3rd duration.

The first duration sum of the first clock signal C K1_R, the 3rd low level duration of clock signal C K2_R and described high level is described the first clock time, and the second duration sum of described low level duration and described high level is the described second clock time.

The duration of second clock signal CK1_L, the 4th clock signal C K2_L high level and described low level the 3rd duration sum are described the first clock time, and the duration of described high level and described low level the 4th duration sum are the described second clock time.

The duration that described control module is controlled the high level of described the first clock signal C K1_R, the 3rd clock signal C K2_R at least one times reached for the second duration, and the low level duration of simultaneously controlling described second clock signal CK1_L, the 4th clock signal C K2_L reached for the 4th duration.

In the present embodiment, described the first clock signal C K1_R, the 3rd clock signal C K2_R are identical with the electromotive force of the second electrical level of second clock signal CK1_L, the 4th clock signal C K2_L, and the second electrical level of the first clock signal C K1_R, the 3rd clock signal C K2_R is identical with the electromotive force of the first level of second clock signal CK1_L, the 4th clock signal C K2_L.

In the present embodiment, the 4th clock signal C K2_L negative edge and second clock signal CK1_L are time out between the rising edge of recovered clock during the duration again, the first clock signal C K1_R in described time out, the 3rd clock signal C K2_R keeps high level not change, described the first clock signal C K1_R, the 3rd clock signal C K2_R makes the sweep signal that scan drive circuit forms keep high level constant, and second clock signal CK1_L, the 4th clock signal C K2_L keeps low level not change, described second clock signal CK1_L, the 4th clock signal C K2_L does not change from low level to high level, thereby can not excite scan drive circuit to form sweep signal, can not scan sweep trace, therefore, on display screen upper tracer, there is not the variation of signal, reduced the impact that electromagnetic interference (EMI) produces.

The utility model driving circuit can make at least one times scan drive circuit suspend sweep trace is scanned in a two field picture procedure for displaying, and the time that definition sweep trace suspends scanning is time out.The clock signal that described clock signal generation unit produces can, after time out, be controlled described clock signal generation unit generation and make described scan drive circuit from next line sweep trace, start the clock signal of scanning.As shown in Figure 6, in a two field picture procedure for displaying, need 1280 horizontal scanning lines to scan, after completing the scanning of the 64th horizontal scanning line, suspend scanning, since the 65th row, continue scanning more afterwards; After being scanned up to the 128th horizontal scanning line, again suspend scanning, from the 129th horizontal scanning line, scan again afterwards ... after completing the scanning of the 1216th horizontal scanning line, suspend again scanning, since the 1217th horizontal scanning line, be scanned up to 1280 horizontal scanning lines afterwards, thereby complete a frame picture disply.

But the utility model continues the mode of scanning after to time out not to be restricted, and with reference to Figure 15, shows the scanning schematic diagram of the utility model driving circuit the 5th embodiment.The clock signal that described clock signal generation unit produces for making described scan drive circuit provide sweep signal at least one horizontal scanning line, to carry out the scanning of sweep trace before time out; Described control module makes described scan drive circuit from a line at least reciprocal of scanned sweep trace, start the clock signal of scanning for control described clock signal generation unit generation after time out.That is to say, driving circuit has carried out twice sweep to the partial row sweep trace before time out, can avoid like this impact of time out on sweep trace scanning, guarantees the quality of display frame.

Particularly, as shown in figure 15, in a two field picture procedure for displaying, need 1280 horizontal scanning lines to scan, after completing the scanning of the 64th horizontal scanning line, suspend scanning, since the 61st row, continue scanning (to 61～64 line scannings twice) more afterwards; After being scanned up to the 128th horizontal scanning line, again suspend scanning, from the 125th horizontal scanning line, scan (to 125～128 line scannings twice) more afterwards ... after completing the scanning of the 1216th horizontal scanning line, suspend again scanning, afterwards since the 1213rd horizontal scanning line scanning (to 1213～1216 line scannings twice), until be scanned up to 1280 horizontal scanning lines, thereby complete a frame picture disply.

It should be noted that, scan drive circuit can be the circuit being arranged on display panel, for example, described scan drive circuit adopts Gate In Panel (GIP) technology, but the utility model is not restricted this, described scan drive circuit can be integrated in the utility model driving circuit, that is to say, driving circuit of the present utility model can comprise described scan drive circuit.

Correspondingly, the utility model provides a kind of display device, and as shown in Figure 2, described display device comprises:

Display panel 20, comprises a plurality of display units 201 and multi-strip scanning line G ₁, G ₂g _n, each sweep trace G ₁, G ₂g _nconnect a plurality of display units 201, described multi-strip scanning line G ₁, G ₂g _nfor transmitting sweep signal that scan driving circuit 300 provides to described a plurality of display units 201, to activate and sweep trace G ₁, G ₂g _nthe display unit 201 being connected carries out image demonstration;

Driving circuit 10, for driving display panel 20 to carry out image demonstration, the driving circuit that described driving circuit 10 provides for the utility model.Identical with the content of described driving circuit related embodiment, do not repeat them here.

The utility model display device can be when realizing picture disply, in a two field picture procedure for displaying, suspend at least one times scanning, thereby there is less electromagnetic interference (EMI) within the time of suspending scanning, can during this period of time work with other electronic installations that display device integrates (for example: contactor control device carries out touch control detection within the time of suspending scanning), and reduce the phase mutual interference of display device and other electronic installations.

Alternatively, based on GIP technology, described scan drive circuit 201 can be arranged on described display panel 20.But the utility model is not restricted this, described scan drive circuit 201 can also be integrated in the driving circuit that the utility model provides.

Alternatively, described display panel 20 can be display panels.But the utility model is not restricted the type of display panel 20.

Alternatively, the touch control detection circuit that described display device further comprises contact panel (not shown) and is connected with contact panel, touch control detection circuit carries out touch control detection at described time out to described contact panel, to reduce the impact of electromagnetic interference (EMI) on touch control detection.

Particularly, described contact panel or be external hanging touch panel, or be embedded touch control panel.

Correspondingly, the utility model also provides a kind of electronic equipment, with reference to Figure 16, shows the schematic diagram of the utility model electronic equipment one embodiment.Electronic equipment 500 comprises first device 510 and the second device 520, and first device 510 is display device, the work when first device 510 suspends scanning of the second device 520, thus reduce the electromagnetic interference (EMI) of display device to the second device 520.

Described electronic equipment can be mobile phone, panel computer, notebook computer or desktop computer.

Further, when the second device 520 is contactor control device, contactor control device comprises contact panel and the touch control detection circuit being connected with this contact panel.Touch control detection circuit carries out touch control detection to contact panel when display device is suspended scanning.

Contactor control device can further be included in display device.Contact panel or be the panel separate with display panel, or be embedded touch control panel.Embedded touch control panel comprises two kinds of on cell contact panel and in cell contact panels.Touch control detection circuit can integrate with the driving circuit of display device.

In the utility model electronic equipment, display device is for example, to the electromagnetic interference (EMI) of other electronic installations (contactor control device) less suspending scanning, other electronic installations can during this period of time be worked, reduce the phase mutual interference of display device with other electronic installations, improved the integrated level of electronic equipment.

The utility model also provides a kind of electronic equipment, comprise: display device, described display device comprises: display panel, comprise a plurality of display units and multi-strip scanning line, each sweep trace connects a plurality of display units, described multi-strip scanning line, for transmitting sweep signal that scan driving circuit provides to described a plurality of display units, carries out image demonstration to activate the display unit being connected with sweep trace;

Driving circuit, for driving display panel to carry out image demonstration, the described driving circuit that described driving circuit provides for the utility model.

Alternatively, described scan drive circuit is arranged on described display panel.Described display panel can be display panels.

Particularly, described electronic equipment is mobile phone, panel computer, notebook computer or desktop computer.

The utility model electronic equipment can reduce the impact of electromagnetic interference (EMI).

Although the utility model discloses as above, the utility model is not defined in this.Any those skilled in the art, within not departing from spirit and scope of the present utility model, all can make various changes or modifications, and therefore protection domain of the present utility model should be as the criterion with claim limited range.

Claims

1. a driving circuit, be used for driving display panel to carry out image demonstration, described display panel comprises a plurality of display units and multi-strip scanning line, each sweep trace connects a plurality of display units, described multi-strip scanning line, for transmitting sweep signal that scan driving circuit provides to described a plurality of display units, carries out image demonstration to activate the display unit being connected with sweep trace; It is characterized in that, described driving circuit comprises:

Clock signal generation unit, for generation of clock signal, described in each, clock signal is the signal that the first level and second electrical level alternately occur, described the first level is different from the electromotive force of second electrical level, the first level described in each in clock signal to the variation of second electrical level produces the sweep signal of the corresponding transmission of each sweep trace for triggering described scan drive circuit, define described the first level to the useful signal edge that is changed to clock signal of second electrical level, the time between adjacent useful signal edge is clock time;

Control module, for controlling the described clock time of described clock signal incomplete same, described clock time comprises the first clock time and second clock time, and the second clock time is greater than the first clock time, described control module also, for show the process of a two field picture at display panel, is controlled at least one times described clock time and is reached the second clock time.

2. driving circuit as claimed in claim 1, is characterized in that, the duration of the described sweep signal that in the clock signal that described clock signal generation unit produces, the duration of second electrical level produces with described scan drive circuit is identical;

Described control module, for controlling each duration that described first level of described clock signal occurs incomplete same, the described duration comprises the first duration and the second duration, and described the second duration is greater than described the first duration, described control module is also for showing the process of a two field picture at display panel, the duration of controlling at least one times described the first level reached for the second duration, the first duration of described the first level and the duration sum of described second electrical level are described the first clock time, the second duration of described the first level and the duration sum of described second electrical level are the described second clock time.

3. driving circuit as claimed in claim 2, is characterized in that, clock signal generation unit, for generation of two clock signals, lines by line scan the described scan drive circuit pair sweep trace being connected with described scan drive circuit;

In described two clock signals, the first duration of the first level of one of them person is identical with the duration of the second electrical level of another one;

Described control module is for showing the process of a two field picture at display panel, the duration of controlling at least one times the first level of described two clock signals reached for the second duration.

4. driving circuit as claimed in claim 2, it is characterized in that, described scan drive circuit comprises: for the first sub-scan drive circuit that first group of sweep trace lined by line scan, for the second sub-scan drive circuit that second group of sweep trace lined by line scan, described first group of sweep trace and described second group of sweep trace are adjacent horizontal scanning line;

Described clock signal generation unit is for generation of the first clock signal, second clock signal, the 3rd clock signal and the 4th clock signal, and described the first clock signal and described the 3rd clock signal are used for triggering described the first sub-scan drive circuit first group of sweep trace lined by line scan; Described second clock signal and described the 4th clock signal are used for triggering described the second sub-scan drive circuit second group of sweep trace are lined by line scan;

Described the first clock signal is identical with the second electrical level duration of another one with the first duration of the first level of one of them person of the 3rd clock signal, described second clock signal is identical with the second electrical level duration of another one with the first duration of the first level of one of them person of the 4th clock signal, the second electrical level duration of described the first clock signal and described second clock signal exists overlapping, and the second electrical level duration of described the 3rd clock signal and described four clock signals exists overlapping;

Described control module is for showing the process of a two field picture at display panel, the duration of controlling at least one times the first level of described the first clock signal, second clock signal, the 3rd clock signal and the 4th clock signal reached for the second duration.

5. driving circuit as claimed in claim 1, it is characterized in that, described scan drive circuit comprises: for the first sub-scan drive circuit that first group of sweep trace lined by line scan, for the second sub-scan drive circuit that second group of sweep trace lined by line scan, described first group of sweep trace and described second group of sweep trace are adjacent horizontal scanning line;

Described control module, be used for controlling described the first clock signal, each duration that the described second electrical level of the 3rd clock signal occurs is also incomplete same, the described duration comprises the first duration and the second duration, and described the second duration is greater than described the first duration, also for controlling described second clock signal, each duration that described first level of the 4th clock signal occurs is also incomplete same, the described duration comprises the 3rd duration and the 4th duration, and described the 4th duration is greater than described the 3rd duration,

Described control module is also for showing the process of a two field picture at display panel, the second electrical level duration of controlling at least one times described the first clock signal, the 3rd clock signal reached for the second lasting time, and the first level duration of described second clock signal, the 4th clock signal reached for the 4th duration;

The first duration sum of the duration of described the first clock signal, the 3rd clock signal the first level and described second electrical level is described the first clock time, and the second duration sum of the duration of described the first level and described second electrical level is the described second clock time;

The 3rd duration sum of the duration of described second clock signal, the 4th clock signal second electrical level and described the first level is described the first clock time, and the 4th duration sum of the duration of described second electrical level and described the first level is the described second clock time.

6. driving circuit as claimed in claim 1, is characterized in that, the duration of the described sweep signal that in the clock signal that described clock signal generation unit produces, the duration sum of the first level and second electrical level produces with described scan drive circuit is identical;

Described control module, for controlling each duration that described first level of described clock signal occurs incomplete same, the described duration comprises the first duration and the second duration, and described the second duration is greater than described the first duration, described control module is also for showing the process of a two field picture at display panel, the duration of controlling at least one times the first level reached for the second duration, the first duration of described the first level and the duration sum of described second electrical level are described the first clock time, the second duration of described the first level and the duration sum of described second electrical level are the described second clock time,

Or,

Described control module, for controlling each duration that the described second electrical level of described clock signal occurs incomplete same, the described duration comprises the first duration and the second duration, and described the second duration is greater than described the first duration, described control module is also for showing the process of a two field picture at display panel, the duration of controlling at least one times second electrical level reached for the second duration, the first duration of described second electrical level and the duration sum of described the first level are described the first clock time, the second duration of described second electrical level and the duration sum of described the first level are the described second clock time.

7. the driving circuit as described in claim as arbitrary in claim 1 to 6, is characterized in that, the demonstration of each two field picture is also provided for the frame synchronizing signal providing according to a frame synchronizing signal unit described multi-strip scanning line; Described scan drive circuit is also for providing line synchronizing signal;

Described control module is connected with scan drive circuit with described frame synchronizing signal unit, for judging whether that according to described frame synchronizing signal and line synchronizing signal the clock time of controlling described clock signal reaches the second clock time.

8. driving circuit as claimed in claim 7, is characterized in that, described control module comprises:

Storer, for storing default row information, described default row information reaches the row information of second clock corresponding sweep trace during the time for controlling described clock time;

Judge module, is connected with storer with described frame synchronizing signal unit, scan drive circuit, for the line synchronizing signal that judgement receives after receiving a frame synchronizing signal, whether meets described default row information;

Control module, all be connected with described frame synchronizing signal unit, scan drive circuit, judge module, for when judge module judges that described line synchronizing signal meets described default row information, make the clock time of the clock signal of described clock signal generation unit output reach the second clock time.

9. driving circuit as claimed in claim 8, is characterized in that, described control module is also for sending described line synchronizing signal to described clock signal generation unit, so that described clock signal generation unit produces described clock signal;

Described control module, for judging that at judge module described line synchronizing signal stops while meeting described default row information providing described line synchronizing signal to reach the first Preset Time to described clock signal generation unit, so that the clock time of described clock signal reaches the second clock time.

10. driving circuit as claimed in claim 8, is characterized in that, described control module, for when judge module judges that described line synchronizing signal meets described default row information, forms stop signal, and described stop signal comprises invalid signals and useful signal;

Described clock signal generation unit for making immediately the clock time of output reach the second clock time when described stop signal switches to useful signal from invalid signals;

Or,

Described clock signal generation unit makes the clock time of exporting reach the second clock time for switch to the second Preset Time of useful signal from invalid signals in described stop signal after.

11. driving circuits as claimed in claim 10, is characterized in that, described stop signal is the square-wave signal that the 3rd level and the 4th level form, and described the 3rd level is different from the electromotive force of described the 4th level;

Described the 3rd level is described useful signal, and described the 4th level is described invalid signals; Or described the 4th level is described useful signal, described the 3rd level is described invalid signals.

Driving circuit as described in 12. claims as arbitrary in claim 1 to 6, is characterized in that,

Described clock signal generation unit, comprising:

Inceptive impulse generation module, is used to form inceptive impulse;

Clock signal generating module, for producing described clock signal according to described inceptive impulse;

Reset signal generation module, is used to form reset signal, and described reset signal is used for making described inceptive impulse generation module again to export inceptive impulse after the 3rd Preset Time;

Described control module, be connected with described reset signal generation module, for show the process of a two field picture at display panel, control at least one times described reset signal generation module and produce described reset signal, so that the clock time of the clock signal of clock signal generating module output reaches the second clock time.

13. driving circuits as claimed in claim 2, it is characterized in that, described clock signal generation unit produces at least two clock signals, the second duration of the first level of described at least two clock signals exists overlapping, described in definition, the second equitant time of duration of the first level of at least two clock signals is time out, at described time out, the first level of described at least two clock signals makes described scan drive circuit time-out scan sweep trace

The clock signal that described clock signal generation unit produces for making described scan drive circuit provide sweep signal at least one horizontal scanning line, to carry out the scanning of sweep trace before time out;

Described control module makes described scan drive circuit from next line sweep trace, start the clock signal of scanning for control described clock signal generation unit generation after time out.

14. driving circuits as claimed in claim 2, it is characterized in that, described clock signal generation unit produces at least two clock signals, the second duration of the first level of described at least two clock signals exists overlapping, described in definition, the second equitant time of duration of the first level of at least two clock signals is time out, at described time out, the first level of described at least two clock signals makes described scan drive circuit time-out scan sweep trace;

Described control module makes described scan drive circuit from a line at least reciprocal of scanned sweep trace, start the clock signal of scanning for control described clock signal generation unit generation after time out.

15. driving circuits as claimed in claim 2, it is characterized in that, described clock signal generation unit produces at least two clock signals, the first level of a part of clock signal in described at least two clock signals produces described sweep signal for driven sweep driving circuit, the second electrical level of another part clock signal produces described sweep signal for driven sweep driving circuit, the second duration of the first level of described at least two clock signals exists overlapping, described in definition, the second equitant time of duration of the first level of at least two clock signals is time out, at described time out, the clock signal that adopts the first level driven sweep driving circuit to produce described sweep signal makes described scan drive circuit continue sweep trace to scan, the clock signal that adopts second electrical level driven sweep driving circuit to produce described sweep signal makes described scan drive circuit time-out scan sweep trace.

16. driving circuits as claimed in claim 1, is characterized in that, described driving circuit comprises described scan drive circuit.

17. 1 kinds of display device, is characterized in that, comprising:

Display panel, comprise a plurality of display units and multi-strip scanning line, each sweep trace connects a plurality of display units, described multi-strip scanning line, for transmitting sweep signal that scan driving circuit provides to described a plurality of display units, carries out image demonstration to activate the display unit being connected with sweep trace;

Driving circuit, for driving display panel to carry out image demonstration, described driving circuit is the driving circuit as described in claim 1～16 any one claim.

18. display device as claimed in claim 17, is characterized in that, described scan drive circuit is arranged on described display panel.

19. display device as claimed in claim 17, is characterized in that, described display panel is display panels.

20. 1 kinds of display device, it is characterized in that, comprise: display panel, comprise a plurality of display units and multi-strip scanning line, each sweep trace connects a plurality of display units, described multi-strip scanning line, for transmitting sweep signal that scan driving circuit provides to described a plurality of display units, carries out image demonstration to activate the display unit being connected with sweep trace;

Driving circuit, for driving display panel to carry out image demonstration, described driving circuit is the driving circuit as described in claim 13～15 any one claim;

The touch control detection circuit that described display device further comprises contact panel and is connected with contact panel, touch control detection circuit carries out touch control detection at described time out to described contact panel.

21. display device as claimed in claim 20, is characterized in that, described contact panel or be external hanging touch panel, or be embedded touch control panel.

22. 1 kinds of electronic equipments, is characterized in that, comprising: display device,

Described display device comprises: display panel, comprise a plurality of display units and multi-strip scanning line, each sweep trace connects a plurality of display units, described multi-strip scanning line, for transmitting sweep signal that scan driving circuit provides to described a plurality of display units, carries out image demonstration to activate the display unit being connected with sweep trace;

23. electronic equipments as claimed in claim 22, is characterized in that, described scan drive circuit is arranged on described display panel.

24. electronic equipments as claimed in claim 22, is characterized in that, described display panel is display panels.

25. electronic equipments as claimed in claim 22, is characterized in that, described electronic equipment is mobile phone, panel computer, notebook computer or desktop computer.

26. 1 kinds of electronic equipments, it is characterized in that, comprising: electronic equipment comprises first device and the second device, and wherein first device is display device, described display device comprises the driving circuit as described in claim 13～15 any one claim, and the second device is in described time out work.

27. electronic equipments as claimed in claim 26, is characterized in that, the second device is contactor control device.

28. electronic equipments as claimed in claim 27, is characterized in that, described contactor control device comprises the touch control detection circuit that contact panel is connected with this contact panel, and touch control detection circuit carries out touch control detection at described time out to described contact panel.

29. electronic equipments as claimed in claim 28, is characterized in that, described contact panel or be external hanging touch panel, or be embedded touch control panel.