CN203851025U - DC/DC converter and electronic device using same - Google Patents
DC/DC converter and electronic device using same Download PDFInfo
- Publication number
- CN203851025U CN203851025U CN201420182999.1U CN201420182999U CN203851025U CN 203851025 U CN203851025 U CN 203851025U CN 201420182999 U CN201420182999 U CN 201420182999U CN 203851025 U CN203851025 U CN 203851025U
- Authority
- CN
- China
- Prior art keywords
- inductor
- converter
- voltage
- load
- inductance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000001514 detection method Methods 0.000 claims description 24
- 230000033228 biological regulation Effects 0.000 claims description 12
- 239000003990 capacitor Substances 0.000 claims description 11
- 230000001143 conditioned effect Effects 0.000 claims description 5
- 238000013459 approach Methods 0.000 claims description 4
- 238000000034 method Methods 0.000 description 5
- 230000008859 change Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 238000012545 processing Methods 0.000 description 4
- 238000012546 transfer Methods 0.000 description 4
- 230000008569 process Effects 0.000 description 3
- 230000000630 rising effect Effects 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 230000003190 augmentative effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000009471 action Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 238000010573 double replacement reaction Methods 0.000 description 1
- 238000004134 energy conservation Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 230000003252 repetitive effect Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
Abstract
The utility model aims at improving efficiency of a multiphase DC/DC converter in a light load state, and provides a DC/DC converter and an electronic device using the same. According to quantities of an inductor (L1) of each channel, a switching circuit (14) of each channel and a load current (IOUT) flowing through a load (4), the DC/DC converter (2) changes the number (K) of channels arranged to be effective, controls switching circuits (CH1-CHK) corresponding to the effective channels, and enables a feedback voltage (VFB) corresponding to an output voltage (VOUT) to be identical with a specified target voltage (VREF). In a lightest load state, a controller (16) only enables the single channel (CH1) to be effective. The value of the inductance (L1) of the inductor (L1) arranged in the channel (CH1) is set to be different from inductance values of inductors (L1) of other channels so as to obtain high efficiency in the lightest load state.
Description
Technical field
The utility model relates to DC/DC converter.
Background technology
Along with the progress of semiconductor technology, the operating voltage of semiconductor device declines day by day.At CPU (Central Processing Unit; Central processing unit), GPU (Graphics Processing Unit; Graphic process unit), DSP (Digital Signal Processor; Digital signal processor) in, the processor also moving under supply voltage 1.5V in exploitation.In such semiconductor device, for example, while directly supplying with the supply voltage of 3V left and right, power loss is larger.Under these circumstances, utilize the DC/DC converter to 1.5V by the voltage step-down of 3V.
Here, CPU, GPU, DSP operating current in holding state drops in fact zero level, in working order in, along with signal treating capacity strengthens, operating current increases.That is, the output current of DC/DC converter (load current) dynamically change in the scope of several mA～number A.
In order to tackle the dynamic range of larger like this load current, utilize heterogeneous DC/DC converter (patent documentation 1).
Prior art document
Patent documentation
Patent documentation 1 TOHKEMY 2006-211760 communique
Utility model content
The problem that utility model will solve
Heterogeneous DC/DC converter has a plurality of passages (channel), comprises a plurality of inductors to each channel setting.In the past, the inductance of the inductor of a plurality of passages was all equally designed.Specifically, in the larger heavy duty state of load current, in order to obtain high efficiency, the inductance of all inductors is equally determined.
, because of energy-conservation requirement in recent years, seeking the further low-power consumption of DC/DC converter.Especially, in load, be in the light-load state that is holding state such as CPU, require the power consumption of DC/DC converter also to reduce as possible, and reduce the power consumption as entire system.
The utility model completes in view of such problem, and one of exemplary object of its a certain mode is, the heterogeneous DC/DC converter that has improved the efficiency in light-load state is provided.
The scheme of dealing with problems
Mode of the present utility model relates to heterogeneous DC/DC converter.This DC/DC converter comprises: outlet line, has connected load; Output capacitor, is connected to outlet line; A plurality of inductors, to each channel setting, one end of each inductor is connected with outlet line; A plurality of switching circuits, to each channel setting, the lead-out terminal of each switching circuit is connected to the other end of corresponding inductor; And controller, according to the amount of the load current flowing through in load, the effectively number of the passage of (active) is changed, control the switching circuit corresponding to effective passage, so that consistent corresponding to the feedback voltage of output voltage and the target voltage of regulation of outlet line.
At only single passage effectively in light-load state, the inductance of the inductor arranging in this single passage is set to the value different from the inductance of the inductor of other passages, to obtain high efficiency in light-load state.
According to which, for becoming effective passage at load current in for minimum light-load state, by paying attention to the efficiency of light-load state rather than the efficiency in heavy duty state, thereby determine the inductance of inductor, can improve the efficiency of light-load state.
The inductance of the inductor of other passages also can have completely equal value.
In addition also the inductance of the inductor of other passages can be determined to obtain high efficiency in heavy duty state.
Controller also can comprise: error amplifier, the error of amplifying feedback voltage and target voltage, and generated error voltage; And a plurality of pulse modulators, to each channel setting, generate respectively the pulse signal that duty ratio is conditioned, so that the mean value of the coil current flowing through in the inductor of corresponding passage approaches the current value corresponding to error voltage.
Thus, can make the mean value of the electric current that flows through in the inductor of a plurality of passages consistent.
A plurality of pulse modulators also can comprise respectively: current detection circuit, detects corresponding coil current, and generates the detection signal corresponding to coil current; Filter, the high fdrequency component of removing detection signal; Slope compensation device, overlapping ramp signal on detection signal; Comparator, compares the output of slope compensation device and error voltage, and generating reset signal; And pulse generator, according to the clock signal in the cycle of reset signal and regulation, generate the pulse signal that level shifts.
Another way of the present utility model also relates to heterogeneous DC/DC converter.
This DC/DC converter comprises: outlet line, has connected load; Output capacitor, is connected to outlet line; A plurality of inductors, to each channel setting, one end of each inductor is connected with outlet line; A plurality of switching circuits, to each channel setting, the lead-out terminal of each switching circuit is connected to the other end of corresponding inductor; And controller, according to the amount of the load current flowing through in load, the number of effective passage is changed, control the switching circuit corresponding to effective passage, so that consistent corresponding to the feedback voltage of output voltage and the target voltage of regulation of outlet line.In light-load state, the inductance of the inductor arranging in effectively single passage has the value higher than the inductance of the inductor of other passages.
According to which, can reduce the peak value of the coil current in light-load state.Thus, the reducing amount of the loss that the conducting resistance of the switch element of switching circuit causes surpasses the augmenting portion of the loss causing along with the rising of switching frequency, so can improve efficiency as a whole.
The inductance of the inductor of other passages also can have completely equal value.
In addition also the inductance of the inductor of other passages can be determined to obtain high efficiency in heavy duty state.
Controller also can comprise: error amplifier, the error of amplifying feedback voltage and described target voltage, and generated error voltage; And a plurality of pulse modulators, to each channel setting, each pulse modulator generates the pulse signal that duty ratio is conditioned, so that the mean value of the coil current flowing through in the inductor of corresponding passage approaches the current value corresponding to error voltage.
Thus, can make the mean value of the electric current that flows through in the inductor of a plurality of passages consistent.
A plurality of pulse modulators also can comprise respectively: current detection circuit, detects corresponding coil current, and generates the detection signal corresponding to coil current; Filter, the high fdrequency component of removing detection signal; Slope compensation device, overlapping ramp signal on detection signal; Comparator, compares the output of slope compensation device and error voltage, and generating reset signal; And pulse generator, according to the clock signal in the cycle of reset signal and regulation, generate the pulse signal that level shifts.
Another way of the present utility model relates to electronic equipment.Electronic equipment also can comprise: processor; And the DC/DC converter that the above-mentioned any one of processor supply line voltage is recorded.
Having, by the combination in any of above structural element, structural element of the present utility model or show the mode that between method, device, system etc., phase double replacement obtains, is also effective as mode of the present utility model again.
The effect of utility model
According to a certain mode of the present utility model, can improve the efficiency in light-load state.
Accompanying drawing explanation
Fig. 1 means the block diagram of structure of the electronic equipment of comprising of execution mode of heterogeneous type DC/DC converter.
Fig. 2 is the working waveform figure of the DC/DC converter in light-load state.
Fig. 3 means the inductance of inductor of the 1st passage and the figure of the relation between the efficiency of the DC/DC converter in light-load state.
Fig. 4 (a), (b) mean the figure of the efficiency in heavy duty state φ N and light-load state φ 1.
Fig. 5 is the circuit diagram of the DC/DC converter of the 1st variation.
Fig. 6 is the working waveform figure of heavy duty state φ N of the DC/DC converter of Fig. 5.
Label declaration
2...DC/DC converter, 4... load, 10... incoming line, 12... outlet line, 14... switching circuit, 16... controller, 20... channel control unit, 22... error amplifier, 24... pulse modulator, 26... driver, L1... inductor, C1... output capacitor, 100... electronic equipment.
Embodiment
Below, based on preferred implementation and with reference to the accompanying drawings of the utility model.To each identical or equal structural element shown in the drawings, member, the additional identical label of processing, and suitably the repetitive description thereof will be omitted.In addition, execution mode is illustration rather than restriction utility model, and all features that execution mode is recorded or its combination may not be all the essential parts of utility model.
In this manual, so-called " state that member A is connected with member B ", except member A and member B are physically direct-connected situation, also comprise member A with member B by the indirect situation about being connected of other member their status of electrically connecting not being exerted an influence.
Similarly, so-called " member C is arranged on the state between member A and member B ", except member A and member C or member B and the direct-connected situation of member C, also comprise the situation that other members by their status of electrically connecting not being exerted an influence connect indirectly.
Fig. 1 means the block diagram of structure of electronic equipment 100 of the DC/DC converter 2 of comprising of execution mode of heterogeneous (port number N is more than 2) type.
Electronic equipment 100 comprises DC/DC converter 2 and load 4.For example, electronic equipment 100 is notebook type PC, television set or display equipment, recording (recorder) equipment, game machine.Load 4 is for example CPU, GPU, DSP.
DC/DC converter 2 comprises incoming line 10, outlet line 12, a plurality of switching circuit 14_1～14_N, a plurality of inductor L1_1～L1_N and controller 16.
In incoming line 10, supply with the input voltage V of direct current
iN.Input voltage V
iNcan be the cell voltage from battery, can be also that commercial ac voltage is carried out to the voltage that level and smooth rectification obtains.
In outlet line 12, headed by CPU or DPS, connect the load 4 of its operating current dynamic change.Output capacitor C1 is arranged between outlet line 12 and earth connection.
To each channel setting a plurality of (N) inductor L1_1～L1_N, one end of each inductor is connected with outlet line 12.
To a plurality of switching circuit 14_1～14_N of each channel setting, the lead-out terminal LX of each switching circuit is connected to the other end of corresponding inductor L1_1～L1_N.
Controller 16 is according to the load current I flowing through in load 4
oUTamount, several K (1≤K≤N) of effective passage are changed.And controller 16 switching controls are corresponding to effective switching circuit 14_1～14_K of channel C H1～CHK, so that corresponding to the output voltage V of outlet line 12
oUTfeedback voltage V
fBtarget voltage V with regulation
rEFunanimously, for non-effective channel C H (K+1)～CHN, stop switching.Controller 16 also can switch by the phase difference of (360/N) ° switching circuit 14_1～14_K of effective channel C H1～CHK.
Specifically, at load current I
oUTin larger heavy duty state φ N, K=N, all channel C H1～CHN are effective.At load current I
oUTvery little, or be essentially in zero light-load state φ 1, K=1, only single channel C H1 is effective.At load current I
oUTwhile getting the value of the centre between heavy duty state φ N and light-load state φ 1, also can exist K=2, K=3 ..., state φ 2～φ N-1 of K=N-1.
Controller 16 comprises channel control unit 20, error amplifier 22, pulse modulator 24, a plurality of driver 26_1～26_N.
Channel control unit 20 is according to load current I
oUT, control effective port number K.For example DC/DC converter 2 also can comprise detection load current I
oUTcurrent sensor.In this situation, the detected value of channel control unit 20 based on current sensor, also can determine effective port number K.
Or load 4 also has (i) can estimate load current I from the state of self
oUTamount, or (ii) built-in current sensor, can measure load current I
oUTthe situation of amount.In these cases, the control signal that channel control unit 20 also can be based on from load 4, determines effective port number K.
Error amplifier 22 is by feedback voltage V
fBreference voltage V with regulation
rEFerror amplify, and generated error voltage V
eRR.Pulse modulator 24 is based on error voltage V
eRRwith effective port number K, for each effective channel C H1～CHK, the pulse signal S1_1～S1_K after production burst modulation.Error amplifier 22 is by pulse-width modulation (PWM) or pulse frequency modulated (PFM), the duty ratio of regulating impulse signal S1_1～S1_K.Pulse modulator 24 can be for example the modulator of voltage mode, can be also the modulator of current-mode, and its structure is not particularly limited.
Each channel C H1～CHN is arranged to a plurality of driver 26_1～26_N.Effectively driver 26_1～26_K of channel C H1～CHK, according to corresponding pulse signal S1_1～S1_K, switches corresponding switching circuit 14_1～14_K.
Definite method of a plurality of inductor L1_1～L1_N then, is described.
In the present embodiment, at only single channel C H1 in effective light-load state φ 1, the inductance (being designated as L1_1) of the inductor L1 arranging in this single channel C H1 is set to the value different from the inductance (being designated as L1_2～L1_N) of the inductor of other passages, to obtain high efficiency in light-load state φ 1.
Fig. 2 is the working waveform figure of the DC/DC converter 2 in light-load state.In light-load state, controller 16 is with so-called PFM work pattern.In PFM pattern, by the interval T of conducting
oN, T between cut-off region
oFF, T between high resistance regions
hiZrepeatedly.In Fig. 2, represent waveform (i), (ii) to the different inductance of inductor L1_1.
Specifically, certain conduction period T
oNduring this time, the transistor turns of high side one side of switching circuit 14_1, its output LX is high level voltage V
rN.Now, between the two ends of inductor L1_1, be applied in voltage (V
iN-V
oUT), so the electric current I flowing through in inductor L1
lXwith with (V
iN-V
oUTthe proportional slope of)/L1_1 rises, and the energy of storing in inductor L1_1 increases.
For example, pulse modulator 24 also can be by the interval T of conducting
oNbe fixed as official hour.
Or pulse modulator 24 also can detect the interval T of conducting
oNin coil current I
lX, at coil current I
lXwhile reaching the peak value of regulation, transfer to T between next cut-off region
oFF.
Follow T between the off period
oFFduring this time, the transistor turns of downside one side of switching circuit 14_1, its output LX is low level voltage (earthed voltage V
gND).T between the off period
oFFduring this time, between the two ends of inductor L1, be applied in voltage V
oUT, the electric current I flowing through in inductor L1_1
lXwith V
oUTthe slope of/L1_1 reduces.
For example, pulse modulator 24 also can detect T between cut-off region
oFFin coil current I
lX, and be for zero time in this current value essence, transfer to T between next high resistance regions
hiZ.
At conduction period T
oNand T between the off period
oFFin, the electric current I of output capacitor C1 because flowing through in inductor L1_1
lXand be recharged output voltage V
oUTrise.
Follow T between high resistance regions
hiZduring this time, high side one side of switching circuit 14_1, transistor two sides of downside one side are cut-off, and switch terminal LX is high impedance.Thus, stop the electric current supply from inductor L1 to output capacitor C1.T between high resistance regions
hiZduring this time, output capacitor C1 is by load current I
oUTand be discharged output voltage V
oUTalong with the time, decline.
For example, pulse modulator 24 will be corresponding to output voltage V
oUTfeedback voltage V
fBreference voltage V with regulation
rEFcompare, and in feedback voltage V
fBdrop to reference voltage V
rEFtime, transfer to the interval T of conducting
oN.
At the interval T of conducting
oNt between cut-off region before,
oFFbefore, also can insert the high-side transistor of switching circuit 14, (dead time) T idle time that low side transistors two sides are cut-off
dT.The interval T of conducting
oNt idle time before
dTduring this time, the electric current flowing through in inductor L1 flows through via the body diode of high-side transistor, so the voltage V of switch terminal
lXfor V
iN+ V
f.V
fit is the forward voltage of body diode (body diode).In addition T between cut-off region,
oFFt idle time before
dTduring this time, the electric current flowing through in inductor L1 flows through via the body diode of low side transistors, so the voltage V of switch terminal
lXfor-V
f.V
fit is the forward voltage of body diode.
According to this PFM, control feedback voltage V
fBby reference voltage V
rEFas bottom level (bottom level), stablized.
Fig. 3 means the inductance of inductor L1_1 of the 1st channel C H1 and the figure of the relation between the efficiency of the DC/DC converter 2 in light-load state.Efficiency shown in Fig. 3 is, when having designed the DC/DC converter 2 of N=5 passage, by analog computation, to go out.Have, the longitudinal axis is normalized again, so that gross power P
tOTALbe 100%.
The efficiency of DC/DC converter 2 is by the power P that is supplied to load 4
lOADwith the gross power P that DC/DC converter 2 is added
tOTALratio provide.Be supplied to the power P of load 4
lOADby following formula (1), provide.
P
LOAD=(P
TOTAL-P
LOSS)...(1)
P
lOSSbe the power loss consuming by beyond load 4, by following formula, provide.
P
LOSS=(P
IC+P
SW+P
PMOS+P
NMOS)...(2)
P
iCthe power consumption that represents the core (22,20,24 etc.) of controller 16, P
sWrepresent to follow the high-side transistor of switching circuit 14, the power consumption discharging and recharging, the P of the grid capacitance of low side transistors
pMOSthe power loss that the conducting resistance of expression high-side transistor causes, P
nOMSthe power loss that the conducting resistance of expression low side transistors causes.In addition at P
lOSSin, also comprise the power loss that the dead resistance (ESR) of inductor L1 or output capacitor C1 causes, but omitted here.
As shown in Figure 2, at ON time T
oNunder fixing condition, at 1 cycle of PFM pattern, the i.e. interval T of 1 conducting
oNand T between cut-off region
oFFin, be supplied to the coil current I of output capacitor C1
lXintegrated value (be output voltage V
oUTascensional range) corresponding to the inductance value of inductor L1_1.
Specifically, as shown in (i), inductance value is less, coil current I
lXintegrated value larger, the output voltage V in 1 cycle
oUTascensional range larger.On the contrary, as shown in (ii), inductance value is larger, coil current I
lXintegrated value less, the therefore output voltage V in 1 cycle
oUTascensional range less.
That is, as shown in (i), inductance value is less, the switching frequency f in PFM pattern
1lower, as shown in (ii), inductance value is larger, switching frequency f
2higher.
As shown in Figure 3, switching frequency is higher, and inductance value is larger, the power consumption P of core
iCthe power P that discharges and recharges needs of the grid capacitance of switching circuit 14
sWlarger.
On the other hand, coil current I
lXpeak value larger, inductance is less, in high-side transistor, low side transistors conducting resistance separately, power loss is larger.
With reference to Fig. 3, by the loss P in light-load state φ 1
lOSSbe made as minimum, in other words efficiency being made as to maximum inductance value is 1nH.Therefore, the inductance value of the inductor L1 of the 1st channel C H1 is set to 1nH.
Inductance L 1_2～L1_N for other channel C H2～CHN, same with heterogeneous DC/DC converter in the past, the efficiency of take in heavy duty state φ N is as maximum next definite, in the situation that calculate under the condition identical with Fig. 3, its optimum value is 0.47nH.
It is more than the structure of DC/DC converter 2.Its effect is then described.
Fig. 4 (a), (b) are the figure of the efficiency in heavy duty state φ N and light-load state φ 1.Transverse axis represents load current I
oUT.In Fig. 4 (a), (b), represent respectively the inductance of the 1st channel C H1 to be made as 1 μ H, the inductance of other passages is made as to the efficiency (i) of DC/DC converter 2 of execution mode of 0.47 μ H and the efficiency of the prior art (ii) that the inductance of full tunnel is made as to 0.47 μ H.
According to the DC/DC converter 2 of execution mode, by paying attention to the efficiency of light-load state φ 1, determine the inductance of the 1st channel C H1, as shown in Fig. 4 (b), compared with prior art, can be by improved efficiency 5% left and right.
On the other hand, with reference to Fig. 4 (a), at load current I
oUTmaximum region (I
oUT≈ 8000mA) in, degradation in efficiency 1.3% left and right of the DC/DC converter 2 of execution mode.This is that to result from the inductance L 1_1 of the 1st channel C H1 larger, and its D.C. resistance component increases, and the loss in the 1st passage increases.But the improvement of the larger efficiency in light-load state φ 1, is enough to compensate the deterioration slightly of the efficiency in heavy duty state.
Be supplied to the load current I of load 4
oUTdynamically change constantly.The power consumption P[Wh that comprises the entire system of DC/DC converter 2 and load 4] by following formula, provide.
P=(T
1×P
1+T
2×P
2+...+T
N×P
N)=(∑
i＝1：kT
iP
i)...(3)
T
irepresent that i passage is the effective time, P
irepresent power consumption at that time.
According to the kind of load 4, there is only single passage for the power consumption T of effectively light-load state
1* P
1than the large situation of the power consumption of other states or with the power consumption of other states, compare situation about can not ignore.For example,, in the situation that be loaded on the electronic equipment of notebook PC, dull and stereotyped PC, television set or sound pick-up outfit, game machine etc. T
1be equivalent to the time that electronic equipment is holding state.In this case, the time T that has holding state
1than the time T of the actual use/real work of electronic equipment
2, T
3... T
nlong situation, in formula (3), has T
1* P
1be overriding situation.
In such situation, use the DC/DC converter 2 of execution mode, by determining the inductance value of inductor L1_1, so that the efficiency of light-load state φ 1 improves, thereby can reduce power consumption.
From another angle, in light-load state φ 1, as the inductance of the inductor L1_1 arranging in effectively single channel C H1, there is the high value of inductance than inductor L1_1～L1_N of other channel C H2～CHN.
Thus, can reduce the coil current I in light-load state φ 1
lXpeak value.Thus, the slippage of the loss that the conducting resistance of the switch element of switching circuit 12 (high side (high side) transistor, downside (low side) transistor) causes surpasses the augmenting portion of the loss that the rising of switching frequency brings, so can improve efficiency as a whole.
Above, based on execution mode, the utility model has been described.Those skilled in the art understand certainly, and this execution mode is illustration, they each structural element or the combination of variety of processes (process) in can have various variation, and such variation is also in scope of the present utility model.Below, such variation is described.
(the 1st variation)
In the DC/DC of execution mode converter 2, by the inductor design of the inductor L1_1～L1_N of a plurality of passages, be different values, so the switching circuit of each passage 14 during with identical duty ratio switch, is had at coil current I
lXthe misgivings of upper generation skew.In addition, while having deviation in the conducting resistance of power transistor of switching circuit 14 that forms each passage, have at coil current I,
lXthe misgivings of upper generation skew.When electric current flows through significantly in the inductor L1_i of certain channel C Hi, can accelerate the deteriorated of this inductor L1_i.In the 1st variation, explanation can suppress the concrete structure of DC/DC converter 2a of the skew of electric current.
Fig. 5 is the circuit diagram of the DC/DC converter 2a of the 1st variation.
Controller 16a comprises the pulse modulator 24_1～24_N of error amplifier 22, each passage, the driver 26_1～26_N of each passage.Pulse modulator 24_1～24_N has identical structure, so the 1st passage is only described.
Pulse modulator 24_1 is the pulse width modulator of so-called average-current mode.Pulse modulator 24_1 detects the electric current I flowing through in the inductor L1_1 of corresponding passage
lX1, and generate the pulse signal S1_1 that duty ratio is conditioned, so that this average current I
lX1-AVEwith corresponding to error voltage V
eRRcurrent level consistent.
Pulse modulator 24_1 comprises current detection circuit 30, filter 40, slope compensation device 42, PWM comparator 48, pulse generator 50.Voltage drop (drain electrode-voltage between source electrodes) in the conducting state of the low side transistors ML of the switching circuit 14_1 of current detection circuit 30 based on corresponding, magnetic test coil electric current I
lX1.
For example, current detection circuit 30 comprises error amplifier 32, the 1st transistor the 34, the 2nd transistor 36.The 2nd transistor 36 is N-channel MOS FETs identical with low side transistors ML, and on its grid, input is the voltage V that conducting state is identical with low side transistors ML
lN.The source electrode of the 1st transistor 34 is connected with the drain electrode of the 2nd transistor 36.On the in-phase input terminal of error amplifier 32, the drain voltage V of input low side transistors ML
lX, be the drain source voltage across poles V of the low side transistors ML in conducting state
dS.The reversed input terminal of error amplifier 32 is connected with the drain electrode of the 2nd transistor 36.By the feedback of error amplifier 32, the drain voltage V of the drain voltage of the 2nd transistor 36 and low side transistors ML
lXequate.Therefore, the 2nd transistor 36 and low side transistors ML, equate between drain voltage, between grid voltage, between source voltage, in the 2nd transistor 36, flow through with low side transistors ML in the coil current I that flows through
lX1proportional detection electric current I
lX1'.
Have, the structure of current detection circuit 30 is not limited to the structure of Fig. 5 again, also can use known other circuit.
Filter 40 is removed detection electric current I
lX' high fdrequency component, and be transformed to the detection signal of voltage.Slope compensation device 42 comprises: the ramp generator 44 that generates ramp signal; And ramp signal is overlapped to the adder 46 in the output of filter 40.PWM comparator 48 is by error voltage V
eRRcompare with the output of slope compensation device 42, when the output of slope compensation device 42 is larger, i.e. coil current I
lX1surpass corresponding to error voltage V
eRRcurrent level time, by reset signal S
rSTcertainly (high level).
Pulse generator 50 comprises oscillator 52, trigger 54.Oscillator 52 generates the clock signal C K of the cycle T s with pulse-width modulation.Input clock signal CK on the set terminal of trigger 54, inputs reset signal S on reseting terminal
rST.The rising edge of the output S1_1 response clock signal CK of trigger 54 changes high level, reset signal S into each cycle Ts
rSTwhile being affirmed (assert), transfer to low level.
It is more than the structure of DC/DC converter 2a.Its action is then described.Fig. 6 is the working waveform figure of heavy duty state φ N of the DC/DC converter 2a of Fig. 5.In each channel C H, coil current I
lXstabilize to corresponding to public error voltage V
eRRaverage current I
aVE.When N passage is effective, average current I
aVEfor I
oUT/ N.
Like this, according to the DC/DC converter 2a of the 1st variation, the inhomogeneities regardless of the inductance of the inductor of a plurality of passages, can both make coil current I
lXmean value consistent, can suppress the skew of coil current.
(the 2nd variation)
In execution mode, the DC/DC converter of voltage-dropping type has been described, but the utility model is not limited to this, be also applicable to the DC/DC converter of booster type or buck-boost type.
Based on execution mode, the utility model has been described, but execution mode only represents principle of the present utility model, application, in execution mode, in the scope of thought of the present utility model of scope defined that does not depart from claim, can conclude the change that has many variation or configuration.
Claims (11)
1. a DC/DC converter, for heterogeneous DC/DC converter, is characterized in that, comprising:
Outlet line, has connected load;
Output capacitor, is connected to described outlet line;
A plurality of inductors, to each channel setting, one end of each inductor is connected with outlet line;
A plurality of switching circuits, to each channel setting, the lead-out terminal of each switching circuit is connected to the other end of corresponding inductor; And
Controller, according to the amount of the load current flowing through in described load, changes the number of effective passage, controls the switching circuit corresponding to effective passage, so that consistent corresponding to the feedback voltage of output voltage and the target voltage of regulation of described outlet line,
At only single passage effectively in light-load state, the inductance of the inductor arranging in this single passage is set to the value different from the inductance of the inductor of other passages, to obtain high efficiency in described light-load state.
2. DC/DC converter as claimed in claim 1, is characterized in that,
The inductance of the inductor of described other passages has completely equal value.
3. DC/DC converter as claimed in claim 1 or 2, is characterized in that,
The inductance of the inductor of described other passages is determined, to obtain high efficiency in heavy duty state.
4. DC/DC converter as claimed in claim 1 or 2, is characterized in that,
Described controller comprises:
Error amplifier, the error of amplifying described feedback voltage and described target voltage, and generated error voltage; And
A plurality of pulse modulators, to each channel setting, generate respectively the pulse signal that duty ratio is conditioned, so that the mean value of the coil current flowing through in the inductor of corresponding passage approaches the current value corresponding to described error voltage.
5. DC/DC converter as claimed in claim 4, is characterized in that,
Described a plurality of pulse modulator comprises respectively:
Current detection circuit, detects corresponding coil current, and generates the detection signal corresponding to coil current;
Filter, the high fdrequency component of removing described detection signal;
Slope compensation device, overlapping ramp signal on described detection signal;
Comparator, compares the output of described slope compensation device and described error voltage, and generating reset signal; And
Pulse generator, according to the clock signal in the cycle of described reset signal and regulation, generates the pulse signal that level shifts.
6. a DC/DC converter, for heterogeneous DC/DC converter, is characterized in that, comprising:
Outlet line, has connected load;
Output capacitor, is connected to described outlet line;
A plurality of inductors, to each channel setting, one end of each inductor is connected with outlet line;
A plurality of switching circuits, to each channel setting, the lead-out terminal of each switching circuit is connected to the other end of corresponding inductor; And
Controller, according to the amount of the load current flowing through in described load, changes the number of effective passage, controls the switching circuit corresponding to effective passage, so that consistent corresponding to the feedback voltage of output voltage and the target voltage of regulation of described outlet line,
At only single passage, effectively in light-load state, the inductance of the inductor arranging in this single passage has the value higher than the inductance of the inductor of other passages.
7. DC/DC converter as claimed in claim 6, is characterized in that,
The inductance of the inductor of described other passages has completely equal value.
8. the DC/DC converter as described in claim 6 or 7, is characterized in that,
The inductance of the inductor of described other passages is determined, to obtain high efficiency in heavy duty state.
9. the DC/DC converter as described in claim 6 or 7, is characterized in that,
Described controller comprises:
Error amplifier, the error of amplifying described feedback voltage and described target voltage, and generated error voltage; And
A plurality of pulse modulators, to each channel setting, each pulse modulator generates the pulse signal that duty ratio is conditioned, so that the mean value of the coil current flowing through in the inductor of corresponding passage approaches the current value corresponding to described error voltage.
10. DC/DC converter as claimed in claim 9, is characterized in that,
Described a plurality of pulse modulator comprises separately:
Current detection circuit, detects corresponding coil current, and generates the detection signal corresponding to coil current;
Filter, the high fdrequency component of removing described detection signal;
Slope compensation device, overlapping ramp signal on described detection signal;
Comparator, compares the output of described slope compensation device and described error voltage, and generating reset signal; And
Pulse generator, according to the clock signal in the cycle of described reset signal and regulation, generates the pulse signal that level shifts.
11. 1 kinds of electronic equipments, is characterized in that, comprising:
Processor; And
The DC/DC converter that any one in the claim 1 of described processor supply line voltage, 2,6,7 is recorded.
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2013085172 | 2013-04-15 | ||
| JP2013-085172 | 2013-04-15 | ||
| JP2014-073108 | 2014-03-31 | ||
| JP2014073108A JP2014226026A (en) | 2013-04-15 | 2014-03-31 | Dc/dc converter and electronic apparatus using the same |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203851025U true CN203851025U (en) | 2014-09-24 |
Family
ID=51563993
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201420182999.1U Expired - Lifetime CN203851025U (en) | 2013-04-15 | 2014-04-15 | DC/DC converter and electronic device using same |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203851025U (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105843980A (en) * | 2015-02-02 | 2016-08-10 | 株式会社村田制作所 | Power inductor evaluation apparatus and power inductor evaluation program |
| WO2018136215A3 (en) * | 2016-12-28 | 2018-10-04 | Texas Instruments Incorporated | Multiphase converter with phase interleaving |
| CN109314463A (en) * | 2016-06-14 | 2019-02-05 | 住友电气工业株式会社 | The control method of multiphase DC/DC converter, computer program and multiphase DC/DC converter |
| WO2019206231A1 (en) * | 2018-04-26 | 2019-10-31 | 比亚迪股份有限公司 | Dcdc converter, vehicle-mounted charger and electric vehicle |
| WO2021077312A1 (en) * | 2019-10-22 | 2021-04-29 | 华为技术有限公司 | Conversion circuit and inductor |
-
2014
- 2014-04-15 CN CN201420182999.1U patent/CN203851025U/en not_active Expired - Lifetime
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105843980A (en) * | 2015-02-02 | 2016-08-10 | 株式会社村田制作所 | Power inductor evaluation apparatus and power inductor evaluation program |
| CN105843980B (en) * | 2015-02-02 | 2019-09-03 | 株式会社村田制作所 | The evaluating apparatus of power inductance and the assessment process of power inductance |
| CN109314463A (en) * | 2016-06-14 | 2019-02-05 | 住友电气工业株式会社 | The control method of multiphase DC/DC converter, computer program and multiphase DC/DC converter |
| WO2018136215A3 (en) * | 2016-12-28 | 2018-10-04 | Texas Instruments Incorporated | Multiphase converter with phase interleaving |
| WO2019206231A1 (en) * | 2018-04-26 | 2019-10-31 | 比亚迪股份有限公司 | Dcdc converter, vehicle-mounted charger and electric vehicle |
| CN110417267A (en) * | 2018-04-26 | 2019-11-05 | 比亚迪股份有限公司 | Dcdc converter, Vehicular charger and electric vehicle |
| US11404965B2 (en) | 2018-04-26 | 2022-08-02 | Byd Company Limited | DC-DC converter, on-board charger, and electric vehicle |
| WO2021077312A1 (en) * | 2019-10-22 | 2021-04-29 | 华为技术有限公司 | Conversion circuit and inductor |
| CN114503417A (en) * | 2019-10-22 | 2022-05-13 | 华为技术有限公司 | Conversion circuit and inductor |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US10892686B2 (en) | Hysteretic control for transformer based power converters | |
| US11101735B2 (en) | Three-level converter using an auxiliary switched capacitor circuit | |
| JP6162510B2 (en) | STEP-DOWN DC / DC CONVERTER, CONTROLLER AND CONTROL METHOD THEREOF, AND ELECTRONIC DEVICE USING THE SAME | |
| US7804282B2 (en) | Buck converter with inductor pre-energizing | |
| US9577532B2 (en) | Switching regulator circuits and methods | |
| US8698475B2 (en) | Switching-mode power supply with ripple mode control and associated methods | |
| EP2230755B1 (en) | Charge current reduction for current limited switched power supply | |
| US8000117B2 (en) | Buck boost function based on a capacitor bootstrap input buck converter | |
| US20150015219A1 (en) | Dc/dc converter | |
| CN203851025U (en) | DC/DC converter and electronic device using same | |
| US20110101946A1 (en) | Voltage converters | |
| US9178421B2 (en) | Multi-stage power supply with fast transient response | |
| CN105471262A (en) | Three phases controller for buck-boost regulators | |
| CN104242648A (en) | Audio frequency deadband system and method for switch mode regulators operating in discontinuous conduction mode | |
| CN101040424A (en) | Method and apparatus for adjusting current amongst phases of a multi-phase converter | |
| CN103378731A (en) | Power supply device and power supply control method | |
| US9413232B2 (en) | Droop reduction circuit for charge pump buck converter | |
| US20110279155A1 (en) | Slew rate PWM controlled charge pump for limited in-rush current switch driving | |
| Hardy et al. | 11.5 A 21W 94.8%-Efficient Reconfigurable Single-Inductor Multi-Stage Hybrid DC-DC Converter | |
| US9627970B2 (en) | Voltage converter and method for voltage conversion | |
| US11502607B2 (en) | Methods and apparatuses for auxiliary transient control system | |
| KR101239628B1 (en) | Dc-dc converter | |
| US20210167758A1 (en) | Switch circuit with reduced switch node ringing | |
| Jung et al. | A high-efficient and fast-transient buck-boost converter using adaptive direct path skipping and on-duty modulation | |
| JP2007501598A (en) | Synchronous rectifier output voltage control |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |