CN203839647U - Interface line collecting device - Google Patents
Interface line collecting device Download PDFInfo
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- CN203839647U CN203839647U CN201420244901.0U CN201420244901U CN203839647U CN 203839647 U CN203839647 U CN 203839647U CN 201420244901 U CN201420244901 U CN 201420244901U CN 203839647 U CN203839647 U CN 203839647U
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Abstract
An interface line collecting device is provided. The interface line collecting device includes a data signal processing board, a data bus plug, a J-LINK interface and a USB interface; the data signal processing board is provided with a first normally-open switch group K1 which is used for controlling the J-LINK interface to be communicated with the data bus plug when detecting that the J-LINK interface is connected with an external device, and a second normally-open switch group K2 which is used for controlling the USB interface to be communicated with the data bus plug when detecting that the USB interface is connected with the external device; the J-LINK interface is connected with the data bus plug through the first normally-open switch group K1; the USB interface is connected with the data bus plug through the second normally-open switch group K2; the data bus plug is used for collecting data buses of the J-LINK interface and the USB interface and is in one-to-one correspondence connection with interfaces of an external core board, so that static electricity and electromagnetic interference can be effectively prevented from entering a main board core board.
Description
Technical field
The utility model belongs to power communication field, relates in particular to a kind of interface hub.
Background technology
In current research and development of products, various debugging interfaces and functional interface on a mainboard are quite a lot of, as J-LINK interface, RS-232 serial ports, Ethernet interface and USB interface etc.These interfaces are arranged on the edge of mainboard and are all connected with core board, because these interfaces all will be connected with outer PC or other communication apparatus, just make a mainboard need to draw a lot of connecting lines, so neither attractive in appearance, and on interface, plug frequently the generation that plug is easy to cause static, static can import the chip of core board into by these interface connecting lines, the core board of mainboard is caused to fatal threat.EMI (electromagnetic interference) is easy to seal in core board by these interface connecting lines simultaneously, causes the interference to normal communication signal, communication efficiency and communication quality between the communication apparatus that impact connects by this interface.
Utility model content
The utility model be intended to solve in prior art a plurality of interface lead-out wires on mainboard in disorder, easily produce the technical problem that static is scurried into and electromagnetic interference is scurried into, provide a kind of and can effectively avoid static to scurry into and interface hub that electromagnetic interference is scurried into, effectively improved the communication efficiency between communication apparatus.
Embodiment of the present utility model provides a kind of interface hub, and described interface hub comprises data-signal disposable plates, data/address bus plug, J-LINK interface and USB interface;
Described data-signal disposable plates is provided with when J-LINK interface being detected and be connected with external device, for controlling the first normal open switch group K1 of J-LINK interface and data/address bus plug connection and when USB interface being detected and be connected with external device, the second normal open switch group K2 being communicated with data/address bus plug for controlling USB interface;
Described J-LINK interface is connected with described data/address bus plug by the first normal open switch group K1, and described USB interface is connected with described data/address bus plug by the second normal open switch group K2;
Described data/address bus plug is for collecting the data/address bus of J-LINK interface and USB interface and connecting one to one with the interface of extraneous core board.
Preferably, in described data-signal disposable plates, be also provided with the sensing controler that whether is connected with external device for detection of J-LINK interface and/or USB interface, for controlling the first on-off controller of the first normal open switch group K1 closure, for controlling second switch controller and the power Vcc of the second normal open switch group K2 closure, described the first on-off controller and second switch controller are connected with described sensing controler respectively, and described power Vcc is connected with sensing controler, the first on-off controller and second switch controller respectively.
Preferably, described the first normal open switch group K1 is provided with the first normal open switch K11, the second normal open switch K12, the 3rd normal open switch K13, the 4th normal open switch K14,5 constant virtues K switch 15 and the 6th normal open switch K16, and described data-signal disposable plates is provided with the first pin J1, the second pin J2, the 3rd pin J3, the 4th pin J4, the 5th pin J5 and the 6th pin J6; Described data/address bus plug is provided with the first pin, the second pin, the 3rd pin, four-limbed, the 5th pin and the 6th pin;
One end of the first normal open switch K11 is connected with the ICE/TRST pin of J-LINK interface by lead-out wire, and the other end is connected on the first pin of data/address bus plug by the first pin J1 of data-signal disposable plates;
One end of the second normal open switch K12 is connected with the TDI pin of J-LINK interface by lead-out wire, and the other end is connected on the second pin of data/address bus plug by the second pin J2 of data-signal disposable plates;
One end of the 3rd normal open switch K13 is connected with the TMS pin of J-LINK interface by lead-out wire, and the other end is connected on the 3rd pin of data/address bus plug by the 3rd pin J3 of data-signal disposable plates;
One end of the 4th normal open switch K14 is connected with the TCK pin of J-LINK interface by lead-out wire, and the other end is connected on the four-limbed of data/address bus plug by the 4th pin J4 of data-signal disposable plates;
One end of 5 constant virtues K switch 15 is connected with the ICE RTCK pin of J-LINK interface by lead-out wire, and the other end is connected on the 5th pin of data/address bus plug by the 5th pin J5 of data-signal disposable plates;
One end of the 6th normal open switch K16 is connected with the TDO pin of J-LINK interface by lead-out wire, and the other end is connected on the 6th pin of data/address bus plug by the 6th pin J6 of data-signal disposable plates.
Preferably, described the second normal open switch group K2 is provided with the 7th normal open switch K21 and the 8th normal open switch K22, and described data-signal disposable plates is also provided with the 13 pin U13 and the 14 pin U14; On described data/address bus plug, be also provided with the 13 pin and the tenth four-limbed;
One end of the 7th normal open switch K21 is connected with the USB_DM pin of USB interface by lead-out wire, and the other end is connected on the 13 pin of data/address bus plug by the 13 pin U13 of data-signal disposable plates;
One end of the 8th normal open switch K22 is connected with the USB_DP pin of USB interface by lead-out wire, and the other end is connected on the tenth four-limbed of data/address bus plug by the 14 pin U14 of data-signal disposable plates.
Preferably, described data/address bus plug is plugged on the interface of described core board, and the pin on data/address bus plug is corresponding one by one with the interface data bus on core board.
Preferably, described the first on-off controller and second switch controller are respectively solenoid.
Preferably, on described data/address bus plug, be also provided with the grounding pin being connected with ground.
In above technical scheme, by being provided with data-signal disposable plates and the data/address bus plug of a plurality of normal open switch groups, by this data-signal disposable plates, the lead-in wire of a plurality of interfaces is managed concentratedly, and by normal open switch group, lead-in wire is pooled on described data/address bus plug, by plug, be connected with core board, can effectively prevent that static and electromagnetic interference from scurrying into mainboard core board, effectively improve the job security of core board and effectively improved the communication efficiency between communication apparatus.
Accompanying drawing explanation
Fig. 1 is the structured flowchart of the interface hub of a kind of embodiment of the utility model.
Fig. 2 is the structured flowchart of the interface hub of the utility model the second embodiment.
Embodiment
Clearer for technical problem, technical scheme and beneficial effect that the utility model is solved, below in conjunction with drawings and Examples, the utility model is further elaborated.Should be appreciated that specific embodiment described herein is only in order to explain the utility model, and be not used in restriction the utility model.
As shown in Figure 1, embodiment of the present utility model provides a kind of interface hub, described interface hub comprises data-signal disposable plates 20, data/address bus plug 27, J-LINK interface 30 and USB interface 60, and described various interface is carried out data communication or data interaction between two communication apparatus.
Described data-signal disposable plates 20 is provided with the first normal open switch group K1 and the second normal open switch group K2.
Described J-LINK interface 30 is connected with described data/address bus plug 27 by the first normal open switch group K1, and described USB interface 60 is connected with described data/address bus plug 27 by the second normal open switch group K2; Under cause the first normal open switch group K1 and the common state of the second normal open switch group K2, all in off-state, therefore can effectively prevent that static and electromagnetic interference from being entered into data/address bus plug 27 and being scurried into mainboard core board by various buttons.
Described data/address bus plug 27 is for collecting the data/address bus of J-LINK interface 30 and USB interface 60 interface of the extraneous core board that connects one to one, when J-LINK interface 30 and/or USB interface 60 are connected with external device, the normal open switch group of controlling is corresponding thereto closed.As when J-LINK interface 30 connects external device, control the first switches set K1 closed, now, J-LINK interface 30 is communicated with data/address bus plug 27.
As further improvement of the utility model, in described data-signal disposable plates 20, be also provided with sensing controler 25, the first on-off controller 21, second switch controller 22 and power Vcc 26, described the first on-off controller 21 and second switch controller 22 are connected with described sensing controler 25 respectively, and described power Vcc 26 is connected with sensing controler 25, the first on-off controller 21 and second switch controller 22 respectively.
When described sensing controler 25 detects J-LINK interface 30 access external device, transmit control signal to the first on-off controller 21, by the first on-off controller 21, control the first normal open switch group K1 closed;
When described sensing controler 25 detects USB interface 60 access external device, transmit control signal to second switch controller 22, by second switch controller 22, control the second normal open switch group K2 closed.
In above technical scheme, preferably, described on-off controller can adopt electromagnetic relay with corresponding normal open switch group, the first on-off controller 21 and second switch controller 22 are distinguished solenoids, power Vcc 26 is for giving described solenoid power supply, thereby can control adhesive and the disconnection of corresponding normal open switch group.
Further, described sensing controler 25 detects the method whether J-LINK interfaces 30 access external device: a push switch is set J-LINK interface 30 is interior, push switch is connected in series with power Vcc 26 and sensing controler 25 and forms loop, before external device does not access, push switch is off-state, when having external device to access this interface, push switch receives that extruding is closed, the conducting of formed loop, sensing controler 25 monitors the signal of telecommunication, now can judge J-LINK interface 30 access external devices, the method whether certain detection USB interface 60 accesses external device also can adopt said method.Detection method described in the present embodiment is only preferred embodiment, can also adopt the existing various known detection method mouth that achieves a butt joint whether to have the detection of extraneous communication apparatus access.
Shown in Fig. 2, further, described the first normal open switch group K1 is provided with the first normal open switch K11, the second normal open switch K12, the 3rd normal open switch K13, the 4th normal open switch K14,5 constant virtues K switch 15 and the 6th normal open switch K16, and described data-signal disposable plates 20 is provided with the first pin J1, the second pin J2, the 3rd pin J3, the 4th pin J4, the 5th pin J5 and the 6th pin J6; Described data/address bus plug 27 is provided with the first pin 1, the second pin 2, the 3rd pin 3, four-limbed 4, the 5th pin 5 and the 6th pin 6.
One end of the first normal open switch K11 is connected with the ICE/TRST pin of J-LINK interface 30 by lead-out wire, and the other end is connected on the first pin 1 of data/address bus plug 27 by the first pin J1 of data-signal disposable plates 20; One end of the second normal open switch K12 is connected with the TDI pin of J-LINK interface 30 by lead-out wire, and the other end is connected on the second pin 2 of data/address bus plug 27 by the second pin J2 of data-signal disposable plates 20; One end of the 3rd normal open switch K13 is connected with the TMS pin of J-LINK interface 30 by lead-out wire, and the other end is connected on the 3rd pin 3 of data/address bus plug 27 by the 3rd pin J3 of data-signal disposable plates 20; One end of the 4th normal open switch K14 is connected with the TCK pin of J-LINK interface 30 by lead-out wire, and the other end is connected on the four-limbed 4 of data/address bus plug 27 by the 4th pin J4 of data-signal disposable plates 20; One end of 5 constant virtues K switch 15 is connected with the ICE RTCK pin of J-LINK interface 30 by lead-out wire, and the other end is connected on the 5th pin 5 of data/address bus plug 27 by the 5th pin J5 of data-signal disposable plates 20; One end of the 6th normal open switch K16 is connected with the TDO pin of J-LINK interface 30 by lead-out wire, and the other end is connected on the 6th pin 6 of data/address bus plug 27 by the 6th pin J6 of data-signal disposable plates 20.
Further, described the second normal open switch group K2 is provided with the 7th normal open switch K21 and the 8th normal open switch K22, and described data-signal disposable plates 20 is also provided with the 13 pin U13 and the 14 pin U14; On described data/address bus plug 27, be also provided with the 13 pin 13 and the tenth four-limbed 14.
One end of the 7th normal open switch K21 is connected with the USB_DM pin of USB interface 60 by lead-out wire, and the other end is connected on the 13 pin 13 of data/address bus plug 27 by the 13 pin U13 of data-signal disposable plates 20; One end of the 8th normal open switch K22 is connected with the USB_DP pin of USB interface 60 by lead-out wire, and the other end is connected on the tenth four-limbed 14 of data/address bus plug 27 by the 14 pin U14 of data-signal disposable plates 20.
In the above scheme, preferably, the mode that one end of each normal open switch is connected with the pin of each interface by lead-out wire is: other pins are set in data-signal disposable plates 20, and this pin is connected with described one end of normal open switch, and then be connected on each data/address bus plug by lead-out wire.
In the above embodiment, described data/address bus plug 27 has the first pin 1, the second pin 2, the 3rd pin 3, four-limbed 4, the 5th pin 5, the 6th pin 6, the 13 pin 13 and the tenth four-limbed 14, described data/address bus plug 27 can be plugged on the interface of described core board by these pins, be that data/address bus corresponding with each interface on core board can extract the unified interface that forms, and corresponding one by one with the interface data bus on data/address bus plug 27, when described data/address bus plug 27 is plugged on the interface of core board, corresponding a plurality of interfaces are communicated with core board by data-signal disposable plates 20 and data/address bus plug 27.
Further, in order to protect the job security of the utility model interface hub, on described data/address bus plug 27, be also provided with grounding pin and be connected with ground.
The foregoing is only preferred embodiment of the present utility model; not in order to limit the utility model; all any modifications of doing within spirit of the present utility model and principle, be equal to and replace and improvement etc., within all should being included in protection range of the present utility model.
Claims (7)
1. an interface hub, is characterized in that: described interface hub comprises data-signal disposable plates, data/address bus plug, J-LINK interface and USB interface;
Described data-signal disposable plates is provided with when J-LINK interface being detected and be connected with external device, for controlling the first normal open switch group K1 of J-LINK interface and data/address bus plug connection and when USB interface being detected and be connected with external device, the second normal open switch group K2 being communicated with data/address bus plug for controlling USB interface;
Described J-LINK interface is connected with described data/address bus plug by the first normal open switch group K1, and described USB interface is connected with described data/address bus plug by the second normal open switch group K2;
Described data/address bus plug is for collecting the data/address bus of J-LINK interface and USB interface and connecting one to one with the interface of extraneous core board.
2. interface hub according to claim 1, it is characterized in that: in described data-signal disposable plates, be also provided with the sensing controler whether being connected with external device for detection of J-LINK interface and/or USB interface, for controlling the first on-off controller of the first normal open switch group K1 closure, for controlling second switch controller and the power Vcc of the second normal open switch group K2 closure, described the first on-off controller and second switch controller are connected with described sensing controler respectively, described power Vcc respectively with sensing controler, the first on-off controller and second switch controller are connected.
3. interface hub according to claim 2, it is characterized in that: described the first normal open switch group K1 is provided with the first normal open switch K11, the second normal open switch K12, the 3rd normal open switch K13, the 4th normal open switch K14,5 constant virtues K switch 15 and the 6th normal open switch K16, and described data-signal disposable plates is provided with the first pin J1, the second pin J2, the 3rd pin J3, the 4th pin J4, the 5th pin J5 and the 6th pin J6; Described data/address bus plug is provided with the first pin, the second pin, the 3rd pin, four-limbed, the 5th pin and the 6th pin;
One end of the first normal open switch K11 is connected with the ICE/TRST pin of J-LINK interface by lead-out wire, and the other end is connected on the first pin of data/address bus plug by the first pin J1 of data-signal disposable plates;
One end of the second normal open switch K12 is connected with the TDI pin of J-LINK interface by lead-out wire, and the other end is connected on the second pin of data/address bus plug by the second pin J2 of data-signal disposable plates;
One end of the 3rd normal open switch K13 is connected with the TMS pin of J-LINK interface by lead-out wire, and the other end is connected on the 3rd pin of data/address bus plug by the 3rd pin J3 of data-signal disposable plates;
One end of the 4th normal open switch K14 is connected with the TCK pin of J-LINK interface by lead-out wire, and the other end is connected on the four-limbed of data/address bus plug by the 4th pin J4 of data-signal disposable plates;
One end of 5 constant virtues K switch 15 is connected with the ICE RTCK pin of J-LINK interface by lead-out wire, and the other end is connected on the 5th pin of data/address bus plug by the 5th pin J5 of data-signal disposable plates;
One end of the 6th normal open switch K16 is connected with the TDO pin of J-LINK interface by lead-out wire, and the other end is connected on the 6th pin of data/address bus plug by the 6th pin J6 of data-signal disposable plates.
4. interface hub according to claim 2, is characterized in that: described the second normal open switch group K2 is provided with the 7th normal open switch K21 and the 8th normal open switch K22, and described data-signal disposable plates is also provided with the 13 pin U13 and the 14 pin U14; On described data/address bus plug, be also provided with the 13 pin and the tenth four-limbed;
One end of the 7th normal open switch K21 is connected with the USB_DM pin of USB interface by lead-out wire, and the other end is connected on the 13 pin of data/address bus plug by the 13 pin U13 of data-signal disposable plates;
One end of the 8th normal open switch K22 is connected with the USB_DP pin of USB interface by lead-out wire, and the other end is connected on the tenth four-limbed of data/address bus plug by the 14 pin U14 of data-signal disposable plates.
5. according to the interface hub described in claim 2-4 any one, it is characterized in that: described data/address bus plug is plugged on the interface of described core board, the pin on data/address bus plug is corresponding one by one with the interface data bus on core board.
6. interface hub according to claim 2, is characterized in that: described the first on-off controller and second switch controller are respectively solenoid.
7. interface hub according to claim 1, is characterized in that: on described data/address bus plug, be also provided with the grounding pin being connected with ground.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420244901.0U CN203839647U (en) | 2014-05-14 | 2014-05-14 | Interface line collecting device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420244901.0U CN203839647U (en) | 2014-05-14 | 2014-05-14 | Interface line collecting device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203839647U true CN203839647U (en) | 2014-09-17 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201420244901.0U Expired - Fee Related CN203839647U (en) | 2014-05-14 | 2014-05-14 | Interface line collecting device |
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| CN (1) | CN203839647U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107066301A (en) * | 2017-04-27 | 2017-08-18 | 北京安控科技股份有限公司 | A kind of method for down loading of embedded computer firmware program |
-
2014
- 2014-05-14 CN CN201420244901.0U patent/CN203839647U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107066301A (en) * | 2017-04-27 | 2017-08-18 | 北京安控科技股份有限公司 | A kind of method for down loading of embedded computer firmware program |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140917 Termination date: 20200514 |