CN203786498U - Diagnosable multi-type signal acquisition module - Google Patents
Diagnosable multi-type signal acquisition module Download PDFInfo
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- CN203786498U CN203786498U CN201420033197.4U CN201420033197U CN203786498U CN 203786498 U CN203786498 U CN 203786498U CN 201420033197 U CN201420033197 U CN 201420033197U CN 203786498 U CN203786498 U CN 203786498U
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Abstract
A diagnosable multi-type signal acquisition module disclosed by the utility model is characterized by comprising a power supply sub-module, a comprehensive output channel control sub-module, a signal acquisition processing sub-module, a communication monitoring sub-module and an external broken line and short circuit diagnosis sub-module, wherein a comprehensive power supply output control unit of the comprehensive output channel control sub-module is electrically connected with an output diagnosis unit, and switches to output a 24V, 0V or 12V voltage to an external part; a two-way comparison acquisition unit of the signal acquisition processing sub-module acquires the analog quantity and switching value outputted by the external part; the input end of an FPGA processing unit is electrically connected with the output ends of a crystal oscillator diagnosis unit and an output diagnosis unit, and the output end is electrically connected with the comprehensive power supply output control unit, and is also in bidirectional electric connection with the communication monitoring sub-module, the external broken line and short circuit diagnosis sub-module and the two-way comparison acquisition unit separately; the external broken line and short circuit diagnosis sub-module is electrically connected with the output end of the two-way comparison acquisition unit. The diagnosable multi-type signal acquisition module of the utility model has the advantages of multi-type signal acquisition, internal diagnosis and enhanced circuit safety.
Description
Technical field
The utility model belongs to watercraft engine room automatic technology, relates in particular to a kind of diagnosable polymorphic type signal acquisition module.
Background technology
Modern ships is developed so far, and the function of boats and ships monitoring modular has all developed into comparative maturity and comprehensive degree.For kind and the increasing sensor signal of quantity, need more acquisition channel to realize the comprehensive monitoring in boats and ships.
Conventional control signal type comprises switching value input (passive contact), controls switching value output (0-24V) and the 4-20mA sensor current signal etc. of topworks.In real ship application, the analog input card of this three types signal all needs to have spare part, and still, existing board is due to the difference of production firm, and often model is skimble-scamble.If three kinds of boards can be realized hardware unification, can save spare part quantity, reduce production costs.The hardware damage that may cause for fear of configuration error, need to have more perfect holding circuit and the acquisition module of self-diagnostic circuit than mono functional module.Therefore, the unified acquisition module of hardware of design several functions is very important for the user.
Summary of the invention
The utility model is the diagnosable polymorphic type signal acquisition module of one that provides in order to overcome the problems referred to above that prior art exists, this module externally adopts CAN bus communication, except thering is the function that can simultaneously gather polymorphic type signal, also there is built in diagnostics function, strengthen security and the diagnosticability of circuit, thereby can reduce due to model collection does not produce boats and ships self, staff and peripheral equipment and environment are damaged comprehensively.
The technical scheme that the utility model is taked is: a kind of diagnosable polymorphic type signal acquisition module, be characterized in, comprise: power supply submodule, comprehensive output channel control submodule, signal acquisition process submodule, outside broken string and short circuit diagnosis submodule and Communication Monitoring submodule; Described power supply submodule comprises an insulating power supply and a non-insulating power supply; Described insulating power supply is used for the working power of the Communication Monitoring submodule that provides described; Described non-insulating power supply is for providing the working power of other submodules; Described comprehensive output channel control submodule comprises comprehensive power supply output control unit and output diagnosis unit; The output terminal of described comprehensive power supply output control unit is electrically connected with the input end of described output diagnosis unit, and this comprehensively power output control unit switching output 24V, 0V or 12V voltage are to external devices; Described signal acquisition process submodule comprises relatively collecting unit, a FPGA processing unit and a crystal oscillator diagnosis unit of a two-way; Wherein: described two-way comparison collecting unit gathers respectively analog quantity and the switching value information of external devices output, relatively collecting unit and described two-way electrical connection of FPGA processing unit of this two-way; The output terminal of the output diagnosis unit of the output terminal of described crystal oscillator diagnosis unit and described comprehensive output channel control submodule is electrically connected with the input end of described FPGA processing unit respectively; The output terminal of described FPGA processing unit is electrically connected with the input end of the comprehensive power supply output control unit of described comprehensive output channel control submodule; Described Communication Monitoring submodule and described two-way electrical connection of FPGA processing unit; The input end of described outside broken string and short circuit diagnosis submodule is electrically connected with the output terminal that the two-way of described Information Collecting & Processing submodule compares collecting unit; This outside broken string and short circuit diagnosis submodule and with described two-way electrical connection of FPGA processing unit.
The diagnosable polymorphic type signal acquisition module of above-mentioned one, wherein, in described comprehensive output channel control submodule, described comprehensive power supply output control unit comprises: a commutation circuit, an OC output driving circuit, a pair of metal-oxide-semiconductor control circuit, a bleeder circuit; Described output diagnosis unit comprises a D/A change-over circuit, an operational amplification circuit and a comparer; Wherein: the output terminal of described commutation circuit is electrically connected with the input end of the input end of described OC output driving circuit and described two metal-oxide-semiconductor control circuits respectively; The output terminal of the output terminal of described OC output driving circuit and described two metal-oxide-semiconductor control circuits is electrically connected with the input end of described bleeder circuit respectively, and the output terminal of this bleeder circuit is electrically connected with the input end of comparer; Described bleeder circuit is also exported DC12V or DC24V voltage; The output terminal of described D/A change-over circuit is electrically connected with the input end of described operation amplifier circuit, and the output terminal of this operation amplifier circuit is electrically connected with the input end of comparer; The output terminal of described comparer is electrically connected with the input end of described FPGA processing unit.
The diagnosable polymorphic type signal acquisition module of above-mentioned one, wherein, in described comprehensive power supply output control unit, described commutation circuit is made up of two hyperchannel edge latchs, and wherein the output terminal of the hyperchannel edge latch described in is electrically connected with the input end of described OC output driving circuit; The output terminal of the hyperchannel edge latch described in another is electrically connected with the input end of described two metal-oxide-semiconductor control circuits.
The diagnosable polymorphic type signal acquisition module of above-mentioned one, wherein, in described comprehensive power supply output control unit, also comprise that one prevents the voltage protection circuit that reverse voltage impacts, described change in voltage circuit is made up of the first diode, the second diode and the 3rd diode, wherein: the first described diode is connected between the output terminal and DC12V or DC24V Voltage-output of described OC output driving circuit; Between the input end of the output terminal of the two metal-oxide-semiconductor control circuits described in the second described diode is connected to and described bleeder circuit; The 3rd described diode is connected between the output terminal and DC12V or DC24V Voltage-output of described bleeder circuit.
The diagnosable polymorphic type signal acquisition module of above-mentioned one, wherein, the described two-way comparison collecting unit in described acquisition process submodule comprises a sample circuit, two paths of signals Acquisition Circuit and a sampling A/D chip diagnostic circuit; Described sampling A/D chip diagnostic circuit comprises active crystal oscillator, output driver and counter; Described active crystal oscillator is exported respectively crystal oscillator signal to two paths of signals Acquisition Circuit and output driver, and the output terminal of described output driver is electrically connected with described counter; Described sample circuit obtains the analog quantity of sensor and the switching value of external switch, outputs to two paths of signals Acquisition Circuit; Described two paths of signals Acquisition Circuit outputs to signal respectively FPGA processing unit.
The diagnosable polymorphic type signal acquisition module of above-mentioned one, wherein, described FPGA processing unit comprises that a frequency division output subelement, a reset subelement, a serial communication subelement, a clock are processed subelement, a SPI processes subelement, clock monitoring subelement and an I/O subelement; Wherein: the input end that described frequency division output subelement and clock are processed subelement is electrically connected with the output terminal of outside crystal oscillator input block respectively; The input end of described reset subelement is electrically connected with the output terminal that described communication monitoring is processed submodule; Described serial communication subelement and described communication monitoring process that submodule is two-way to be electrically connected; Described SPI processes subelement and described two-way comparison collecting unit is two-way and is electrically connected; The input end of described clock monitoring subelement is electrically connected with described clock diagnosis; Submodule is two-way is electrically connected with described comprehensive output channel control submodule and outside broken string and short circuit diagnosis respectively for described I/O subelement.
The diagnosable polymorphic type signal acquisition module of above-mentioned one, wherein, described Communication Monitoring submodule comprises CPU, CAN telecommunication circuit, reset circuit, external RAM and ROM and crystal oscillator; Described CAN telecommunication circuit, reset circuit, external RAM and ROM and crystal oscillator are electrically connected with CPU is two-way respectively; Described CPU is also electrically connected serial communication with FPGA processing unit is two-way.
The diagnosable polymorphic type signal acquisition module of above-mentioned one, wherein, described outside broken string and short circuit diagnosis submodule comprise: a magnitude of voltage comparator circuit, controlled 0～5V voltage source; The output terminal of described 0～5V voltage source is electrically connected with the input end of described magnitude of voltage comparator circuit, and the output terminal of described two-way comparison Acquisition Circuit is electrically connected with the input end of described magnitude of voltage comparator circuit; Described magnitude of voltage comparator circuit and described two-way electrical connection of FPGA processing unit.
Because the utility model has adopted above technical scheme, the technique effect of its generation is obvious:
1, this module also has self diagnosis and outside broken string short circuit diagnostic function.Wherein self diagnosis comprises self diagnosis, collecting unit self diagnosis and outside broken string and the short circuit diagnosis of external out-put supply.Diagnostic result is all aggregated in fpga chip and stores.Strengthen security and the diagnosticability of circuit, thereby can reduce due to model collection does not produce boats and ships self, staff and peripheral equipment and environment are damaged comprehensively;
2, this module has switch acquisition, 4-20mA analog acquisition and 3 kinds of mode of operations of switching value output, can better meet the multiple types signals collecting demand of marine system, by system resource optimization;
3, depend on the electric isolation method of inside modules, can be safe and reliable module communication part and other functions electricity be isolated, reduce the electric effect of external unit to marine system, it is very important link that electricity is isolated in whole system security, can be personal security, security of system provides basic guarantee.
Brief description of the drawings
Fig. 1 is the overall electrical block diagram of a kind of diagnosable polymorphic type signal acquisition module of the utility model.
Fig. 2 is the electrical block diagram of the comprehensive power supply output control unit of a kind of diagnosable polymorphic type signal acquisition module of the utility model.
Fig. 3 is the electrical block diagram of the double-channel collection comparing unit of a kind of diagnosable polymorphic type signal acquisition module of the utility model.
Fig. 4 is the electrical block diagram of the FPGA processing unit of a kind of diagnosable polymorphic type signal acquisition module of the utility model.
Fig. 5 is the electrical block diagram of the Communication Monitoring submodule of a kind of diagnosable polymorphic type signal acquisition module of the utility model.
Fig. 6 is the outside broken string of a kind of diagnosable polymorphic type signal acquisition module of the utility model and the electrical block diagram of short circuit diagnosis submodule.
Fig. 7 is the electrical schematic diagram of a kind of embodiment of the power supply submodule of a kind of diagnosable polymorphic type signal acquisition module of the utility model.
Fig. 8 is the electrical schematic diagram of a kind of embodiment of the comprehensive output channel control submodule of a kind of diagnosable polymorphic type signal acquisition module of the utility model.
Fig. 9 is the electrical schematic diagram of a kind of embodiment of the acquisition process submodule of a kind of diagnosable polymorphic type signal acquisition module of the utility model.
Figure 10 be the sample circuit of a kind of diagnosable polymorphic type signal acquisition module of the utility model a kind of embodiment schematic diagram.
Figure 11 is the electrical schematic diagram of the outside broken string of a kind of diagnosable polymorphic type signal acquisition module of the utility model and a kind of embodiment of short circuit diagnosis submodule.
Figure 12 is the simple principle of work schematic diagram of a kind of diagnosable polymorphic type signal acquisition module of the utility model.
Embodiment
A kind of diagnosable polymorphic type signal acquisition module of the utility model, comprising: power supply submodule 1, comprehensive output channel control submodule 2, signal acquisition process submodule 3, outside broken string and short circuit diagnosis submodule 4 and Communication Monitoring submodule 5;
Described power supply submodule 1 comprises an insulating power supply 11 and a non-insulating power supply 12; Described insulating power supply is used for the working power of the Communication Monitoring submodule that provides described; Described non-insulating power supply is for providing the working power of other submodules.
Described comprehensive output channel control submodule 2 comprises comprehensive power supply output control unit 21 and output diagnosis unit 22; The output terminal of described comprehensive power supply output control unit is also electrically connected with the input end of described output diagnosis unit, this comprehensive power supply output control unit switching output 24V, 0V or 12V voltage are to external devices, described external devices for example comprises topworks 6,4-20mA sensor 7 and external switch 8, wherein: this comprehensively power output control unit output 0V or 24V power supply are to topworks, output 24V power supply, to 4-20mA sensor, is also exported 12V power supply to external switch.
Described signal acquisition process submodule 3 comprises relatively collecting unit 31, a FPGA processing unit 32 and a crystal oscillator diagnosis unit 33 of a two-way; Wherein: described two-way comparison collecting unit gathers respectively analog quantity and the switching value information of external devices output, relatively collecting unit and described two-way electrical connection of FPGA processing unit of this two-way; The output terminal of described crystal oscillator diagnosis unit is electrically connected with the input end of described FPGA processing unit, and the output terminal of this FPGA processing unit is also electrically connected with the input end of the comprehensive power supply output control unit of described comprehensive output channel control submodule.Described Communication Monitoring submodule and described two-way electrical connection of FPGA processing unit; The input end of described outside broken string and short circuit diagnosis submodule is electrically connected with the output terminal that the two-way of described Information Collecting & Processing submodule compares collecting unit; This outside broken string and short circuit diagnosis submodule and with described two-way electrical connection of FPGA processing unit.
Many signal types collection described in the utility model comprises that pass amount input gathers (passive touch point mode), analog input collection (4-20mA) and switching value output (24V output)).
Two-way in described information acquisition submodule relatively collecting unit gathers switching value or the analog quantity that external devices is inputted, and outputs to FPGA processing unit; Described FPGA processing unit according to the output voltage that judges of the information of two-way comparison collecting unit collection and the output of output diagnosis unit, whether process by the information consistent with expection, controls described comprehensive output channel control submodule and switch output voltage 24V, 12V or 0V; The situation of outside broken string and short circuit is diagnosed simultaneously; Communication Monitoring submodule and other modules that all diagnostic messages and image data are isolated by electricity are carried out exchanges data.
Refer to Fig. 2.In the comprehensive output channel control submodule of a kind of diagnosable polymorphic type signal acquisition module of the utility model, described comprehensive power supply output control unit 22 comprises: a commutation circuit 221, an OC output driving circuit 223, a pair of metal-oxide-semiconductor control circuit 224, a bleeder circuit 225; Described output diagnosis unit 21 comprises a D/A change-over circuit 211, an operational amplification circuit 212 and a comparer 213; Wherein: described commutation circuit 221 comprises two hyperchannel edge latchs 2211,2212, wherein the output terminal of the hyperchannel edge latch 2211 described in is electrically connected with the input end of described OC output driving circuit, hyperchannel edge latch described in another, 2212 output terminal is electrically connected with the input end of described two metal-oxide-semiconductor control circuits; The output terminal of the output terminal of described OC output driving circuit and described two metal-oxide-semiconductor control circuits is electrically connected with the input end of described bleeder circuit respectively, and the output terminal of this bleeder circuit is electrically connected with comparer; Described bleeder circuit is also exported DC12V or DC24V voltage; Described D/A change-over circuit to be output terminal be electrically connected with the input end of described operation amplifier circuit, the output terminal of this operation amplifier circuit is electrically connected with the input end of comparer; The output terminal of described comparer is electrically connected with the input end of described FPGA processing unit.
For preventing the recoil of power supply, in the described comprehensive power supply output control unit of a kind of diagnosable polymorphic type signal acquisition module of the utility model, also comprise that one prevents the voltage protection circuit 226 that reverse voltage impacts, described change in voltage circuit 226 is made up of the first diode 2261, the second diode 2262 and the 3rd diode 2263, wherein: the first described diode is connected between the output terminal and DC12V or DC24V Voltage-output of described OC output driving circuit; Between the input end of the output terminal of the two metal-oxide-semiconductor control circuits described in the second described diode is connected to and described bleeder circuit; The 3rd described diode is connected between described bleeder circuit and DC12V or DC24V Voltage-output.
This comprehensive output channel control submodule has output 24V, 12V or three kinds of states of output voltage (0V) not, realizes as requested output switching.Owing to having diode protection between 24V and 12V, device failure while having prevented configuration error.Can back production to any one output voltage, after dividing potential drop, compare with default reference voltage, result relatively receives judgement by FPGA, because voltage-reference is controlled, therefore can determine by changing reference source output voltage values the size of current comprehensive output channel control submodule output voltage, the output voltage range detecting, can be used to judge whether current supplying power for outside is consistent with expection.The inside self-diagnostic function that this circuit provides output to power for system.
Refer to Fig. 3.In a kind of diagnosable polymorphic type signal acquisition module of the utility model, the two-way comparison collecting unit 33 of described acquisition process submodule 3 comprises a sample circuit 331, two paths of signals Acquisition Circuit 332,333 and a sampling A/D chip diagnostic circuit 334; Described sampling A/D chip diagnostic circuit 334 comprises active crystal oscillator 3341, output driver 3342 and counter 3343.Described active crystal oscillator is exported respectively crystal oscillator signal to two paths of signals Acquisition Circuit and output driver, and the output terminal of described output driver is electrically connected with described counter; Described sample circuit obtains the analog quantity of sensor and the switching value of external switch, outputs to two paths of signals Acquisition Circuit; Described two paths of signals Acquisition Circuit outputs to signal respectively FPGA processing unit.The voltage of collection, switching value input and analog input are converted into the magnitude of voltage of suitable range by two-way comparison collecting unit, and compare after gathering twice simultaneously.
The two-way relatively crystal oscillator diagnostic circuit of collecting unit adopts house dog principle, and crystal oscillator is linked the I/O mouth of fpga chip through counter, is responsible for monitoring the duty of crystal oscillator by fpga chip.
Refer to Fig. 4, Fig. 4 is the electrical block diagram of the FPGA processing unit of a kind of diagnosable polymorphic type signal acquisition module of the utility model.In a kind of diagnosable polymorphic type signal acquisition module of the utility model, described FPGA processing unit 31 comprises that a frequency division output subelement 311, a reset subelement 312, a serial communication subelement 313, a clock are processed subelement 314, a SPI processes subelement 315, clock monitoring subelement 316 and an I/O subelement 317; Wherein:
The input end that described frequency division output subelement 311 and clock are processed subelement 314 is electrically connected with the output terminal of outside crystal oscillator input block 310 respectively;
The input end of described reset subelement 312 is electrically connected with the output terminal that described communication monitoring is processed submodule 5;
Described serial communication subelement 313 and described communication monitoring process that submodule 5 is two-way to be electrically connected;
Described SPI processes subelement 315 and described two-way comparison collecting unit 33 is two-way and is electrically connected;
The input end of described clock monitoring subelement is electrically connected with described clock diagnosis;
Submodule 4 is two-way is electrically connected with described comprehensive output channel control submodule and outside broken string and short circuit diagnosis respectively for described I/O subelement 317.
FPGA, as Acquisition Processor, communicates by letter by SPI with external signal two-way comparison collecting unit, calculates and stores after receiving outside input value.For ensureing the operation of FPGA normal reliable, FPGA module can carry crystal oscillator diagnosis and reset circuit.
Refer to Fig. 5, Fig. 5 is the electrical block diagram of the Communication Monitoring submodule of a kind of diagnosable polymorphic type signal acquisition module of the utility model.In a kind of diagnosable polymorphic type signal acquisition module of the utility model, described Communication Monitoring submodule 5 comprises CPU51, CAN telecommunication circuit 52, reset circuit 53, external RAM and ROM54 and crystal oscillator 55; Described CAN telecommunication circuit, reset circuit, external RAM and ROM and crystal oscillator are electrically connected with CPU is two-way respectively; Described CPU is electrically connected with FPGA processing unit is two-way, serial communication.This Communication Monitoring submodule is responsible for setting up inner to PERCOM peripheral communication Qiao road, by the image data of FPGA and diagnostic data is monitored and externally send.This module can also be monitored and reset the state of module FPGA separately simultaneously; This module adopts the serial bus communication of isolation to the communication of FPGA, adopt the CAN transceiver correspondence with foreign country of isolation.
Refer to Fig. 6, Fig. 6 is the electrical block diagram of the outside input diagnosis submodule of a kind of diagnosable polymorphic type signal acquisition module of the utility model.In a kind of diagnosable polymorphic type signal acquisition module of the utility model, described outside broken string and short circuit diagnosis submodule 4 comprise: a magnitude of voltage comparator circuit, controlled 0～5V voltage source; The output terminal of described 0～5V voltage source is electrically connected with the input end of described magnitude of voltage comparator circuit, the collection signal of described two-way comparison Acquisition Circuit output is electrically connected with the input end of described magnitude of voltage comparator circuit, relatively export comparative result 1 with 0V to 5V voltage source respectively, relatively export comparative result 2 with switching value input or sensor signal.The two-way comparison output signal of this magnitude of voltage comparator circuit output, to FPGA processing unit, is diagnosed outside broken string and short-circuit condition by comparer Output rusults by FPGA processing unit.
This outside input diagnosis submodule is diagnosed mainly for input signal broken string and two kinds of most common failures of short circuit.Detection that external input signal breaks and two kinds of patterns of short circuit employing are compared, a kind of pattern is that the value gathering by two autonomous channels is compared, another kind of pattern is to load comparer by circuit., increased taking comparer output valve as main judgement path from a mode for collection value judgement with respect to only, occurring at two-way comparison collecting unit can be by the state of the auxiliary FPGA processing unit judge module acquisition channel of the value of comparer abnormal in the situation that.
Refer to Fig. 7, Fig. 7 is the electrical schematic diagram of a kind of embodiment of the power supply submodule of a kind of diagnosable polymorphic type signal acquisition module of the utility model.Power supply submodule of the present utility model comprises insulating power supply circuit 61 and non-insulating power supply circuit 62.Wherein:
Insulating power supply circuit 61 is for the power supply of communication detection submodule, to improve stability and the external anti-interference of CPU of correspondence with foreign country.Such as MGFS1524S05 of U53(model in figure) be the photoelectricity isolation DC/DC of the company module of COSEL, its front end input range 9-36V, rear end stable output+5V power supply, capacitor C 85, capacitor C 88 and the capacitor C 86 of module input and output side parallel connection is that voltage stabilizing and filtering are used.Should+5V is cpu circuit and the power supply of CAN communication module.
CPU feed circuit have adopted DC/DC isolation design, have ensured the stability of main treatment circuit power supply, can receive+30% and-25% wide cut service area.This module carries over-voltage over-current protection function.
Other partial circuits adopt the DC/DC circuit of non-isolation, and conversion efficiency is high, and thermal value is low, and the electric current of maximum 2A can be provided.Input end adds 2.5A fuse, for back-end circuit provides overcurrent protection.
Non-insulating power supply circuit 62 is other circuit supplies except communication detection submodule.In figure, F1 is fuse, protection back-end circuit.D34 and D35 combine in order to suppress surge.Due to the sensor power supply of this 24V external switching value output power supply and analog input, therefore add high-power duodiode U57, prevent that reverse voltage from pouring into system 24V.Controllable voltage source chip U56 and U60 control externally output 24V(24V by FPGA and export by power supply chip LM317 conversion 12V), can realize the switching of 24V and 12V output."AND" logic gate chip U63, has increased I/O signal anti-synthetic of fpga chip, has increased reliability security.Non-isolation DC-DC chip U62 is the non-insulating power supply module that 24V is turned to 5V, and 5V is turned 3.3V by power conversion chip LM1117-3.3, is other integrated circuit power supplies except CPU part.
Refer to Fig. 8, Fig. 8 is the electrical schematic diagram of a kind of embodiment of the comprehensive output channel control submodule of a kind of diagnosable polymorphic type signal acquisition module of the utility model.Whether comprehensive output channel control submodule of the present utility model can externally provide respectively 24V and 12V, and can be normal by relatively playing current plate supplying power for outside of back production output voltage diagnosis.Comprise comprehensive power supply output control unit and output diagnosis unit.Described comprehensive power supply output control unit comprises two hyperchannel edge latchs 71,72, an OC output driving circuit 73, the two metal-oxide-semiconductor control circuits 74 of a N & P, a bleeder circuit 75; Described output diagnosis unit comprises a D/A change-over circuit 76, an operational amplification circuit 77 and a comparer 78.In figure: D edge triggered flip flop U44 and U47 are hyperchannel edge latchs, for example adopt 8 passage rising edge d type flip flops, taking 1 passage as example explanation, 3 pin of edge D flip-flop U44 and 3 pin of edge D flip-flop U47 are same I/O inputs, trigger because d type flip flop needs CLK saltus step, therefore used respectively the two-way clock signal GL_CLK1 of FPGA output and GL_CLK32 to control respectively the output of edge D flip-flop U44 and edge D flip-flop U47 here.In the time of the saltus step of clock signal GL_CLK1 rising edge, the 2 pin output states of edge D flip-flop U44 are latched in the state of current 3 pin inputs.In the time of the saltus step of clock signal GL_CLK3 rising edge, the 2 pin output states of edge D flip-flop U47 are latched in the state of current 3 pin inputs, and the output of edge D flip-flop U44 and U47 can, in the situation that using same I/O input, obtain different output like this.As the module of 16 tunnels outputs, save a large amount of I/O mouth resources, and under the state that can lose efficacy at I/O, the previous normal condition of latch, for circuit self diagnosis and reset provide reliable guarantee.It is BTS4880R that OC drives chip U12 model, the effect of this chip is to change I/O signal into 24V power supply output, the every passage of driving force reaches 500mA, externally exports 24V through diode D2, and diode D1 and D2 are used for preventing that outside abnormal voltage from pouring into circuit and causing damage.
The principle of work of output diagnosis unit is as follows, I/O signal is sent to the two metal-oxide-semiconductor U37 of N & P by the U47 of hyperchannel edge latch, be converted to 12V output by U37, through diode D18 and triode Q1 supplying power for outside 12V, diode D18 prevents that 24V from pouring into 12V, and triode Q1 is BAV90, and 12V inputs 3 pin outputs from 2 pin, same through diode D2, prevent that by diode D1 and D2 outside abnormal voltage from pouring into circuit and causing damage.The divider resistance of resistance R 113 and R136 composition, dividing potential drop ratio is 2/3, is less than 70%.Therefore the back production voltage that enters comparer in the time being output as 24V is 24V 2/3, at comparator input terminal 0.7VCC(0.7x24V=16.8V) the voltage range accepted in.Comparer negative terminal connects reference source, and this reference source by spi bus control AD5313 output voltage, then is amplified voltage (magnification ratio is the ratio of R169 and R172) through operational amplifier by FPGA, and the reference voltage of any appropriate can be provided for back production voltage.Comparer is output as the I/O signal of 5V, the comparative result of back production voltage and default reference source is sent back to the I/O input port of FPGA in the mode of logical signal.
Refer to Fig. 9 and Figure 10, Fig. 9 is the relatively electrical schematic diagram of a kind of embodiment of collecting unit of two-way of a kind of diagnosable polymorphic type signal acquisition module of the utility model, Figure 10 be sample circuit schematic diagram.In figure, Q1 is active crystal oscillator, because use to two AD acquisition chip U84 and U85, by BufferU5(MC74VHC1G50) increase driving force and be input to AD acquisition chip U84 and U85.Integrated chip U7 is counter, and the rising edge saltus step of clock is counted, and enters FPGA diagnose as the clock of two-way comparison collecting unit by No. 3 pin output.Reference source chip U6 is input to AD acquisition chip U84 and U85 provides 2.5V reference source for it; Input collection 1 is input to resistance R 387 and capacitor C 206 completes the first rank RC filtering, be input to again resistance R 386 and capacitor C 205 and complete second-order RC filtering, be input to again AD acquisition chip U84, by acquisition chip, Output rusults sent into fpga chip by SPI communication.Output collection 2 is input to resistance R 389 and capacitor C 210 completes the first rank RC filtering, be input to again resistance R 388 and capacitor C 209 and complete second-order RC filtering, be input to again AD acquisition chip U85, by acquisition chip, Output rusults sent into fpga chip by SPI communication.Collection result compares after being obtained by FPGA, when two values exceed certain limit after relatively, abandons this sampled data.
Refer to Figure 10 and Figure 11, Figure 11 is the electrical schematic diagram of the outside broken string of a kind of diagnosable polymorphic type signal acquisition module of the utility model and a kind of embodiment of short circuit diagnosis submodule.The DA pio chip U79(AD5391 being controlled by FPGA) be the Voltage-output chip of 16 passages, can change according to communication data the magnitude of voltage of each passage output, meet the demand of this module 16 passages.Taking one of them passage as example, in the time of voltage source chip U79 output 5V voltage, VOUT0 is 5V, can be obtained by circuit analysis, on the sample circuit forming in resistance R 231, resistance R 221 and resistance R 223, if outside input B end is 4-20mA electric current, triode is in opening state, comparer U69A output low level, AD sampled value is greater than 0.4V; If external short circuit, inputting B terminal voltage is 24V(sensor power supply 24V), now triode is in off-state, and comparer U69A exports high level; If outside broken string, inputs B end no signal, comparer U69A output low level, AD sampled value is 0.In the time that outside input B end is inputted for switching value, under normal circumstances, AD sampled value is not 0, and comparer U69A output low level; Broken string and short circuit need to be at the suitable resistance of outside passive touch point series connection in parallel, and in the time of broken string, AD sampled value is 0, comparer output low level; In the time of short circuit, AD sampled value is 0, and comparer U69A exports high level.
More than communicate by letter with FPGA by the isolation serial communication bus (232/485) of Communication Monitoring submodule, thereby by polymorphic type signals collecting function and communication function isolation, communication module processor, by all image data of FPGA and diagnostic data aggregation process, externally sends by isolated can bus.External and internal isolation makes the reliability of communication module higher.Communication module processor also has reset to FPGA, processes from the block configuration parameter of CAN bus and configure FPGA processor in addition.On this basis, according to user's configuration and demand, multi-signal acquisition function is mixed or single using in a module, rely on inside modules diagnosis and outside broken string, short circuit diagnosis, the safety and reliability while having ensured to use.
Refer to Figure 12, Figure 12 is the simple principle of work schematic diagram of a kind of diagnosable polymorphic type signal acquisition module of the utility model.The utility model can be according to user's request conversion module signals collecting type, and comprehensive output control unit, according to the external output voltage of user's configuration change, can be selected to export 24V, 12V or 0V, is respectively different outside actuator power supplies.Below explanation respectively: when output 24V is during as the power supply of switching value output, by a hyperchannel edge latch D edge triggered flip flop U44 is sent to control command, by D edge triggered flip flop U44 output, OC output control chip U12 is controlled the state of the outside actuator of switching controls that makes its respective channel output 24V or 0V; In the time that output 24V powers as 4-20mA sensor, external sensor is sent into 4-20mA current signal the sample circuit of module, the value that sample circuit is obtained is sent into relatively collecting unit of two-way, two-way comparison collecting unit passes through SPI communication transfer to fpga chip by the value collecting, and is processed comparative result and is calculated external sensor numerical value by fpga chip.Send control command by another hyperchannel edge latch D edge triggered flip flop U47, output is controlled output 12V or 0V to the two metal-oxide-semiconductor U37 of N & P, in the time exporting 12V as external switch power supply, switch rear end is sent back to the sample circuit of module, sampling result is sent into relatively collecting unit of two-way, two-way comparison collecting unit passes through SPI communication transfer to fpga chip by the value collecting, and is processed comparative result and is judged on off state by fpga chip.Fpga chip is crossed isolation communication modes by various information exchanges and is sent to Communication Monitoring unit, externally carries out communication by its unification.Above 12 or 24V only there to be one simultaneously, by FPGA, hyperchannel edge latch U44 and U47 are sent to control command.
This module also has self diagnosis and outside broken string short circuit diagnostic function.Wherein self diagnosis comprises self diagnosis, collecting unit self diagnosis and outside broken string and the short circuit diagnosis of external out-put supply.Diagnostic result is all aggregated in fpga chip and stores.Strengthen security and the diagnosticability of circuit, thereby can reduce due to model collection does not produce boats and ships self, staff and peripheral equipment and environment are damaged comprehensively.
Claims (8)
1. a diagnosable polymorphic type signal acquisition module, is characterized in that, comprising: power supply submodule, comprehensive output channel control submodule, signal acquisition process submodule, outside broken string and short circuit diagnosis submodule and Communication Monitoring submodule;
Described power supply submodule comprises an insulating power supply and a non-insulating power supply; Described insulating power supply is used for the working power of the Communication Monitoring submodule that provides described; Described non-insulating power supply is for providing the working power of other submodules;
Described comprehensive output channel control submodule comprises comprehensive power supply output control unit and output diagnosis unit; The output terminal of described comprehensive power supply output control unit is electrically connected with the input end of described output diagnosis unit, and this comprehensively power output control unit switching output 24V, 0V or 12V voltage are to external devices;
Described signal acquisition process submodule comprises relatively collecting unit, a FPGA processing unit and a crystal oscillator diagnosis unit of a two-way; Wherein: described two-way comparison collecting unit gathers respectively analog quantity and the switching value information of external devices output, relatively collecting unit and described two-way electrical connection of FPGA processing unit of this two-way; The output terminal of the output diagnosis unit of the output terminal of described crystal oscillator diagnosis unit and described comprehensive output channel control submodule is electrically connected with the input end of described FPGA processing unit respectively; The output terminal of described FPGA processing unit is electrically connected with the input end of the comprehensive power supply output control unit of described comprehensive output channel control submodule;
Described Communication Monitoring submodule and described two-way electrical connection of FPGA processing unit;
The input end of described outside broken string and short circuit diagnosis submodule is electrically connected with the output terminal that the two-way of described Information Collecting & Processing submodule compares collecting unit; This outside broken string and short circuit diagnosis submodule and with described two-way electrical connection of FPGA processing unit.
2. the diagnosable polymorphic type signal acquisition module of one according to claim 1, it is characterized in that, in described comprehensive output channel control submodule, described comprehensive power supply output control unit comprises: a commutation circuit, an OC output driving circuit, a pair of metal-oxide-semiconductor control circuit, a bleeder circuit; Described output diagnosis unit comprises a D/A change-over circuit, an operational amplification circuit and a comparer;
Wherein:
The output terminal of described commutation circuit is electrically connected with the input end of the input end of described OC output driving circuit and described two metal-oxide-semiconductor control circuits respectively;
The output terminal of the output terminal of described OC output driving circuit and described two metal-oxide-semiconductor control circuits is electrically connected with the input end of described bleeder circuit respectively, and the output terminal of this bleeder circuit is electrically connected with the input end of comparer; Described bleeder circuit is also exported DC12V or DC24V voltage;
The output terminal of described D/A change-over circuit is electrically connected with the input end of described operation amplifier circuit, and the output terminal of this operation amplifier circuit is electrically connected with the input end of comparer; The output terminal of described comparer is electrically connected with the input end of described FPGA processing unit.
3. the diagnosable polymorphic type signal acquisition module of one according to claim 2, it is characterized in that, in described comprehensive power supply output control unit, described commutation circuit is made up of two hyperchannel edge latchs, and wherein the output terminal of the hyperchannel edge latch described in is electrically connected with the input end of described OC output driving circuit; The output terminal of the hyperchannel edge latch described in another is electrically connected with the input end of described two metal-oxide-semiconductor control circuits.
4. the diagnosable polymorphic type signal acquisition module of one according to claim 2, it is characterized in that, in described comprehensive power supply output control unit, also comprise that one prevents the voltage protection circuit that reverse voltage impacts, described change in voltage circuit is made up of the first diode, the second diode and the 3rd diode, wherein: the first described diode is connected between the output terminal and DC12V or DC24V Voltage-output of described OC output driving circuit; Between the input end of the output terminal of the two metal-oxide-semiconductor control circuits described in the second described diode is connected to and described bleeder circuit; The 3rd described diode is connected between the output terminal and DC12V or DC24V Voltage-output of described bleeder circuit.
5. the diagnosable polymorphic type signal acquisition module of one according to claim 1, it is characterized in that, the described two-way comparison collecting unit in described acquisition process submodule comprises a sample circuit, two paths of signals Acquisition Circuit and a sampling A/D chip diagnostic circuit; Described sampling A/D chip diagnostic circuit comprises active crystal oscillator, output driver and counter; Described active crystal oscillator is exported respectively crystal oscillator signal to two paths of signals Acquisition Circuit and output driver, and the output terminal of described output driver is electrically connected with described counter; Described sample circuit obtains the analog quantity of sensor and the switching value of external switch, outputs to two paths of signals Acquisition Circuit; Described two paths of signals Acquisition Circuit outputs to signal respectively FPGA processing unit.
6. a kind of diagnosable polymorphic type signal acquisition module according to claim 1 or 5, it is characterized in that, described FPGA processing unit comprises that a frequency division output subelement, a reset subelement, a serial communication subelement, a clock are processed subelement, a SPI processes subelement, clock monitoring subelement and an I/O subelement; Wherein:
The input end that described frequency division output subelement and clock are processed subelement is electrically connected with the output terminal of outside crystal oscillator input block respectively;
The input end of described reset subelement is electrically connected with the output terminal that described communication monitoring is processed submodule;
Described serial communication subelement and described communication monitoring process that submodule is two-way to be electrically connected;
Described SPI processes subelement and described two-way comparison collecting unit is two-way and is electrically connected;
The input end of described clock monitoring subelement is electrically connected with described clock diagnosis;
Submodule is two-way is electrically connected with described comprehensive output channel control submodule and outside broken string and short circuit diagnosis respectively for described I/O subelement.
7. the diagnosable polymorphic type signal acquisition module of one according to claim 1, is characterized in that, described Communication Monitoring submodule comprises CPU, CAN telecommunication circuit, reset circuit, external RAM and ROM and crystal oscillator; Described CAN telecommunication circuit, reset circuit, external RAM and ROM and crystal oscillator are electrically connected with CPU is two-way respectively; Described CPU is also electrically connected serial communication with FPGA processing unit is two-way.
8. the diagnosable polymorphic type signal acquisition module of one according to claim 1, is characterized in that, described outside broken string and short circuit diagnosis submodule comprise: a magnitude of voltage comparator circuit, controlled 0～5V voltage source; The output terminal of described 0～5V voltage source is electrically connected with the input end of described magnitude of voltage comparator circuit, and the output terminal of described two-way comparison Acquisition Circuit is electrically connected with the input end of described magnitude of voltage comparator circuit; Described magnitude of voltage comparator circuit and described two-way electrical connection of FPGA processing unit.
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103728907A (en) * | 2014-01-20 | 2014-04-16 | 中国船舶重工集团公司第七一一研究所 | Diagnostic multi-type signal collecting module |
| CN107024258A (en) * | 2016-01-29 | 2017-08-08 | 欧姆龙株式会社 | Weighing sensor input block |
| CN110133485A (en) * | 2019-05-09 | 2019-08-16 | 中国航空工业集团公司西安航空计算技术研究所 | A kind of BIT circuit of analog quantity acquisition circuit |
| CN111190047A (en) * | 2019-10-11 | 2020-05-22 | 浙江中控技术股份有限公司 | Current acquisition diagnosis circuit and failure diagnosis method thereof |
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2014
- 2014-01-20 CN CN201420033197.4U patent/CN203786498U/en not_active Expired - Lifetime
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103728907A (en) * | 2014-01-20 | 2014-04-16 | 中国船舶重工集团公司第七一一研究所 | Diagnostic multi-type signal collecting module |
| CN103728907B (en) * | 2014-01-20 | 2017-01-25 | 中国船舶重工集团公司第七一一研究所 | Diagnostic multi-type signal collecting module |
| CN107024258A (en) * | 2016-01-29 | 2017-08-08 | 欧姆龙株式会社 | Weighing sensor input block |
| CN107024258B (en) * | 2016-01-29 | 2019-07-23 | 欧姆龙株式会社 | Weighing sensor input unit |
| US10605688B2 (en) | 2016-01-29 | 2020-03-31 | Omron Corporation | Load cell input unit |
| CN110133485A (en) * | 2019-05-09 | 2019-08-16 | 中国航空工业集团公司西安航空计算技术研究所 | A kind of BIT circuit of analog quantity acquisition circuit |
| CN110133485B (en) * | 2019-05-09 | 2022-03-15 | 中国航空工业集团公司西安航空计算技术研究所 | BIT circuit of analog quantity acquisition circuit |
| CN111190047A (en) * | 2019-10-11 | 2020-05-22 | 浙江中控技术股份有限公司 | Current acquisition diagnosis circuit and failure diagnosis method thereof |
| CN111190047B (en) * | 2019-10-11 | 2022-03-25 | 浙江中控技术股份有限公司 | Current acquisition diagnosis circuit and failure diagnosis method thereof |
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Effective date of registration: 20151112 Address after: 201108 Shanghai city Minhang District Huaning Road No. 3111 Building 1 room 629 Patentee after: SHANGHAI QIYAO HEAVY INDUSTRY CO.,LTD. Address before: 201108 Shanghai city Minhang District Huaning Road No. 3111 Patentee before: Shanghai Marine Diesel Engine Research Institute |
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