CN203773647U - Smart responder - Google Patents

Smart responder Download PDF

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Publication number
CN203773647U
CN203773647U CN201320739894.7U CN201320739894U CN203773647U CN 203773647 U CN203773647 U CN 203773647U CN 201320739894 U CN201320739894 U CN 201320739894U CN 203773647 U CN203773647 U CN 203773647U
Authority
CN
China
Prior art keywords
module
main control
control module
download
fpga
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201320739894.7U
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Chinese (zh)
Inventor
尚丽娜
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Zhejiang University City College ZUCC
Original Assignee
Zhejiang University City College ZUCC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Zhejiang University City College ZUCC filed Critical Zhejiang University City College ZUCC
Priority to CN201320739894.7U priority Critical patent/CN203773647U/en
Application granted granted Critical
Publication of CN203773647U publication Critical patent/CN203773647U/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

The utility model discloses a smart responder. The smart responder includes a main control module as well as a download module, a power source module, a clock module, a reset module, a key input module, a display module, a loudspeaker module and a storage module which are connected with the main control module respectively; the download module is connected with the main control module, so that download configuration of an FPGA can be realized; the power source module is connected with the main control module so that power source supply can be realized; the clock module is connected with the main control module, so that a reference clock can be provided for the FPGA; and the reset module is connected with the main control module, so that system reset can be realized. According to the smart responder of the utility model, the number of players of a match and countdown time can be set through buttons; initial scores of players of each group can be set, and the score of each question can be set, and score addition and subtraction can be carried out; the group number, respond reaction time and respond results of a responder can be displayed on a screen; and horn-blowing can be performed so as to warn a group in which ahead-of-time respond and time-out respond exist, and the number of the group who breaks rules is displayed on the screen.

Description

Intelligent answer
Technical field
The utility model relates to a kind of question-and-answer game apparatus, and more specifically, it relates to a kind of Intelligent answer.
Background technology
Along with scientific and technological development, development range and the application of FPGA are more and more extensive, have almost comprised all electric equipments of ours around, as palm PDA, multimedia equipment, radio communication, Medical Instruments and even Aero-Space etc.Enter the nineties in 20th century, along with development information-based, intelligent, networking, FPGA has become the common development direction of communication and consumer product at present.Practical electronic product is also the main application direction of FPGA.Along with the raising of quality of the life, various sports class competition games, various talent competition emerge in an endless stream, and intelligence question and answer are often important steps of this class match.The number that participates in question and answer may be different, and exercise question mark possibility is different, and rule may be different, and existing question-and-answer game apparatus often function is single with rule, and regulation rule degree of freedom is little, and bandwagon effect is poor.
Summary of the invention
The purpose of this utility model is to overcome deficiency of the prior art, provides a kind of and can adapt to different situations, the convenient game rule of adjusting, and supports complex rule the Intelligent answer that can conveniently show.
This Intelligent answer, comprises main control module and the download module being connected respectively with main control module, power module, clock module, reseting module, keyboard input module, display module, loudspeaker module and memory module; Download module is connected with main control module, realizes FPGA download configuration; Power module is connected with main control module and realizes power supply supply; Clock module is connected with main control module, for FPGA provides reference clock; Reseting module is connected with main control module, realizes system reset; Keyboard input module is connected with main control module; Display module is connected with main control module; Loudspeaker module is connected with main control module; Memory module is connected with main control module, and storage FPGA configurator realizes that power on after system power failure can normal operation again.
As preferably: described main control module adopts Cyclone II EP2C20FPGA chip.
As preferably: described download module is comprised of series arrangement device EPCS4, M3128, FT245 and the USB device of Altera.
As preferably: described display module connects VGA interface by 4BIT RGB circuit and forms.
As preferably: described memory module adopts S29AL032D.
The beneficial effects of the utility model are: can adapt to different situations, the convenient game rule of adjusting, support complex rule and can conveniently show.
Accompanying drawing explanation
Fig. 1 is the utility model structured flowchart;
Fig. 2 is loudspeaker module circuit theory diagrams;
Fig. 3 is display module circuit theory diagrams;
Description of reference numerals: main control module 1, download module 2, power module 3, clock module 4, reseting module 5, keyboard input module 6, display module 7, loudspeaker module 8, memory module 9
Embodiment
Below in conjunction with drawings and Examples, the utility model is described further.Although the utility model is described in connection with preferred embodiment, should know, do not represent that the utility model is limited in described embodiment.On the contrary, the utility model is by alternative, modified and the equivalent contained in the scope of the present utility model that can be included in attached claims restriction.
As shown in Figure 1 to Figure 3, this Intelligent answer, comprises main control module 1, and download module 2, power module 3, clock module 4, reseting module 5, keyboard input module 6, memory module 9 are all connected with main control module 1; Also comprise display module 7, display module 7 is connected with main control module 1; Also comprise loudspeaker module 8, loudspeaker module 8 is connected with main control module 1.Download module 2 is connected with main control module 1, realizes FPGA download configuration; Power module 3 is connected with main control module 1 and realizes power supply supply; Clock module 4 is connected with main control module 1, for FPGA provides reference clock; Reseting module 5 is connected with main control module 1, realizes system reset; Keyboard input module 6 is connected with main control module 1, realize entrant's number time of setting, race to be the first to answer a question set, initial score is set, exercise question mark is set, entrant selects answer etc.; Display module 7 is connected with main control module 1, show race to be the first to answer a question start interface, the person of racing to be the first to answer a question group number, race to be the first to answer a question the time, race to be the first to answer a question result to wrong, the group number of breaking the rules and randomly draw group number; Loudspeaker module 8 is connected with main control module 1, and the loudspeaker that ring while having foul are warned; Memory module 9 is connected with main control module 1, and storage FPGA configurator realizes that power on after system power failure can normal operation again.Described main control module 1 adopts Cyclone II EP2C20FPGA chip.Described download module 2 is comprised of series arrangement device EPCS4, M3128, FT245 and the USB device of Altera.Described display module 7 connects VGA interface by 4BIT RGB circuit and forms, can the external display arbitrarily with VGA interface, for example can adopt LG D2343P-BN.Memory module 9 can adopt S29AL032D.

Claims (5)

1. an Intelligent answer, is characterized in that: comprise main control module (1) and the download module (2) being connected respectively with main control module (1), power module (3), clock module (4), reseting module (5), keyboard input module (6), display module (7), loudspeaker module (8) and memory module (9); Download module (2) is connected with main control module (1), realizes FPGA download configuration; Power module (3) is connected with main control module (1) and realizes power supply supply; Clock module (4) is connected with main control module (1), for FPGA provides reference clock; Reseting module (5) is connected with main control module (1), realizes system reset; Keyboard input module (6) is connected with main control module (1); Display module (7) is connected with main control module (1); Loudspeaker module (8) is connected with main control module (1); Memory module (9) is connected with main control module (1), and storage FPGA configurator realizes that power on after system power failure can normal operation again.
2. Intelligent answer according to claim 1, is characterized in that: described main control module (1) adopts Cyclone IIEP2C20FPGA chip.
3. Intelligent answer according to claim 1, is characterized in that: described download module (2) is comprised of series arrangement device EPCS4, M3128, FT245 and the USB device of Altera.
4. Intelligent answer according to claim 1, is characterized in that: described display module (7) connects VGA interface by 4BIT RGB circuit and forms.
5. Intelligent answer according to claim 1, is characterized in that: described memory module (9) adopts S29AL032D.
CN201320739894.7U 2013-11-20 2013-11-20 Smart responder Expired - Fee Related CN203773647U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201320739894.7U CN203773647U (en) 2013-11-20 2013-11-20 Smart responder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201320739894.7U CN203773647U (en) 2013-11-20 2013-11-20 Smart responder

Publications (1)

Publication Number Publication Date
CN203773647U true CN203773647U (en) 2014-08-13

Family

ID=51290808

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201320739894.7U Expired - Fee Related CN203773647U (en) 2013-11-20 2013-11-20 Smart responder

Country Status (1)

Country Link
CN (1) CN203773647U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112118559A (en) * 2020-07-04 2020-12-22 中信银行股份有限公司 Method, system and device for carrying out interaction management by using intelligent interaction nameplate

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112118559A (en) * 2020-07-04 2020-12-22 中信银行股份有限公司 Method, system and device for carrying out interaction management by using intelligent interaction nameplate

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Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20140813

Termination date: 20151120

EXPY Termination of patent right or utility model