CN203759123U - Admittance tester of nonlinear network - Google Patents

Abstract

The utility model relates to an admittance tester of a nonlinear network. A system excitation end outputs a DDS signal via a DDS signal generation module, power of the DDS signal is amplified via a signal conditioning module, and the amplified signal is used as an excitation signal of the passive nonlinear port network. A current signal generated by excitation is converted by an I/U conversion module to obtain a corresponding excitation current signal, the excitation current signal is transmitted to a first effectively value detector and a shaping module, and the signal amplitude after detection is collected by a first ADC12 collection module; a voltage signal generated by excitation is transmitted to a second effective value detector, and the signal amplitude after detection is collected by a second ADC12 collection module; and thus, the admittance data of the nonlinear port network is obtained. In the operation process, an FPGA phase-difference counting module measures the phase difference of the shaped voltage signals to obtain the admittance data of the nonlinear port network, and the admittance value and angle of the passive nonlinear port network are displayed by an LCD module.

Description

A kind of nonlinear network admittance measurement instrument

Technical field

The utility model relates to a kind of network admittance tester, relates in particular to a kind of nonlinear network admittance measurement instrument.

Background technology

Scientific technological advance impels hi-tech industry to emerge rapidly, has created high commercial value and huge economic benefit, and the scientific and technological content in product is more and more higher.The scientific instrument of various discriminatings and test use are also one of condition precedents ensureing national sustainable development.At present, market or less existence be for the electronic measuring instrument of the admittance measurement of Passive Nonlinear port network, and in medical application, for the membrane capacitance of cell and the measurement of film resistance, have larger actual application prospect for the electronic measuring instrument of the admittance measurement of Passive Nonlinear port network.The admittance value of measuring in Passive Nonlinear port network all can not be out in the cold in medical science, biology, engineering every field, occupied important research status.In engineering application aspect, for admittance value, the admittance angle of a Passive Nonlinear port network of Measurement and analysis, complicated port network can be carried out to modeling, to studying complicated port network, played profound significance.In actual production and scientific research, measuring admittance value in Passive Nonlinear port network also can improving production efficiency, reduces production costs, and has promoted the flexibility of research mode, significant.But there is not yet in the market, can realize the equipment that the admittance value of Passive Nonlinear port network is measured.

Utility model content

The technical problems to be solved in the utility model is to provide and a kind ofly can realizes the nonlinear network admittance measurement instrument that the admittance value of non-linear port network and admittance angle are measured.

The technical scheme that realizes the utility model object is to provide a kind of nonlinear network admittance measurement instrument, comprises I/U conversion module, the first rms detector, an ADC12 acquisition module, MSP430 microcontroller, FPGA phase differential counting module, DDS signal generation module, signal condition module, the second rms detector, the 2nd ADC12 acquisition module, LCD MODULE, RS232 communication module, logic function control key-press module, power module and Shaping Module.

I/U conversion module is electrically connected to the first rms detector, the first rms detector is electrically connected to an ADC12 acquisition module, an ADC12 acquisition module is electrically connected to MSP430 microcontroller, the second rms detector is electrically connected to the 2nd ADC12 acquisition module, the 2nd ADC12 acquisition module is electrically connected to MSP430 microcontroller, MSP430 microcontroller is also controlled key-press module with LCD MODULE, RS232 communication module, logic function, DDS signal generation module is all electrically connected to, and DDS signal generation module is electrically connected to signal condition module.I/U conversion module is also electrically connected to Shaping Module, and Shaping Module is electrically connected to FPGA phase differential counting module.I/U conversion module is also electrically connected to MSP430 microcontroller.Above-mentioned each module is powered by power module.

Further, above-mentioned signal condition module adopts OP37 subtraction circuit and AD811 power amplification circuit.

Further, above-mentioned DDS signal generation module is the Direct Digital Frequency Synthesizers based on AD9850 design.

Further, the first above-mentioned rms detector and the second rms detector are the rms detector circuit that adopts integrated effective value detection chip AD637 design.

Further, above-mentioned FPGA phase differential counting module adopts top layer VHDL language structural design, comprises frequency division module, control signal module, counting module and data outputting module.

Further, it is to be connected with 3 control lines by 8 I/O mouth data lines that above-mentioned FPGA phase differential counting module is connected with the data communication between MSP430 microcontroller, thereby realize FPGA phase differential counting module by the mode transmission measurement data of time-sharing multiplex, be divided into 3 byte lengths.

Further, above-mentioned Shaping Module 14 is for adopting the shaping circuit of LM339 voltage comparator chip design.

Further, above-mentioned logic function control key-press module is matrix keyboard.

The utlity model has positive effect: (1) nonlinear network admittance measurement of the present utility model instrument on functional circuit, be all electronic circuit technology design, the admittance measurement of non-linear port network is had to very high sensitivity and degree of accuracy; Microcontroller has partly been selected the MSP430 series monolithic of low-power consumption, and when system update is regenerated, only needing increases hardware circuit seldom, even only revises system control program and just can realize.

(2) nonlinear network admittance measurement instrument of the present utility model has changed the mentality of designing of traditional measurement instrument, realized the low power dissipation design of admittance measurement, innovate a kind of functionalization solution that can co-ordination between low-power consumption MCU and programming in logic device FPGA, be convenient to the measurement of admittance under various complex network environments.

(3) nonlinear network admittance measurement instrument of the present utility model has the features such as function of with low cost, the more high and low power consumption of precision and automatic measurement, be convenient to realize the measurement to a Passive Nonlinear port network, aspect medical science and engineering science, there is good practical application prospect.

Accompanying drawing explanation

Fig. 1 is circuit structure block diagram of the present utility model.

Mark in above-mentioned accompanying drawing is as follows:

I/U conversion module 1, the first rms detector 2, the one ADC12 acquisition modules 3, MSP430 microcontroller 4, FPGA phase differential counting module 5, DDS signal generation module 6, signal condition module 7, the second rms detector 8, the two ADC12 acquisition modules 9, LCD MODULE 10, RS232 communication module 11, logic function is controlled key-press module 12, power module 13, Shaping Module 14.

Embodiment

(embodiment 1)

See Fig. 1, the nonlinear network admittance measurement instrument of the present embodiment comprises I/U conversion module 1, the first rms detector 2, an ADC12 acquisition module 3, MSP430 microcontroller 4, FPGA phase differential counting module 5, DDS signal generation module 6, signal condition module 7, the second rms detector 8, the 2nd ADC12 acquisition module 9, LCD MODULE 10, RS232 communication module 11, logic function control key-press module 12, power module 13 and Shaping Module 14.Wherein, I/U conversion module 1 is electrically connected to the first rms detector 2, the first rms detector 2 is electrically connected to an ADC12 acquisition module 3, the one ADC12 acquisition module 3 is electrically connected to MSP430 microcontroller 4, the second rms detector 8 is electrically connected to the 2nd ADC12 acquisition module 9, the 2nd ADC12 acquisition module 9 is electrically connected to MSP430 microcontroller 4, MSP430 microcontroller 4 also with LCD MODULE 10, RS232 communication module 11, logic function is controlled key-press module 12, DDS signal generation module 6 is all electrically connected to, DDS signal generation module 6 is electrically connected to signal condition module 7, I/U conversion module 1 is also electrically connected to Shaping Module 14, and Shaping Module 14 is electrically connected to FPGA phase differential counting module 5, I/U conversion module 1 is also electrically connected to MSP430 microcontroller 4.Described each module is powered by power module 13.

Described signal condition module 7 adopts OP37 subtraction circuit and AD811 power amplification circuit, and signal is undertaken after electric current amplification by signal condition module 7, obtains the excitation nonlinear network load of relatively high power.

Described DDS signal generation module 6 is the Direct Digital Frequency Synthesizers based on AD9850 design, has controlled digitization frequencies regulatory function, can realize frequency step, swept-frequency signal output.

The first described rms detector 2 and the second rms detector 8 are the rms detector circuit that adopts integrated effective value detection chip AD637 design, can realize sine wave, triangular wave, square-wave signal that any alternating current-direct current is mixed and carry out effective value detection, export corresponding DC level signal.By AD637 being carried out to peripheral compensating circuit design, the design of filter capacitor, realize the rms detector function of AD637.

Described Shaping Module 14 is for adopting the shaping circuit of LM339 voltage comparator chip design.

Described FPGA phase differential counting module 5 adopts top layer VHDL language structural design, comprises frequency division module, control signal module, counting module and data outputting module.It is to be connected with 3 control lines by 8 I/O mouth data lines that described FPGA phase differential counting module 5 is connected with the data communication between MSP430 microcontroller 4, thereby realize FPGA phase differential counting module 5 by the mode transmission measurement data of time-sharing multiplex, be divided into 3 byte lengths.

It is matrix keyboard that described logic function is controlled key-press module 12.

The sampling resistor of described I/U conversion module 1 controls by MSP430 microcontroller 4 selection that realizes range gear.

Described RS232 communication module 11 is for being connected with the communication test of host computer.

When the nonlinear network admittance measurement instrument of the present embodiment uses, operation logic function is controlled key-press module 12 operations, system incentive end is realized DDS signal by DDS signal generation module 6 and is exported, and carries out after power amplification, as the pumping signal of Passive Nonlinear port network through signal condition module 7.The current signal that excitation is produced obtains corresponding exciting current signal after 1 conversion of I/U conversion module, sends into respectively the first rms detector 2 and Shaping Module 14, the signal amplitude finally being gathered after detection by an ADC12 acquisition module 3; The voltage signal that excitation is produced is sent into the second rms detector 8, last by the signal amplitude after the 2nd ADC12 acquisition module 9 collection detections, thereby obtains the admittance value data of non-linear port network.In system operational process, utilize FPGA phase differential counting module 5 to measure the phase differential of voltage signal after shapings, to obtain the admittance angular data of non-linear port network, and by LCD MODULE 10, show admittance value and the admittance angle of Passive Nonlinear port networks.That the nonlinear network admittance measurement instrument of the present embodiment is measured is convenient, simple to operate, it is flexible to use, and can realize measurement and the drafting of amplitude-versus-frequency curve and the phase-frequency characteristic curve of Passive Nonlinear port network.

The key technical indexes of the nonlinear network admittance measurement instrument of the present embodiment is:

(1) analog frequency band width 0 ~ 1MHz;

(2) the highest real-time sampling rate 1Msps/12Bits;

(3) the sample buffer degree of depth: 4096 points;

(4) frequency sweep stepping bandwidth: 100Hz ~ 2MHz;

(5) ADC sample range: 0V ~ 3.3V;

(6) input impedance: >500k Ω maximum input voltage: 20Vpp;

(7) the DDS(Direct Digital that has 100Hz ~ 1MHz scope is synthesized frequently) signal generative capacity;

(8) 6 kinds of parameters such as computation and measurement admittance value, admittance angle, resistance value, angle of impedance, amplitude versus frequency characte attenuation points, phase-frequency characteristic attenuation points automatically;

(9) there is manual button calibration function, and can automatically calculate it and go out difference.

Claims (8)

1. a nonlinear network admittance measurement instrument, is characterized in that: comprise I/U conversion module (1), the first rms detector (2), an ADC12 acquisition module (3), MSP430 microcontroller (4), FPGA phase differential counting module (5), DDS signal generation module (6), signal condition module (7), the second rms detector (8), the 2nd ADC12 acquisition module (9), LCD MODULE (10), RS232 communication module (11), logic function control key-press module (12), power module (13) and Shaping Module (14);

I/U conversion module (1) is electrically connected to the first rms detector (2), the first rms detector (2) is electrically connected to an ADC12 acquisition module (3), the one ADC12 acquisition module (3) is electrically connected to MSP430 microcontroller (4), the second rms detector (8) is electrically connected to the 2nd ADC12 acquisition module (9), the 2nd ADC12 acquisition module (9) is electrically connected to MSP430 microcontroller (4), MSP430 microcontroller (4) also with LCD MODULE (10), RS232 communication module (11), logic function is controlled key-press module (12), DDS signal generation module (6) is all electrically connected to, DDS signal generation module (6) is electrically connected to signal condition module (7), I/U conversion module (1) is also electrically connected to Shaping Module (14), and Shaping Module (14) is electrically connected to FPGA phase differential counting module (5), I/U conversion module (1) is also electrically connected to MSP430 microcontroller (4), described each module is by power module (13) power supply.

2. nonlinear network admittance measurement instrument according to claim 1, is characterized in that: described signal condition module (7) adopts OP37 subtraction circuit and AD811 power amplification circuit.

3. nonlinear network admittance measurement instrument according to claim 2, is characterized in that: described DDS signal generation module (6) is the Direct Digital Frequency Synthesizers based on AD9850 design.

4. nonlinear network admittance measurement instrument according to claim 2, is characterized in that: described the first rms detector (2) and the second rms detector (8) are the rms detector circuit that adopts integrated effective value detection chip AD637 design.

5. nonlinear network admittance measurement instrument according to claim 1, it is characterized in that: described FPGA phase differential counting module (5) adopts top layer VHDL language structural design, comprises frequency division module, control signal module, counting module and data outputting module.

6. nonlinear network admittance measurement instrument according to claim 1, it is characterized in that: it is to be connected with 3 control lines by 8 I/O mouth data lines that described FPGA phase differential counting module (5) is connected with data communication between MSP430 microcontroller (4), thereby realize FPGA phase differential counting module (5) by the mode transmission measurement data of time-sharing multiplex, be divided into 3 byte lengths.

7. nonlinear network admittance measurement instrument according to claim 1, is characterized in that: described Shaping Module 14 is for adopting the shaping circuit of LM339 voltage comparator chip design.

8. nonlinear network admittance measurement instrument according to claim 1, is characterized in that: described logic function is controlled key-press module (12) for matrix keyboard.