Embodiment
Describe below with reference to accompanying drawing the broadband power line modulation-demodulation device that the utility model embodiment provides in detail.
Refer to Fig. 1, the utility model embodiment provides a kind of broadband power line modulation-demodulation device 1, the technical standard of this broadband power line modulation-demodulation device 1 based on HomePlug AV, comprising: Ethernet interface 10, ethernet controller 20, the transmitting-receiving processor 30 based on CG2211 chip, the analog front-end unit 40 based on CG2212, Linear Driving and transmission filter unit 50, coupler 60, the unit 70 that accepts filter, memory 80 and power subsystem 90.
Described Ethernet interface 10 is connected with external network (Ethernet), and the signal then described external network being produced is transferred in described ethernet controller 20.The model of Ethernet interface 10 described in the utility model embodiment is RJ-45.
Described ethernet controller 20 is connected with described Ethernet interface 10 and transmitting-receiving processor 30, for the signal conversion between external network signal and transmitting-receiving processor 30 desired signals, realizes communicating by letter between described transmitting-receiving processor 30.Thereby external network signal is input in this modulation-demodulation device, and the signal of power line transmission is outputed in described external network.Ethernet controller 20 described in the utility model embodiment is for choosing RTL8201F ethernet control chip.This RTL8201F ethernet control chip can receive by compatible 10M/100M ethernet physical layer, and supports twisted-pair feeder and optical fiber output.This RTL8201F ethernet control chip is supported two kinds of mode of operations of full and half duplex.The required clock of this ethernet controller 20 is 25MHz.
CG2211 chip and CG2212 chip that described transmitting-receiving processor 30 and analog front-end unit 40 adopt respectively Sigma company (Sigma Desingn, Inc.) to produce.
See also Fig. 2, the described transmitting-receiving processor 30 based on CG2211 chip is based on HomePlugAV 1.1 technical specifications.Should the transmitting-receiving processor based on CG2211 chip be MAC/PHY transceiver.The signal that this transmitting-receiving processor 30 can transmit described ethernet controller 20 carries out OFDM modulation demodulation (OFDM), even thereby under poor channel environment, under the interference of impulsive noise, transmission data that still can be stable, and adaptivity is good.
The described transmitting-receiving processor 30 based on CG2211 chip comprises central processing unit 301, external storage controller 302, AFE (analog front end) (AFE) interface 303, Ethernet Media Independent Interface (Media Independent Interface on control plane, MII) 304, outer bridge 305, universal input/output interface (GPIO) 306, EJTAG port 307, UART Universal Asynchronous Receiver Transmitter interface 308, serial peripheral interface (Serial Peripheral Interface, SPI) 309 and watchdog timer (Watchdog Timer) 310.
Described central processing unit 301 is a flush bonding processor, for moving with process data signal and controlling each hardware operation of this transmitting-receiving processor 30.This transmitting-receiving processor 30 comprises that two-way serial peripheral interface 309, one tunnels are connected with described analog front-end unit 40, and another road is connected with described memory 80.Described EJTAG port 307 is debugging and burning program interface.Described EJTAG port 307 completes burning and the system parameters configuration of program in memory by described Ethernet interface 10.Described ethernet controller 20 is connected by described MII interface 304 with described transmitting-receiving processor 30.Described universal input/output interface 306 can be connected with external devices or ancillary equipment, in a certain embodiment, during as input, can read by this universal input/output interface 306 the button setting of external circuit, during as output, this universal input/output interface 306 can be controlled external devices, as LED instruction etc.
On datum plane, described transmitting-receiving processor comprises convergence-level (Convergence Layer), media access control layer (MAC Layer) and physical layer (PHY Layer).In data transmission procedure (Tx), Ethernet transfer of data is carried out transmission path planning to described convergence-level, then data and relevant control information are deposited in an inner buffer, by described convergence-level, data can directly be transferred to described media access control layer, further identify, process for memory 80 or the central processing unit 301 of buffer memory.Data after identification are transferred to described analog front-end unit 40 after modulating by OFDM.
Adopt this transmitting-receiving processor 30 based on CG2211 chip can effectively reduce original and power line 91 communication integrates of the one-tenth of system.Should adopt the frequency division multiplexing modulation /demodulation with senior forward error correction (FEC), channel estimating and adaptive ability in described physical layer by the transmitting-receiving processor 30 based on CG2211 chip.Should adopt the TDMA time division multiple access with service quality (QoS) guarantee to access in order and have the CSMA/CA two schemes of fast automatic repetitive requests at media access layer by the transmitting-receiving processor 30 based on CG2211 chip simultaneously, thereby can on power line 91 media, transmit reliably packet.
Described analog front-end unit 40 adopts the CG2212 chip of Sigma company design.Should be connected by described SPI interface 309 with the described analog front-end unit 40 based on CG2212 chip by the transmitting-receiving processor 30 based on CG2211 chip.The described transmitting-receiving processor 30 based on CG2211 chip and the common complete modulator-demodulator that forms of the described analog front-end unit 40 based on CG2212 chip.
Described analog front-end unit 40 is controlled for the conversion, processing and the gain to signal that realize between digital signal and analog signal.This analog front-end unit 40 comprises transmitting element and receiving element.Described transmitting element comprises interpolation filter (Interpolation Filter), digital to analog converter (DAC) and programmable-gain line drive.Described receiving element comprises programmable gain amplifier, low pass filter, analog to digital converter and sampling filter.The speed of the transceiving data of this analog front-end unit 40 can reach 75MSPS.Isolation between described transmitting element and receiving element is better, can work alone thereby be somebody's turn to do between each functional unit in the analog front-end unit 40 based on CG2212, thereby make effectively to reduce the power consumption of this analog front-end unit 40, and can make this analog front-end unit 40 based on CG2212 chip can be operated under semiduplex mode.
The described analog front-end unit 40 based on CG2212 chip further comprises that the digital PLL circuit (Digital locked Loop, DLL) that is integrated on this CG2212 chip and crystal oscillator provide required clock signal for described transmitting-receiving processor 30 and analog front-end unit 40.
See also Fig. 3, the utility model embodiment, by adopting two kinds of deep sleep mode, can make the power consumption of this broadband power line modulation-demodulation device 1 effectively reduce.One is: described digital PLL circuit continues in operation, the master clock that analog front-end unit 40 based on CG2212 chip simultaneously described in setting is inputted for described transmitting-receiving processor 30 is 150MHz, now, the current drain of this broadband power line modulation-demodulation device 1 is 20mA.Another kind is: described digital PLL circuit quits work, and the master clock that this analog front-end unit 40 based on CG2212 chip is inputted for described transmitting-receiving processor 30 is 37.5MHz, and now, the current drain of this broadband power line modulation-demodulation device 1 is down to 9mA.
Described Linear Driving and transmission filter unit 50 comprise Linear Driving amplifier and transmitting filter.Described transmitting filter is used for the interference signal (as carrier signal) of the analog signal that described analog front-end unit 40 is exported and removes.Described Linear Driving amplifier can further carry out power amplification to this filtered signal, to improve the driving force of transmitting filter.
Please further consult Fig. 4, described coupler 60 for by this broadband power line modulation-demodulation device 1 from the signal coupling of Ethernet transmission to power line 91, and coupling from the signal of power line 91 transmission in Ethernet.This coupler 60 can make to isolate from the signal of Ethernet transmission and the signal receiving from power line 91, and two-way signal can independently be transmitted.
Described coupler 60 is realized by a transformer T who comprises many windings.Preferably, the operating frequency range of this transformer can be 1MHz to 30MHz.In the utility model embodiment, described transformer T comprises four windings.Two former limit winding A and B, two secondary winding C and D.The two ends of described secondary winding C are respectively termination 1 and termination 2.The two ends of described secondary winding D are respectively termination 3 and 4.The two ends of described former limit winding A are respectively termination 5 and termination 6.The two ends of described former limit winding B are respectively termination 7 and 8.Described former limit winding A and B are in series connection, and particularly, the termination 6 of described former limit winding A is connected with the termination 7 of described former limit winding B.The termination 5 of described former limit winding A is connected with the live wire LINE of described power line 91, and the termination 8 of described former limit winding B is connected with the zero line NEUTRAL of described power line 91.Described secondary winding C and described secondary winding D isolate mutually.Described secondary winding C receives the signal transmitting from described power line 91 to described analog front-end unit 40.Described secondary winding D is transferred to the signal of Ethernet input on described power line 91.In the utility model embodiment, the number of turn of four windings of this transformer T is identical.
Further, between described former limit winding A and B, comprise a centre tap LN_CMN.This centre tap LN_CMN can need ground connection or do other use according to what use.
This coupler 60 further comprises that a signal attenuation circuit U1 is connected between the former limit winding of described live wire and transformer T.This signal attenuation circuit U1 controls the size of signal.Particularly, one end of this signal attenuation circuit U1 is connected with described live wire, and the other end is connected with the termination 5 of described former limit winding A.This signal attenuation circuit U1 adopts a RC circuit to realize.Particularly, described signal attenuation circuit U1 comprises resistance R 62, resistance R 64 and capacitor C 21.One end of described resistance R 62 is connected with one end of capacitor C 21 and is connected to described live wire.The other end of described resistance R 62 and one end of resistance R 64 are connected and are connected to the other end of described capacitor C 21.The other end while of this capacitor C 21 is connected with the termination 5 of the former limit winding A of described transformer T.
This coupler 60 further comprises that a zero cross detection circuit is connected in series between the live wire LINE and zero line NEUTRAL of described power line 91.This zero cross detection circuit can adopt photocoupler U2 to realize.Described zero cross detection circuit further comprises a cement resistor R5 and rectifier diode D9, described cement resistor R5, rectifier diode D9 series connection and photocoupler U2 series connection.Described cement resistor R5 is for the power of further limiting AC electricity, and described rectifier diode is for detection of the positive half cycle waveform of alternating current.This zero cross detection circuit is input in the described transmitting-receiving processor 30 based on CG2211 chip by the output LINE_ZC of this photocoupler U2, this output LINE_ZC can further connect one end of a biasing resistor R11, the operating voltage of another termination 3.3V of this biasing resistor R11.
The described unit 70 that accepts filter is for the carrier signal filtering of signal that power line 91 is sent, so that useful signal is input in described analog front-end unit 40.The unit 70 that accepts filter described in the utility model embodiment adopts band pass filter to realize.
Described memory 80 is for storing program code and the working procedure of described processor.This memory 80 comprises flash memory (SPI Flash) 802 and synchronous DRAM (SDRAM) 804.This flash memory 802 and synchronous DRAM 804 are controlled by described external storage controller 302.Described flash memory 802 is connected on described transmitting-receiving processor 30 by described SPI interface.The program of burning and system parameters configuration are all stored in described flash memory 802.In the utility model embodiment, the capacity of described flash memory 802 is 16Mbit, inside saves as 16MB.
Described power subsystem 90 provides power supply for the various piece of this broadband power line modulation-demodulation device 1.Described power subsystem 90 adopts DC/DC circuit.This power subsystem 90 provides this broadband power line modulation-demodulation device 1 required two-way power supply signal.One tunnel is 12 volts, and a road is 3.3 volts.Further, this power subsystem 90 also can be described transmitting-receiving processor 30 a road voltage is provided is low pressure difference linearity voltage stabilizing (LDO) signal of 1.05 volts.This power subsystem 90 further comprises that filter circuit disturbs for filtering noise, inhibition.This power subsystem 90 can provide multichannel separate power supply signal, thereby can dynamically control each module in this broadband power line modulation-demodulation device 1, has realized reasonably lower power consumption.
This broadband power line modulation-demodulation device 1 further comprises that an instruction interface unit 92 is for showing the operating state of this modulation-demodulation device 1.Preferably, this instruction interface unit 92 can be indicated at least one in following functions: as: the operating state of connection/operation instruction, connect/operation of Ethernet instruction, the instruction of signal transmission collision, connection status instruction, network state instruction, chip CG2211 and the CG2212 of power line 91 shows.Described in the utility model embodiment, indicate interface unit 92 to adopt LED to indicate to realize.
The course of work of this broadband power line modulation-demodulation device 1 is as follows: the signal that Ethernet sends is transferred in described ethernet controller 20 by described Ethernet interface 10, and is converted into MII signal through MII interface 304 and enters in described transmitting-receiving processor 30.MII signal is modulated to orthogonal frequency-division multiplex singal by transmitting-receiving processor 30.And then carry out digital-to-analogue conversion through analog front-end unit 40 and convert analog signal to, then this analog signal by Linear Driving and send filter unit 50, coupler 60 is coupled to transmission on described power line 91.Conversely, receive the orthogonal frequency-division multiplex singal of coming from power line 91 and convert digital data transmission in described transmitting-receiving processor 30 via the analog to digital converter coupler 60 and analog front-end unit 40, transmitting-receiving processor 30 carries out corresponding demodulation process to this digital signal and is transferred to described ethernet controller 20, and ethernet controller 20 further transforms and transfers out by described Ethernet interface 10 this signal.
In practical application, only need to adopt at least two above-mentioned broadband power line modulation-demodulation devices 1 just can form a complete transmission network.Particularly, one of them can be connected with the router of access band (switch) as master network device and is then input in another one broadband power line modulation-demodulation device by power line, in other words, this another one broadband power line modulation-demodulation device only need access supply socket, forms network node.Then be connected with end user device (computer etc.) by this another one broadband power line modulation-demodulation device with netting twine, can form complete Internet Transmission.
The utility model embodiment is by adopting the transmitting-receiving processor based on CG2211 chip and the analog front-end unit based on CG2212 chip to form described broadband power line modulation-demodulation device, this broadband power line modulation-demodulation device has stable and safe transmission performance, there is higher antijamming capability, and broadband power line modulation-demodulation device can be heightened the speed of transfer of data significantly.In addition,, by the cooperation of this transmitting-receiving processor based on CG2211 chip and the analog front-end unit based on CG2212 chip, effectively reduced the power consumption of this broadband power line modulation-demodulation device.
In addition, those skilled in the art can also do other and change in the utility model spirit, and certainly, the variation that these do according to the utility model spirit, within all should being included in the utility model scope required for protection.