CN203746047U - Ink layer wire jumper structure of capacitive screen - Google Patents
Ink layer wire jumper structure of capacitive screen Download PDFInfo
- Publication number
- CN203746047U CN203746047U CN201420049684.XU CN201420049684U CN203746047U CN 203746047 U CN203746047 U CN 203746047U CN 201420049684 U CN201420049684 U CN 201420049684U CN 203746047 U CN203746047 U CN 203746047U
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- ink layer
- layer
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- rete
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Abstract
The utility model relates to an ink layer wire jumper structure of a capacitive screen. The ink layer wire jumper structure of the capacitive screen comprises a glass base material layer, an ITO film layer, an insulation ink layer, a through connecting unit and a circuit layer. The ITO film layer is arranged on the top face of the glass base material layer, the ITO film layer is provided with a film layer top face, and the insulation ink layer is arranged on the film layer top face. The circuit layer is laid on the top face of the insulation ink layer, and the through connecting unit is arranged in the insulation ink layer in a penetrating mode. The top of the through connecting unit is connected with the circuit layer, and the bottom of the through connecting unit is connected with the ITO film layer. A protective ink layer is further laid on the circuit layer.
Description
Technical field
The utility model relates to a kind of jumper wire construction, refers to especially a kind of jumper wire construction being applied in capacitance plate.
Background technology
As everyone knows, existing single-layer metal wire jumper single-glass multiple spot is identified the structure of ultrathin capacitance plate device, mainly comprise glass baseplate, frame ink, ITO pattern, metal jumper point, frame cabling, but the structure that traditional metal jumper single-glass multiple spot is identified ultrathin capacitance plate device concrete manufacture and batch production in also existing many shortcomings.Wherein, shortcoming one is complex process, needs 5 photoetching; Shortcoming two is used apparatus expensive; Shortcoming three is the irregular glass surface with ink for ITO sputters at, and easily occur walking the situation of thread breakage, and this is the major defect for conventional art.
Utility model content
The utility model provides a kind of ink layer jumper wire construction of capacitance plate, and it,, by reaching reduction production difficulty to the improvement of jumper wire construction, is enhanced productivity, the effect of Improving The Quality of Products, and this is to be fundamental purpose of the present utility model.
Technical solution adopted in the utility model is: a kind of ink layer jumper wire construction of capacitance plate, it comprises glass baseplate layer, ITO rete, dielectric ink layer, runs through linkage unit and circuit layer, wherein, this ITO rete is arranged on the end face of this glass baseplate layer.
This ITO rete refers to method sputter transparent indium tin oxide (ITO) the conductive film coating go out the product that ITO pattern obtains through gold-tinted etching or laser engraving on tempered glass material that adopts magnetron sputtering.The thickness of ITO rete is different, and the electric conductivity of film and light transmission are also different.In general, in the situation that the identical process conditions glass substrate material identical with performance, ITO rete is thicker, and the surface resistance of ITO film is less, and light transmission rate is also accordingly less.
This ITO rete has rete end face; this dielectric ink layer is arranged on this rete end face; in concrete enforcement; this dielectric ink layer ring is located at the surrounding position on this rete end face; this circuit layer is laid on the end face of this dielectric ink layer, and this runs through linkage unit and runs through and be arranged in this dielectric ink layer, and this top of running through linkage unit is connected with this circuit layer; this bottom of running through linkage unit is connected with this ITO rete, is also equipped with protection ink layer on this circuit layer.
This runs through linkage unit and comprises some linkage units, some these linkage unit spread configurations are in this dielectric ink layer, each this linkage unit comprises some joint pins, in this dielectric ink layer, offer some mounting holes, this joint pin corresponding inserted is in this mounting hole, the quantity of this joint pin is consistent with the quantity of this mounting hole, the top of each this joint pin is connected with this circuit layer, the bottom of each this joint pin is connected with this ITO rete, by this joint pin, makes this circuit layer and this ITO rete keep stable electrical connection.
This circuit layer comprises some wires, some this wire is parallel to each other, and common ring is located on the end face of this dielectric ink layer, the end face of some these joint pins in each this linkage unit is connected with this wire through this linkage unit, in concrete enforcement, this wire is made by argent.
On the end face of this dielectric ink layer, a side is converged and is formed a bonding pad by the end of some these wires, and FPC winding displacement is electrically connected to this bonding pad, can complete the electrical connection of foreign current and this circuit layer by this FPC winding displacement.
In concrete enforcement, the xsect of this wire is rectangle, the xsect of this joint pin is also rectangle, structural design by rectangular cross section can conveniently be produced and connect, the stepped distribution of some these joint pins in each this linkage unit, thereby the effect of the contact of avoiding making a mistake between this joint pin.
The beneficial effects of the utility model are: the utility model is by adjusting the stack layer aggregated(particle) structure of ITO and dielectric ink, adopt the mode of printing wire jumper point that ITO is communicated with the silver slurry cabling on upper strata simultaneously, solve classic method and made upper complex process, problem that apparatus expensive cost is high, in addition, by the wire jumper point of silk-screen silver slurry line and silk-screen, frame at capacitance plate module carries out wire jumper, complete the connection of whole product circuit, avoided doing in the visible area of capacitance plate the complicated technology of bridging point, simplify technological process, improved acceptance rate and efficiency.
Accompanying drawing explanation
Fig. 1 is stereo decomposing structural representation of the present utility model.
Fig. 2 is decomposition texture schematic diagram of the present utility model.
Fig. 3 is part-structure stereo decomposing structural representation of the present utility model.
Embodiment
As shown in Figures 1 to 3, a kind of ink layer jumper wire construction of capacitance plate, it comprises glass baseplate layer 10, ITO rete 20, dielectric ink layer 30, runs through linkage unit 40 and circuit layer 50, and wherein, this ITO rete 20 is arranged on the end face of this glass baseplate layer 10.
This ITO rete 20 refers to method sputter transparent indium tin oxide (ITO) the conductive film coating go out the product that ITO pattern obtains through gold-tinted etching or laser engraving on tempered glass material that adopts magnetron sputtering.The thickness of ITO rete is different, and the electric conductivity of film and light transmission are also different.In general, in the situation that the identical process conditions glass substrate material identical with performance, ITO rete is thicker, and the surface resistance of ITO film is less, and light transmission rate is also accordingly less.
This ITO rete 20 has rete end face 21, and this dielectric ink layer 30 is arranged on this rete end face 21.
In concrete enforcement, these dielectric ink layer 30 rings are located at the surrounding position on this rete end face 21.
This circuit layer 50 is laid on the end face of this dielectric ink layer 30; this runs through linkage unit 40 and runs through and be arranged in this dielectric ink layer 30; this top of running through linkage unit 40 is connected with this circuit layer 50; this bottom of running through linkage unit 40 is connected with this ITO rete 20, is also equipped with protection ink layer 60 on this circuit layer 50.
This runs through linkage unit 40 and comprises some linkage units 41, and some these linkage unit 41 spread configurations are in this dielectric ink layer 30.
Each this linkage unit 41 comprises some joint pins 42, offers some mounting holes 31 in this dielectric ink layer 30, and these joint pin 42 corresponding inserted are in this mounting hole 31, and the quantity of this joint pin 42 is consistent with the quantity of this mounting hole 31.
The top of each this joint pin 42 is connected with this circuit layer 50, and the bottom of each this joint pin 42 is connected with this ITO rete 20, by this joint pin 42, makes this circuit layer 50 and this ITO rete 20 keep stable electrical connection.
This circuit layer 50 comprises some wires 51, and some these wires 51 are parallel to each other, and common ring is located on the end face of this dielectric ink layer 30.
The end face of some these joint pins 42 in each this linkage unit 41 is connected with this wire 51 through this linkage unit 41, and in concrete enforcement, this wire 51 is made by argent.
On the end face of this dielectric ink layer 30, a side is converged and is formed a bonding pad 70 by the end of some these wires 51, and FPC winding displacement is electrically connected to this bonding pad 70, can complete the electrical connection of foreign current and this circuit layer 50 by this FPC winding displacement.
In concrete enforcement, the xsect of this wire 51 is rectangle, and the xsect of this joint pin 42 is also rectangle, by the structural design of rectangular cross section, can conveniently be produced and connect.
The stepped distribution of some this joint pins 42 in each this linkage unit 41, thereby the effect of the contact of avoiding making a mistake between this joint pin 42.
Claims (5)
1. the ink layer jumper wire construction of a capacitance plate, it is characterized in that: comprise glass baseplate layer, ITO rete, dielectric ink layer, run through linkage unit and circuit layer, wherein, this ITO rete is arranged on the end face of this glass baseplate layer, this ITO rete has rete end face, this dielectric ink layer is arranged on this rete end face, this circuit layer is laid on the end face of this dielectric ink layer, this runs through linkage unit and runs through and be arranged in this dielectric ink layer, this top of running through linkage unit is connected with this circuit layer, this bottom of running through linkage unit is connected with this ITO rete, on this circuit layer, be also equipped with protection ink layer,
This runs through linkage unit and comprises some linkage units, some these linkage unit spread configurations are in this dielectric ink layer, each this linkage unit comprises some joint pins, in this dielectric ink layer, offer some mounting holes, this joint pin corresponding inserted is in this mounting hole, the quantity of this joint pin is consistent with the quantity of this mounting hole, the top of each this joint pin is connected with this circuit layer, the bottom of each this joint pin is connected with this ITO rete, by this joint pin, make this circuit layer and this ITO rete keep electrical connection
This circuit layer comprises some wires, some this wire is parallel to each other, and common ring is located on the end face of this dielectric ink layer, the end face of some these joint pins in each this linkage unit is connected with this wire through this linkage unit, on the end face of this dielectric ink layer, a side is converged and is formed a bonding pad by the end of some these wires, and FPC winding displacement is electrically connected to this bonding pad.
2. the ink layer jumper wire construction of a kind of capacitance plate as claimed in claim 1, is characterized in that: this dielectric ink layer ring is located at the surrounding position on this rete end face.
3. the ink layer jumper wire construction of a kind of capacitance plate as claimed in claim 1, is characterized in that: this wire is made by argent.
4. the ink layer jumper wire construction of a kind of capacitance plate as claimed in claim 1, is characterized in that: the xsect of this wire is rectangle, and the xsect of this joint pin is also rectangle.
5. the ink layer jumper wire construction of a kind of capacitance plate as claimed in claim 1, is characterized in that: the stepped distribution of some these joint pins in each this linkage unit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201420049684.XU CN203746047U (en) | 2014-01-26 | 2014-01-26 | Ink layer wire jumper structure of capacitive screen |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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CN201420049684.XU CN203746047U (en) | 2014-01-26 | 2014-01-26 | Ink layer wire jumper structure of capacitive screen |
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CN203746047U true CN203746047U (en) | 2014-07-30 |
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CN201420049684.XU Expired - Fee Related CN203746047U (en) | 2014-01-26 | 2014-01-26 | Ink layer wire jumper structure of capacitive screen |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN115020391A (en) * | 2022-06-08 | 2022-09-06 | 东莞塘厦裕华电路板有限公司 | Novel MiniLED backlight circuit board structure and manufacturing method thereof |
-
2014
- 2014-01-26 CN CN201420049684.XU patent/CN203746047U/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN115020391A (en) * | 2022-06-08 | 2022-09-06 | 东莞塘厦裕华电路板有限公司 | Novel MiniLED backlight circuit board structure and manufacturing method thereof |
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Date | Code | Title | Description |
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C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140730 Termination date: 20160126 |
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EXPY | Termination of patent right or utility model |