CN203689516U - High-reliability processing device with multiple purposes and multiple CPUs (central processing unit) of mine hoist - Google Patents
High-reliability processing device with multiple purposes and multiple CPUs (central processing unit) of mine hoist Download PDFInfo
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- CN203689516U CN203689516U CN201320677035.XU CN201320677035U CN203689516U CN 203689516 U CN203689516 U CN 203689516U CN 201320677035 U CN201320677035 U CN 201320677035U CN 203689516 U CN203689516 U CN 203689516U
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Abstract
The utility model provides a high-reliability processing device with multiple purposes and multiple CPUs (central processing unit) of a mine hoist. The processing device comprises a CPU processor (U1), a CPU processor (U2), a CPU processor (U3), a CPU processor (U4), a CPU processor (U5), and a CPU processor (U6) through a bus. The processing device adopts the multiple CPUs to process multi-objective tasks of the mine hoist; the reliability is improved by using a mode of mixing a double-circuit power and a serial-parallel bus; the processing device has the advantages of being convenient to use, and stronger in reliability.
Description
Technical field
The utility model relates to a kind of many CPU treating apparatus, the treating apparatus that particularly a kind of multiple power supplies for the many CPU of mine hoist multiple goal, serial parallel bus are mixed.
Background technology
Mine hoist is reciprocating machinery between two fixed points, and its load is potential load.Its special process requires to have determined that mine hoist must can meet four quadrant running, has higher adjusting speed accuracy and Stroke Control ability, and have certain overload capacity.Due to the special operation place of hoister, wherein a part of hoister also will be served as the task of personnel's transport in addition, therefore requires very high to the safety and reliability of system.
The existing Mine Hoist Control System device of China adopts external control system substantially, and these control system adopt power the guarantee system operation of single uninterrupted power source; Between many CPU, adopt single parallel bus.
Utility model content
The problem existing in order to solve above-mentioned prior art, the utility model provides many CPU of hoister multiple goal treating apparatus that a kind of reliability is strong.
Many CPU of the mine hoist multiple goal high reliability treating apparatus providing according to the utility model, comprises bus, CPU processor U1, CPU processor U2, CPU processor U3, CPU processor U4, CPU processor U5, CPU processor U6;
Described CPU processor U1, CPU processor U2, CPU processor U3, CPU processor U4, CPU processor U5, CPU processor U6 are connected by bus;
Parallel processing circuit in CPU processor U1, CPU processor U3, CPU processor U4, CPU processor U5 and CPU processor U6 and serial processing circuit adopt respectively power supply A, power supply B power supply, between parallel processing circuit and serial processing circuit, adopt isolated location to carry out electrical isolation; CPU processor U2 adopts independent power supply.
Compared with prior art, the utlity model has following beneficial effect:
This device adopts many CPU to process the multiple goal task of mine hoists, improves reliability by the mode of double loop power supply, the mixing of serial parallel bus.Compared with existing system, have advantages of easy to operate, reliability is stronger.
Brief description of the drawings
By reading the detailed description of non-limiting example being done with reference to the following drawings, it is more obvious that other features, objects and advantages of the present utility model will become:
Fig. 1 is bus connection layout of the present utility model;
Fig. 2 is power supply connection layout of the present utility model.
Embodiment
Below in conjunction with specific embodiment, the utility model is elaborated.Following examples will contribute to those skilled in the art further to understand the utility model, but not limit in any form the utility model.It should be pointed out that to those skilled in the art, without departing from the concept of the premise utility, can also make some distortion and improvement.These all belong to protection domain of the present utility model.
Shown in Fig. 1, main circuit of the present utility model will be by CPU processor U1, CPU processor U2, CPU processor U3, CPU processor U4, CPU processor U5, CPU processor U6.
CPU processor U1 is connected on parallel bus by parallel interface; CPU processor U1 is connected on universal serial bus by serial line interface.
CPU processor U2 is connected on universal serial bus by serial line interface.
CPU processor U3 is connected on parallel bus by parallel interface; CPU processor U3 is connected on universal serial bus by serial line interface.
CPU processor U4 is connected on parallel bus by parallel interface; CPU processor U4 is connected on universal serial bus by serial line interface.
CPU processor U5 is connected on parallel bus by parallel interface; CPU5 processes U5 and is connected on universal serial bus by serial line interface.
CPU processor U6 is connected on parallel bus by parallel interface; CPU6 processes U6 and is connected on universal serial bus by serial line interface.
CPU processor U1, CPU processor U3, CPU processor U4, CPU processor U5 and CPU processor U6 adopt power supply connected mode as shown in Figure 2, parallel processing circuit adopts power supply A power supply, serial processing circuit adopts power supply B power supply, between parallel processing circuit and serial processing circuit, adopts isolated location to carry out electrical isolation.
CPU processor U2 adopts independent power supply.
Above specific embodiment of the utility model is described.It will be appreciated that, the utility model is not limited to above-mentioned specific implementations, and those skilled in the art can make various distortion or amendment within the scope of the claims, and this does not affect flesh and blood of the present utility model.
Claims (2)
1. many CPU of mine hoist multiple goal high reliability treating apparatus, is characterized in that, comprises bus, CPU processor U1, CPU processor U2, CPU processor U3, CPU processor U4, CPU processor U5, CPU processor U6;
Described CPU processor U1, CPU processor U2, CPU processor U3, CPU processor U4, CPU processor U5, CPU processor U6 are connected by bus;
Parallel processing circuit in CPU processor U1, CPU processor U3, CPU processor U4, CPU processor U5 and CPU processor U6 and serial processing circuit adopt respectively power supply A, power supply B power supply; CPU processor U2 adopts independent power supply;
Bus comprises parallel bus and universal serial bus;
CPU processor U1 is connected on parallel bus by parallel interface;
CPU processor U1 is connected on universal serial bus by serial line interface;
CPU processor U2 is connected on universal serial bus by serial line interface;
CPU processor U3 is connected on parallel bus by parallel interface;
CPU processor U3 is connected on universal serial bus by serial line interface;
CPU processor U4 is connected on parallel bus by parallel interface;
CPU processor U4 is connected on universal serial bus by serial line interface;
CPU processor U5 is connected on parallel bus by parallel interface;
CPU5 processes U5 and is connected on universal serial bus by serial line interface;
CPU processor U6 is connected on parallel bus by parallel interface;
CPU6 processes U6 and is connected on universal serial bus by serial line interface.
2. many CPU of mine hoist multiple goal high reliability treating apparatus according to claim 1, is characterized in that, between parallel processing circuit and serial processing circuit, adopts isolated location to carry out electrical isolation.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320677035.XU CN203689516U (en) | 2013-10-30 | 2013-10-30 | High-reliability processing device with multiple purposes and multiple CPUs (central processing unit) of mine hoist |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320677035.XU CN203689516U (en) | 2013-10-30 | 2013-10-30 | High-reliability processing device with multiple purposes and multiple CPUs (central processing unit) of mine hoist |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203689516U true CN203689516U (en) | 2014-07-02 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201320677035.XU Expired - Fee Related CN203689516U (en) | 2013-10-30 | 2013-10-30 | High-reliability processing device with multiple purposes and multiple CPUs (central processing unit) of mine hoist |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203689516U (en) |
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2013
- 2013-10-30 CN CN201320677035.XU patent/CN203689516U/en not_active Expired - Fee Related
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140702 Termination date: 20171030 |