CN203661079U - 485 signal line reverse connection automatic recognition correction circuit - Google Patents
485 signal line reverse connection automatic recognition correction circuit Download PDFInfo
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- CN203661079U CN203661079U CN201320882538.0U CN201320882538U CN203661079U CN 203661079 U CN203661079 U CN 203661079U CN 201320882538 U CN201320882538 U CN 201320882538U CN 203661079 U CN203661079 U CN 203661079U
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Abstract
The utility model belongs to the 485 communication circuit technical field and relates to a 485 signal line reverse connection automatic recognition correction circuit. The 485 signal line reverse connection automatic recognition correction circuit includes an electronic switching circuit, a signal conversion circuit and a CPU; the input end of the electronic switching circuit is a 485 signal input end; the output end of the electronic switching circuit is connected with the input end of the signal conversion circuit; the output end of the signal conversion circuit is connected with an I/0 port P3.0 of the CPU; and a control port POO_485 _SW of the CPU is connected with a logic control end of the electronic switching circuit. At first, RS485 differential signals are converted into TTL RS232 serial data through the signal conversion circuit, so that the single-chip microcomputer CPU can recognize the TTL RS232 serial data; and if the single-chip microcomputer CPU judges that a current 485 signal line is in reverse connection, the single-chip microcomputer CPU will output control signals through the control port POO_485 _SW, and reverse processing can be performed on the 485 signals through the electronic switching circuit. Thus, the 485 signal line reverse connection automatic recognition correction circuit of the utility model can automatically detect 485 network signals and can automatically correct the signals, and therefore, construction travel and customer complaints can be avoided, and a communication system can be safe and reliable.
Description
Technical field
The utility model relates to 485 telecommunication circuit technical fields, relates in particular to a kind of automatic identification correction circuit of 485 holding wire reversal connections.
Background technology
485 serial line interfaces are common interfaces of current communication apparatus, but can often occur reversal connection problem in the time that communication line is installed.Once there is reversal connection, communication apparatus can not normally start, and is all now manually to investigate fault, checks very trouble; And because the particularity of monitoring, its communication apparatus otherwise aloft, otherwise in far place, check that failure ratio is more difficult, this fault is artificial, but often has customer complaint.Therefore, need a kind of fault that can automatically identify 485 holding wire reversal connections badly, and can automatically get rid of the Circuits System of this fault.
Utility model content
The purpose of this utility model is to propose a kind of automatic identification correction circuit of 485 holding wire reversal connections, can automatically identify the also reversal connection of error correction 485 holding wires, makes communication system have higher fail safe, stability and reliability.
For reaching this object, the utility model by the following technical solutions:
A kind of automatic identification correction circuit of 485 holding wire reversal connections, comprise: electronic switching circuit, signaling conversion circuit and CPU, the input of described electronic switching circuit is 485 signal input parts, the output of described electronic switching circuit is connected with the input of signaling conversion circuit, the output of described signaling conversion circuit is connected with the I/O port P3.0 of CPU, and the control port POO_485_SW of described CPU is connected with the logic control end of electronic switching circuit.
Wherein, described electronic switching circuit comprises that model is the Port Multiplier U7 of BTC4157, model is Port Multiplier U8 and the resistance R 29 of BTC4157, the 1st pin of described U7 is connected with the 3rd pin of described U8 and is 485+ signal input part, the 2nd pin of described U7 is connected with the 2nd pin of described U8 and equal ground connection, the 3rd pin of described U7 is connected with the 1st pin of described U8 and is 485-signal input part, the first output that the 4th pin of described U7 is electronic switching circuit, the 5th pin of described U7 is connected with the power supply that the 5th pin of described U8 is all 5V with external voltage, the 6th pin of described U7 and the 6th pin of described U8 are all connected with one end of resistance R 29, the other end of described resistance R 29 is connected with the control port POO_485_SW of CPU, the second output that the 4th pin of described U8 is electronic switching circuit.
Wherein, the resistance of described resistance R 29 is 1K Ω.
Wherein, described signaling conversion circuit comprises that model is transceiver U6 and the resistance R 30 of MAX487CSA, the output that the 1st pin of described U6 is signaling conversion circuit is connected with the I/O port P3.0 of CPU, the 2nd pin of described U6 is all connected with one end of resistance R 30 with the 3rd pin, the other end ground connection of described resistance R 30, the 4th pin of described U6 is unsettled, the 5th pin ground connection of described U6, the 6th pin of described U6 is connected with the second output of electronic switching circuit, the 7th pin of described U6 is connected with the first output of electronic switching circuit, the power supply that the 8th pin of described U6 is 5V with external voltage is connected.
Wherein, the resistance of described resistance R 30 is 1K Ω.
Beneficial effect:
Compared with prior art, the utility model comprises: electronic switching circuit, signaling conversion circuit and CPU, the input of described electronic switching circuit is 485 signal input parts, the output of described electronic switching circuit is connected with the input of signaling conversion circuit, the output of described signaling conversion circuit is connected with the I/O port P3.0 of CPU, and the control port POO_485_SW of described CPU is connected with the logic control end of electronic switching circuit.First RS485 differential signal is converted to TTL RS232 serial data by signaling conversion circuit, so that singlechip CPU can be identified; Then singlechip CPU judges whether current 485 holding wires connect instead, if 485 holding wires connect instead, will, by control interface P00_485_SW output control signal, carry out reverse process by electronic switching circuit to 485 signals.Therefore, the utility model can detect 485 network signals automatically, judge the whether reversal connection of 485 holding wires, if reversal connection, can correct automatically, remove hurrying back and forth and customer complaint of construction from, and can automatic Memory 485 signals positive and negative, power-off can be remembered, and the switch that when energising next time can automatic conversion electron switching circuit, saves the time again judging; Its practicality is not need transmitted signal, only need to intercept the packet of 485 networks, can complete 485 positive-negative connected identifications and correct, and baud rate is identified automatically.So just mean all terminals that connect 485 networks, only need user to send packet, control a terminal, all terminals all can go to intercept/identify, as long as there is a terminal to complete identification, all terminal equipments all can complete identification, and memorize, to user very easily.
Brief description of the drawings
Fig. 1 is the automatic identification correction circuit figure of a kind of 485 holding wire reversal connections of providing of the utility model embodiment.
In figure:
1-electronic switching circuit; 2-signaling conversion circuit.
Embodiment
Further illustrate the technical solution of the utility model below in conjunction with accompanying drawing and by embodiment.
Fig. 1 is the automatic identification correction circuit figure of a kind of 485 holding wire reversal connections of providing of the utility model embodiment.As shown in Figure 1, a kind of automatic identification correction circuit of 485 holding wire reversal connections, comprise: electronic switching circuit 1, signaling conversion circuit 2 and CPU, the input of described electronic switching circuit 1 is 485 signal input parts, the output of described electronic switching circuit 1 is connected with the input of signaling conversion circuit 2, and the output of described signaling conversion circuit 2 is connected with the I/O port P3.0 of CPU, and the control port POO_485_SW of described CPU is connected with the logic control end of electronic switching circuit 1.
In 485 signal networks of monitoring, no matter whether communication control equipment, Circuits System all can be monitored 485 network signals.First singlechip CPU the RS485 differential signal listening to is converted to TTLRS232 serial data by signaling conversion circuit 2, so that can be identified; Then singlechip CPU, according to the signal listening to, judges whether current 485 holding wires connect instead; If 485 holding wires connect instead, will, by control interface P00_485_SW output control signal, carry out reverse process by electronic switching circuit 1 to 485 signals; And can automatic Memory 485 signals positive and negative, power-off can be remembered, switch that can automatic conversion electron switching circuit 1 when next time energising, saves the time again judging.Therefore, the utility model can detect 485 network signals automatically, judges the whether reversal connection of 485 holding wires, and can automatically correct, and removes hurrying back and forth and customer complaint of construction from.
Therefore, its practicality is not need transmitted signal, only need to intercept the packet of 485 networks, can complete 485 positive-negative connected identifications and correct, and baud rate is identified automatically.So just mean all terminals that connect 485 networks, only need user to send packet, control a terminal, all terminals all can go to intercept/identify, as long as there is a terminal to complete identification, all terminal equipments all can complete identification, and memorize, to user very easily.
Described electronic switching circuit 1 comprises that model is the Port Multiplier U7 of BTC4157, model is Port Multiplier U8 and the resistance R 29 of BTC4157, the 1st pin of described U7 is connected with the 3rd pin of described U8 and is 485+ signal input part, the 2nd pin of described U7 is connected with the 2nd pin of described U8 and equal ground connection, the 3rd pin of described U7 is connected with the 1st pin of described U8 and is 485-signal input part, the 4th pin of described U7 is the first output of electronic switching circuit 1, the 5th pin of described U7 is connected with the power supply that the 5th pin of described U8 is all 5V with external voltage, the 6th pin of described U7 and the 6th pin of described U8 are all connected with one end of resistance R 29, the other end of described resistance R 29 is connected with the control port POO_485_SW of CPU, the 4th pin of described U8 is the second output of electronic switching circuit 1.
Preferably, the resistance of described resistance R 29 is 1K Ω.
Described signaling conversion circuit 2 comprises that model is transceiver U6 and the resistance R 30 of MAX487CSA, the 1st pin of described U6 is that the output of signaling conversion circuit 2 and the I/O port P3.0 of CPU are connected, the 2nd pin of described U6 is all connected with one end of resistance R 30 with the 3rd pin, the other end ground connection of described resistance R 30, the 4th pin of described U6 is unsettled, the 5th pin ground connection of described U6, the 6th pin of described U6 is connected with the second output of electronic switching circuit 1, the 7th pin of described U6 is connected with the first output of electronic switching circuit 1, the power supply that the 8th pin of described U6 is 5V with external voltage is connected.
Preferably, the resistance of described resistance R 30 is 1K Ω.
The course of work of the automatic identification correction circuit of 485 holding wire reversal connections described in the utility model is as follows: first RS485 differential signal is converted to Transistor-Transistor Logic level RS232 serial data by MX487CSA, to can identify by single-chip microcomputer, then by the port P3.0 of RS232 signal input CPU; CPU judges current anti-485 signals that whether connect according to the RS232 signal receiving, wherein, the judgment mode of singlechip CPU is to be converted to after Transistor-Transistor Logic level RS232 at 485 signals, serial ports beginning flag and end mark to agreement judge for the first time, judge whether again to meet agreement inspection and, again judge whether to meet the decoding request of agreement, thereby assert whether connect instead; If judge that current demand signal line connects instead, singlechip CPU will, by control port P00_485_SW output control signal, for controlling the interface direction of the U7 of electronic switching circuit 1 and 485 signals of U8, be carried out reverse process to 485 signals.After signal is normal, what system can automatic Memory 485 signals is positive and negative, and power-off can be remembered, and when next time energising, the switch of automatic conversion electron switching circuit 1, need not identify again, saves the time of judgement again.
The above; it is only preferably embodiment of the utility model; but protection range of the present utility model is not limited to this; any be familiar with those skilled in the art the utility model disclose technical scope in; be equal to replacement or changed according to the technical solution of the utility model and utility model design thereof, within all should being encompassed in protection range of the present utility model.
Claims (5)
1. the automatic identification correction circuit of a holding wire reversal connection, it is characterized in that, comprise: electronic switching circuit (1), signaling conversion circuit (2) and CPU, the input of described electronic switching circuit (1) is 485 signal input parts, the output of described electronic switching circuit (1) is connected with the input of signaling conversion circuit (2), the output of described signaling conversion circuit (2) is connected with the I/O port P3.0 of CPU, and the control port POO_485_SW of described CPU is connected with the logic control end of electronic switching circuit (1).
2. the automatic identification correction circuit of a kind of 485 holding wire reversal connections according to claim 1, it is characterized in that, described electronic switching circuit (1) comprises that model is the Port Multiplier U7 of BTC4157, model is Port Multiplier U8 and the resistance R 29 of BTC4157, the 1st pin of described U7 is connected with the 3rd pin of described U8 and is 485+ signal input part, the 2nd pin of described U7 is connected with the 2nd pin of described U8 and equal ground connection, the 3rd pin of described U7 is connected with the 1st pin of described U8 and is 485-signal input part, the 4th pin of described U7 is the first output of electronic switching circuit (1), the 5th pin of described U7 is connected with the power supply that the 5th pin of described U8 is all 5V with external voltage, the 6th pin of described U7 and the 6th pin of described U8 are all connected with one end of resistance R 29, the other end of described resistance R 29 is connected with the control port POO_485_SW of CPU, the 4th pin of described U8 is the second output of electronic switching circuit (1).
3. the automatic identification correction circuit of a kind of 485 holding wire reversal connections according to claim 2, is characterized in that, the resistance of described resistance R 29 is 1K Ω.
4. the automatic identification correction circuit of a kind of 485 holding wire reversal connections according to claim 2, it is characterized in that, described signaling conversion circuit (2) comprises that model is transceiver U6 and the resistance R 30 of MAX487CSA, the 1st pin of described U6 is that the output of signaling conversion circuit (2) and the I/O port P3.0 of CPU are connected, the 2nd pin of described U6 is all connected with one end of resistance R 30 with the 3rd pin, the other end ground connection of described resistance R 30, the 4th pin of described U6 is unsettled, the 5th pin ground connection of described U6, the 6th pin of described U6 is connected with the second output of electronic switching circuit (1), the 7th pin of described U6 is connected with the first output of electronic switching circuit (1), the power supply that the 8th pin of described U6 is 5V with external voltage is connected.
5. the automatic identification correction circuit of a kind of 485 holding wire reversal connections according to claim 4, is characterized in that, the resistance of described resistance R 30 is 1K Ω.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320882538.0U CN203661079U (en) | 2013-12-30 | 2013-12-30 | 485 signal line reverse connection automatic recognition correction circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320882538.0U CN203661079U (en) | 2013-12-30 | 2013-12-30 | 485 signal line reverse connection automatic recognition correction circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203661079U true CN203661079U (en) | 2014-06-18 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201320882538.0U Expired - Fee Related CN203661079U (en) | 2013-12-30 | 2013-12-30 | 485 signal line reverse connection automatic recognition correction circuit |
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| Country | Link |
|---|---|
| CN (1) | CN203661079U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104199338A (en) * | 2014-08-04 | 2014-12-10 | 珠海中慧微电子有限公司 | Communication control method of RS485 communication circuit |
| CN107818060A (en) * | 2016-09-14 | 2018-03-20 | 北京迪文科技有限公司 | A kind of method of adaptive TTL and RS232 serial communication modes |
-
2013
- 2013-12-30 CN CN201320882538.0U patent/CN203661079U/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104199338A (en) * | 2014-08-04 | 2014-12-10 | 珠海中慧微电子有限公司 | Communication control method of RS485 communication circuit |
| CN104199338B (en) * | 2014-08-04 | 2017-03-15 | 珠海中慧微电子有限公司 | A kind of communicating control method of RS485 communicating circuits |
| CN107818060A (en) * | 2016-09-14 | 2018-03-20 | 北京迪文科技有限公司 | A kind of method of adaptive TTL and RS232 serial communication modes |
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| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140618 Termination date: 20191230 |
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| CF01 | Termination of patent right due to non-payment of annual fee |