CN203608105U - Inversion AC waveform control circuit and electric welding machine working circuit thereof - Google Patents
Inversion AC waveform control circuit and electric welding machine working circuit thereof Download PDFInfo
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- CN203608105U CN203608105U CN201320776618.8U CN201320776618U CN203608105U CN 203608105 U CN203608105 U CN 203608105U CN 201320776618 U CN201320776618 U CN 201320776618U CN 203608105 U CN203608105 U CN 203608105U
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Abstract
The utility model discloses an inversion AC waveform control circuit comprising a secondary inversion circuit, a logic sequential circuit, and a waveform control circuit. The logic sequential circuit is respectively connected with the waveform control circuit and the secondary inversion circuit. The logic sequential circuit is provided with an inversion trigger signal output end and a waveform control pulse signal output end. The inversion trigger signal output end is connected with the input end of the secondary inversion circuit, and the waveform control pulse signal output end is connected with the input end of the waveform control circuit. The waveform control pulse signals output by the waveform control pulse signal output end can be converted into different pulse peak signals, which can be used for the different processing of a large segment, a middle segment, and a small segment of the current. The invention also discloses an electric welding machine working circuit of the inversion AC waveform control circuit.
Description
Technical field
The utility model relates to electric welding machine control field, especially relates to the electric welding machine operating circuit of a kind of inversion AC wave shape control circuit and inversion AC wave shape control circuit.
Background technology
In the middle of the inert gas tungsten electrode protection weldering (TIG weldering) of aluminium and alloy thereof; due to aluminium material surface can with airborne oxygen generation chemical reaction; generate oxide-film; the fusing point of this oxide-film is far above aluminium; as adopt the DC TIG welding of positive polarity connection; the oxidized film of weld pool surface covers, and cannot reach welding process requirement, and welding can not be carried out.And while adopting negative polarity connection, tungsten bar is anodal, and electronics is launched to tungsten electrode by workpiece, has the effect of cleaning oxide-film, but tungsten electrode scaling loss is serious, and weld penetration is inadequate, therefore, must adopt alternating current arc to weld, utilize the not same-action of the positive and negative half-wave of alternating current arc simultaneously, reach and improve tungsten electrode current capacity to obtain larger fusion penetration, have again enough oxide-film cleaning abilities simultaneously, welding can normally be carried out.
Alternating current arc is in the time of electric current commutation, and arc extinction ignites again, for guaranteeing arc stability, needs very high current over-zero speed (being greater than 100A/20us), and what therefore generally adopt is that AC square wave current welds.But this control method welding effect in medium and small welding current situation is still calculated well, but under the large current conditions of 400-630A, arc noise is very large, severe exacerbation welder environment for use, welder's endurable.The high di/dt that square wave current commutation under large current conditions brings simultaneously, can produce very high due to voltage spikes, and it is very difficult to absorb this spike, and the safety of the switch element of serious threat secondary inverter circuit has been reduced the reliability of complete machine by this.
Utility model content
Based on this, the utility model is to overcome the defect of prior art, and the electric welding machine operating circuit of a kind of inversion AC wave shape control circuit and inversion AC wave shape control circuit is provided.
Its technical scheme is as follows:
A kind of inversion AC wave shape control circuit, comprise secondary inverter circuit, also comprise logical sequence circuit and waveform control circuit, described logical sequence circuit is connected with described waveform control circuit and secondary inverter circuit respectively, described logical sequence circuit has inversion triggering signal output and ripple control pulse signal output end, described inversion triggering signal output is connected with the input of described secondary inverter circuit, and described ripple control pulse signal output end is connected with the input of described waveform control circuit.
Given current value is under different range state, by ripple control pulse signal output end output wave control pulse signal, and then be converted to different pulse spikes, realize the different wave control effect under little electric current and current state, thereby pre-output voltage is carried out to different processing.Under little current status, before and after commutation, improve electric current, make electric arc commutation under a larger electric current, improve the stability of electric arc.Under current state, diminish at converting commutating current, rate of change is reduced, thereby reduce arc hissing and overvoltage spike, thereby carry out different processing to large, medium and small three sections of electric current respectively.Meanwhile, what adopt due to inversion AC wave shape control circuit of the present utility model is simulation, digital circuit, though reply need high-frequency and high-voltage mode to ignite the argon arc welding machine of electric arc also can steady operation, therefore antijamming capability greatly improves.Inversion AC wave shape control circuit of the present utility model has avoided using that microcontroller may occur that work causes interference to microcontroller due to high-frequency and high-voltage effectively, causes the problem of program fleet.
Further, described waveform control circuit comprises the first electronic switch, the second electronic switch, Waveform Control inverter, Waveform Control intensity selection circuit and error amplifying circuit, the first end of the first electronic switch, the second electronic switch is connected with described ripple control pulse signal output end respectively, the second end of described the first electronic switch is connected with the input of error amplifying circuit through Waveform Control inverter, and the second end of described the second electronic switch selects circuit to be connected with the input of described error amplifying circuit through Waveform Control intensity.
Further, described Waveform Control rssi circuit comprises waveform intensity selector switch, the first waveform intensity resistance and the second waveform intensity resistance, described the second electronic switch is connected with the first end of waveform intensity selector switch, and the second end of described waveform intensity selector switch and the 3rd end are connected with described error amplifying circuit by the first waveform intensity resistance and the second waveform intensity resistance respectively.
Further, described logical sequence circuit comprises oscillator signal generator, phase-shift circuit and ripple control pulse signal generative circuit, described oscillator signal generator is connected with the input of described phase-shift circuit and the input of ripple control pulse signal generative circuit respectively, the output of described phase-shift circuit forms described inversion triggering signal output, and the output of described ripple control pulse signal generative circuit forms described ripple control pulse signal output end.
Further, described ripple control pulse signal generative circuit comprises the first steady-state circuit, the second steady-state circuit, the first inverter and OR circuit, described oscillator signal generator is connected with the input of described the first steady-state circuit respectively, and be connected with the input of described the second steady-state circuit by the first inverter, the output of described the first steady-state circuit and the second steady-state circuit forms described ripple control pulse signal output end through OR circuit.
Further, described ripple control pulse signal generative circuit also has arc maintenance pulse signal output end, described secondary inverter circuit has insulated gate bipolar transistor half-bridge inversion circuit and keep-alive circuit, described inversion triggering signal output is connected with described insulated gate bipolar transistor half-bridge inversion circuit, described keep-alive circuit comprises arc maintenance switch element, arc maintenance electric capacity and arc maintenance diode, and described arc maintenance pulse signal output end is connected with described arc maintenance switch element.
A kind of electric welding machine operating circuit of inversion AC wave shape control circuit, comprise inverter circuit one time, high frequency transformer step-down, rectification circuit, secondary inverter circuit and output, also comprise logical sequence circuit and waveform control circuit, described logical sequence circuit is connected with described waveform control circuit and secondary inverter circuit respectively, described logical sequence circuit has inversion triggering signal output and ripple control pulse signal output end, described inversion triggering signal output is connected with the input of described secondary inverter circuit, described ripple control pulse signal output end is connected with described waveform control circuit input, the output of described waveform control circuit successively with a described inverter circuit, high frequency transformer step-down, rectification circuit, secondary inverter circuit connects.
Further, also comprise given value of current end, described waveform control circuit comprises the first electronic switch, the second electronic switch, Waveform Control inverter, Waveform Control intensity is selected circuit and error amplifying circuit, the first electronic switch, the first end of the second electronic switch is connected with described ripple control pulse signal output end respectively, the second end of described the first electronic switch is after Waveform Control inverter, jointly be connected the input of described error amplifying circuit with given value of current end, the second end of described the second electronic switch selects circuit to be connected with the input of described error amplifying circuit through Waveform Control intensity.
Further, described logical sequence circuit comprises oscillator signal generator, phase-shift circuit and ripple control pulse signal generative circuit, described oscillator signal generator is connected with the input of described phase-shift circuit and the input of ripple control pulse signal generative circuit respectively, the output of described phase-shift circuit forms described inversion triggering signal output, and the output of described ripple control pulse signal generative circuit forms described ripple control pulse signal output end
Further, described ripple control pulse signal generative circuit also has arc maintenance pulse signal output end, described secondary inverter circuit has insulated gate bipolar transistor half-bridge inversion circuit and keep-alive circuit, described inversion triggering signal output is connected with described insulated gate bipolar transistor half-bridge inversion circuit, described keep-alive circuit comprises arc maintenance switch element, arc maintenance electric capacity and arc maintenance diode, described arc maintenance pulse signal output end is connected with described arc maintenance switch element, described arc maintenance electric capacity and described insulated gate bipolar transistor half-bridge inversion circuit are connected with described output.
Accompanying drawing explanation
Fig. 1 is the modularization connection diagram with the electric welding machine operating circuit of the inversion AC wave shape control circuit described in the utility model embodiment.
Fig. 2 is the circuit diagram of the logical sequence circuit in Fig. 1.
Fig. 3 is the circuit diagram of the circuit of the Waveform Control in Fig. 1.
Fig. 4 is the circuit diagram of the circuit of secondary inverting in Fig. 1 and synchronous arc maintenance.
Fig. 5 is the inversion AC wave shape control method phase diagram described in the utility model embodiment.
Fig. 6 is inversion AC wave shape control method described in the utility model embodiment processing waveform for the electric current of 20A.
Fig. 7 is inversion AC wave shape control method described in the utility model embodiment processing waveform for the electric current of 100A.
Fig. 8 is inversion AC wave shape control method described in the utility model embodiment processing waveform for the electric current of 300A.
Fig. 9 is inversion AC wave shape control method described in the utility model embodiment processing waveform for the electric current of 500A.
Description of reference numerals:
10, logical sequence circuit, 12, phase-shift circuit, 14, ripple control pulse signal generative circuit, 20, waveform control circuit, 22, error amplifying circuit, 24, Waveform Control intensity is selected circuit, 30, pulse width modulation circuit, 40, an inverter circuit, 50, high frequency transformer step-down, rectification circuit, 60, secondary inverter circuit, 62, insulated gate bipolar transistor half-bridge inversion circuit.
Embodiment
Below embodiment of the present utility model is elaborated:
As shown in Figure 1, inversion AC wave shape control circuit of the present utility model comprises logical sequence circuit 10, waveform control circuit 20 and secondary inverter circuit 60.The electric welding machine operating circuit with the inversion AC wave shape control circuit described in the utility model embodiment also comprises pulse width modulation circuit 30, inverter circuit 40, high frequency transformer step-down, rectification circuit 50 and an output.
As shown in Figure 2, described logical sequence circuit 10 has inversion triggering signal output OUTA, OUTB and ripple control pulse signal output end BK.Described inversion triggering signal output OUTA, OUTB are connected with the input of described secondary inverter circuit 60.Described ripple control pulse signal output end BK is connected with the input of described waveform control circuit 20.Described logical sequence circuit 10 comprises oscillator signal generator V1, phase-shift circuit 12 and ripple control pulse signal generative circuit 14.Described oscillator signal generator V1 is connected with the input of described phase-shift circuit 12 and the input of ripple control pulse signal generative circuit 14 respectively.Described phase-shift circuit 12 is mainly by amplifier U6B, resistance R 17, capacitor C 1 and amplifier U7A composition.Oscillator signal generator V1 is connected with the output of amplifier U6B.The output of amplifier U7A, after inverter U3E and inverter U3F, forms described inversion triggering signal output OUTA by AND circuit U8A, forms inversion triggering signal output OUTB through OR circuit U9A.Described ripple control pulse signal generative circuit 14 mainly comprises the first steady-state circuit U1, the second steady-state circuit U2, three-stable state circuit U 10, the first inverter U3A and OR circuit U4A.Described oscillator signal generator V1 connects the input of described the first steady-state circuit U1 through inverter U3C and the first inverter U3A.Described oscillator signal generator V1 connects the input of described the second steady-state circuit U2 through inverter U3C, U3D, U3B.Described the first steady-state circuit U1 is connected with the input of described OR circuit U4A respectively with the output of the second steady-state circuit U2, and the output of described OR circuit U4A forms described ripple control pulse signal output end BK.Described ripple control pulse signal generative circuit 14 also has arc maintenance pulse signal output end WHP.Described oscillator signal generator V1, after phase-shift circuit 12, then connects the input of described three-stable state circuit U 10 via inverter U3E.Arc maintenance pulse signal output end WHP described in the output new city of described the 3rd problem circuit U 10.
As shown in Figure 3, described waveform control circuit 20 comprises the first electronic switch U1A, the second electronic switch U1B, Waveform Control inverter U2D, Waveform Control intensity selection circuit 24 and error amplifying circuit 22.The first end of the first electronic switch U1A, the second electronic switch U1B is connected with described ripple control pulse signal output end BK respectively.The second end of described the first electronic switch U1A is connected with the input of error amplifying circuit 22 through Waveform Control inverter U2D.The second end of described the second electronic switch U1B selects circuit 24 to be connected with the input of described error amplifying circuit 22 through Waveform Control intensity.The second end of described the first electronic switch U1A is simultaneously via the given value of current end that is added to after resistance R 14, R13.The feedback current being obtained by Hall element (not shown) enters described error amplifying circuit 22 via resistance R 17 and the second termination of described the first electronic switch U1A.Described Waveform Control rssi circuit 24 comprises waveform intensity selector switch SW1, the first waveform intensity resistance R 19 and the second waveform intensity resistance R 20.Described the second electronic switch U1B is connected with the first end of waveform intensity selector switch SW1, and the second end of described waveform intensity selector switch SW1 and the 3rd end are connected with described error amplifying circuit 22 by the first waveform intensity resistance R 19 and the second waveform intensity resistance R 20 respectively.
As shown in Figure 4, described secondary inverter circuit 60 has insulated gate bipolar transistor half-bridge inversion circuit 62 and keep-alive circuit.Described inversion triggering signal output OUTA, OUTB are connected with the base stage of IGBT1 and the base stage of IGBT2 in described insulated gate bipolar transistor half-bridge inversion circuit 62 respectively.Described keep-alive circuit comprises arc maintenance switch element IGBT 3, arc maintenance capacitor C and arc maintenance diode D.Described arc maintenance pulse signal output end WHP is connected with the base stage of described arc maintenance switch element IGBT 3.Described arc maintenance capacitor C and described insulated gate bipolar transistor half-bridge inversion circuit 62 are connected with described output.
Understandably, for improving the stability of circuit, in described logical sequence circuit 10, waveform control circuit 20 and secondary inverter circuit 60, other electronic components have also been added.
As shown in Fig. 5-9, the inversion AC wave shape control method described in embodiment of the present utility model comprises the following steps:
S1: generate ripple control pulse signal BK and inversion triggering signal OUTA, OUTB, described ripple control pulse signal BK is leading described inversion triggering signal OUTA, OUTB in phase place;
Particularly, described step S1 specifically comprises the following steps:
The method that generates described ripple control pulse signal, inversion triggering signal and arc maintenance pulse signal comprises the following steps:
S11: the first via of oscillator signal VPULSE obtains the first steady-state signal through steady state process,
S12: obtain the second steady-state signal through steady state process after the second tunnel of oscillator signal is anti-phase;
S13: the first steady-state signal or the second steady-state signal form described ripple control pulse signal BK;
S14: the Third Road of oscillator signal VPULSE obtains inversion triggering signal OUTA, OUTB through phase shift processing;
S15: the Third Road of oscillator signal VPULSE, after phase shift is processed, is obtaining arc maintenance pulse signal WHP through steady state process.
The cycle of described inversion triggering signal OUTA, OUTB is the twice in the cycle of ripple control pulse signal BK, once, the pulse duration of described ripple control pulse signal BK covers the commutation interval of described inversion triggering signal OUTA, OUTB for described inversion triggering signal OUTA, the every half period commutation of OUTB.In the present embodiment, described ripple control pulse signal BK leading described inversion triggering signal OUTA, OUTB0.05s in phase place.Therefore in the time of the each commutation of output voltage, ripple control pulse signal BK all can make adjustment to commutation voltage.Described arc maintenance pulse signal WHP is synchronizeed with described inversion triggering signal OUTA, OUTB in phase place.The cycle of described arc maintenance pulse signal WHP equated with the cycle of described inversion triggering signal OUTA, OUTB, and the pulse duration of described arc maintenance pulse signal WHP equals the pulse duration of described ripple control pulse signal BK.
S2: judge the current value I of given electric current, as I < I
1time, ripple control pulse signal BK converts the first spike signal, I to
1it is the first current threshold; As I > I
2time, ripple control pulse signal BK converts the second spike signal, I to
2it is the second current threshold; In the present embodiment, the first current threshold I
1≤ 100A, the second current threshold I
2>=250A.Owing to working as I > I
2time, ripple control pulse signal does not pass through anti-phase processing, therefore error amplify process after the second spiking of obtaining given be downward spiking, the spiking upwards given with the first spiking is contrary.
Particularly, described step S2 specifically comprises the following steps:
S21: as I < I
1time, after ripple control pulse signal BK and the stack of given value of current signal, carry out anti-phase processing, then carry out error with given value of current signal and amplify processing, obtain the first spike signal;
Comparison diagram 6 and Fig. 7, in the time that electric current is 20A, before electric current commutation, the first spike signal makes circuit rise to a larger current value, is electric current commutation under larger electric current.After so processing, when can being extended to 13A, electric current still can work.In the time that electric current is 100A, current over-zero is rapid.Because electric current is smaller, arc hissing is little.
S22: as I > I
2time, ripple control pulse signal carries out error amplification processing and obtains the second spike signal.
Described step S22 comprises that ripple control pulse signal is through the adjustment of Waveform Control intensity particularly, then carries out error and amplify processing, obtains described the second spike signal.Adjust by different control intensity, be applied to the large electric current of different amplitudes, the electric current that amplitude is larger, controls intensity larger, thereby is more conducive to reduce arc hissing.Comparison diagram 7 and Fig. 8, in the time that electric current is 300A, the slope of electric current commutation reduces during obviously than 100A after zero passage, and now arc stability and noise obviously reduce.Comparison diagram 9 and Fig. 8, in the time that electric current is 500A, electric current rises to approach sinusoidal wave mode after zero passage, and arc hissing significantly reduces.In the time that electric current is extended to 500A, the effect that the mode of utilizing the second spike signal stack still can pilot arc noise significantly reduces than traditional square wave.
S3: inversion triggering signal triggers carries out inversion processing and exports inverter voltage pre-output voltage, as I < I
1time, described pre-output voltage is the superposition value of given voltage and the first spike signal, as I > I
2time, described pre-output voltage is the superposition value of given voltage and the second spike signal, works as I
1< I < I
2time, described pre-output voltage is given voltage.
Understandably, inversion AC wave shape control method of the present utility model can also comprise step:
S4: generate arc maintenance pulse signal, described arc maintenance pulse signal is synchronizeed with described inversion triggering signal in phase place.Arc maintenance pulse signal triggers arc maintenance capacitor charging, and arc maintenance electric capacity generates keep-alive voltage at output, the maintenance effects when improving little electric current.
Given current value is under different range state, and ripple control pulse signal is converted to different pulse signals, realizes the different wave control effect under little electric current and current state, thereby pre-output voltage is carried out to different processing.Under little current status, before and after commutation, improve electric current, make electric arc commutation under a larger electric current, improve the stability of electric arc.Under current state, diminish at converting commutating current, rate of change is reduced, thereby reduce arc hissing and overvoltage spike.Meanwhile, what adopt due to inversion AC wave shape control circuit of the present utility model is simulation, digital circuit, though reply need high-frequency and high-voltage mode to ignite the argon arc welding machine of electric arc also can steady operation, therefore antijamming capability greatly improves.Inversion AC wave shape control circuit of the present utility model has avoided using that microcontroller may occur that work causes interference to microcontroller due to high-frequency and high-voltage effectively, causes the problem of program fleet.
The above embodiment has only expressed embodiment of the present utility model, and it describes comparatively concrete and detailed, but can not therefore be interpreted as the restriction to the utility model the scope of the claims.It should be pointed out that for the person of ordinary skill of the art, without departing from the concept of the premise utility, can also make some distortion and improvement, these all belong to protection range of the present utility model.
Claims (10)
1. an inversion AC wave shape control circuit, comprise secondary inverter circuit, it is characterized in that, also comprise logical sequence circuit and waveform control circuit, described logical sequence circuit is connected with described waveform control circuit and secondary inverter circuit respectively, described logical sequence circuit has inversion triggering signal output and ripple control pulse signal output end, described inversion triggering signal output is connected with the input of described secondary inverter circuit, and described ripple control pulse signal output end is connected with the input of described waveform control circuit.
2. inversion AC wave shape control circuit as claimed in claim 1, it is characterized in that, described waveform control circuit comprises the first electronic switch, the second electronic switch, Waveform Control inverter, Waveform Control intensity is selected circuit and error amplifying circuit, the first electronic switch, the first end of the second electronic switch is connected with described ripple control pulse signal output end respectively, the second end of described the first electronic switch is connected with the input of error amplifying circuit through Waveform Control inverter, the second end of described the second electronic switch selects circuit to be connected with the input of described error amplifying circuit through Waveform Control intensity.
3. inversion AC wave shape control circuit as claimed in claim 2, it is characterized in that, described Waveform Control rssi circuit comprises waveform intensity selector switch, the first waveform intensity resistance and the second waveform intensity resistance, described the second electronic switch is connected with the first end of waveform intensity selector switch, and the second end of described waveform intensity selector switch and the 3rd end are connected with described error amplifying circuit by the first waveform intensity resistance and the second waveform intensity resistance respectively.
4. inversion AC wave shape control circuit as claimed in claim 1, it is characterized in that, described logical sequence circuit comprises oscillator signal generator, phase-shift circuit and ripple control pulse signal generative circuit, described oscillator signal generator is connected with the input of described phase-shift circuit and the input of ripple control pulse signal generative circuit respectively, the output of described phase-shift circuit forms described inversion triggering signal output, and the output of described ripple control pulse signal generative circuit forms described ripple control pulse signal output end.
5. inversion AC wave shape control circuit as claimed in claim 4, it is characterized in that, described ripple control pulse signal generative circuit comprises the first steady-state circuit, the second steady-state circuit, the first inverter and OR circuit, described oscillator signal generator is connected with the input of described the first steady-state circuit respectively, and be connected with the input of described the second steady-state circuit by the first inverter, the output of described the first steady-state circuit and the second steady-state circuit forms described ripple control pulse signal output end through OR circuit.
6. inversion AC wave shape control circuit as claimed in claim 1, it is characterized in that, described ripple control pulse signal generative circuit also has arc maintenance pulse signal output end, described secondary inverter circuit has insulated gate bipolar transistor half-bridge inversion circuit and keep-alive circuit, described inversion triggering signal output is connected with described insulated gate bipolar transistor half-bridge inversion circuit, described keep-alive circuit comprises arc maintenance switch element, arc maintenance electric capacity and arc maintenance diode, and described arc maintenance pulse signal output end is connected with described arc maintenance switch element.
7. the electric welding machine operating circuit of an inversion AC wave shape control circuit, comprise inverter circuit one time, high frequency transformer step-down, rectification circuit, secondary inverter circuit and output, it is characterized in that: also comprise logical sequence circuit and waveform control circuit, described logical sequence circuit is connected with described waveform control circuit and secondary inverter circuit respectively, described logical sequence circuit has inversion triggering signal output and ripple control pulse signal output end, described inversion triggering signal output is connected with the input of described secondary inverter circuit, described ripple control pulse signal output end is connected with described waveform control circuit input, the output of described waveform control circuit successively with a described inverter circuit, high frequency transformer step-down, rectification circuit, secondary inverter circuit connects.
8. the electric welding machine operating circuit of inversion AC wave shape control circuit as claimed in claim 7, it is characterized in that: also comprise given value of current end, described waveform control circuit comprises the first electronic switch, the second electronic switch, Waveform Control inverter, Waveform Control intensity is selected circuit and error amplifying circuit, the first electronic switch, the first end of the second electronic switch is connected with described ripple control pulse signal output end respectively, the second end of described the first electronic switch is after Waveform Control inverter, jointly be connected the input of described error amplifying circuit with given value of current end, the second end of described the second electronic switch selects circuit to be connected with the input of described error amplifying circuit through Waveform Control intensity.
9. the electric welding machine operating circuit of inversion AC wave shape control circuit as claimed in claim 7, it is characterized in that: described logical sequence circuit comprises oscillator signal generator, phase-shift circuit and ripple control pulse signal generative circuit, described oscillator signal generator is connected with the input of described phase-shift circuit and the input of ripple control pulse signal generative circuit respectively, the output of described phase-shift circuit forms described inversion triggering signal output, and the output of described ripple control pulse signal generative circuit forms described ripple control pulse signal output end.
10. the electric welding machine operating circuit of inversion AC wave shape control circuit as claimed in claim 7, it is characterized in that: described ripple control pulse signal generative circuit also has arc maintenance pulse signal output end, described secondary inverter circuit has insulated gate bipolar transistor half-bridge inversion circuit and keep-alive circuit, described inversion triggering signal output is connected with described insulated gate bipolar transistor half-bridge inversion circuit, described keep-alive circuit comprises arc maintenance switch element, arc maintenance electric capacity and arc maintenance diode, described arc maintenance pulse signal output end is connected with described arc maintenance switch element, described arc maintenance electric capacity and described insulated gate bipolar transistor half-bridge inversion circuit are connected with described output.
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| CN201320776618.8U CN203608105U (en) | 2013-11-29 | 2013-11-29 | Inversion AC waveform control circuit and electric welding machine working circuit thereof |
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| CN201320776618.8U CN203608105U (en) | 2013-11-29 | 2013-11-29 | Inversion AC waveform control circuit and electric welding machine working circuit thereof |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN114362579A (en) * | 2022-01-12 | 2022-04-15 | 湘潭大学 | Power supply design method for magnetic control plasma arc |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN114362579A (en) * | 2022-01-12 | 2022-04-15 | 湘潭大学 | Power supply design method for magnetic control plasma arc |
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