CN203574111U - Active rod antenna - Google Patents
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- CN203574111U CN203574111U CN201320564882.5U CN201320564882U CN203574111U CN 203574111 U CN203574111 U CN 203574111U CN 201320564882 U CN201320564882 U CN 201320564882U CN 203574111 U CN203574111 U CN 203574111U
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Abstract
The utility model provides an electric field test instrument, and an active rod antenna consists of a pull rod antenna, a ground panel, and an antenna base. The pull rod antenna induces an electric field signal of a space, and outputs a voltage signal. The voltage signal is coupled into the antenna base. An electric signal, reflecting the features of an electric field, is outputted after the signal conditioning and impedance transformation through an internal circuit of the antenna base. The electric signal can be directly outputted to the radio frequency input end of a spectrum analyzer. The active rod antenna provided by the utility model is high in sensitivity, is low in background noise, is flat in antenna coefficient, is large in dynamic range, and meets the demands of RE102 test of national standard GJB152A-97.
Description
Technical field
The utility model belongs to electromagnetic measurement device field, is a kind of highly sensitive, the weak electric field tester that back noise is low, antenna factor is smooth, dynamic range is large.
Background technology
Along with electronic technology fast development, electromagnetic compatibility standard is also progressively set up and is perfect, and the electric field radiation transmitting of conventional electrical equipment is examined and limited to electromagnetic compatibility standard regulation, therefore just very necessary to the detection of spatial weak electric field interference signal.Passive whip antenna is excessive because of antenna factor, and sensitivity is low, and the field intensity below the 50dB μ V/m of space detects and is difficult to realize, and therefore can not meet faint electric field testing requirement; Common active spike antenna is excessive because of back noise, and small-signal is aliasing in back noise, is therefore also difficult to reach faint electric field testing requirement.
Summary of the invention
For solving existing antenna, can not meet the technical problem of faint electric field testing requirement, the utility model provides the active spike antenna that a kind of back noise is low, is exclusively used in the RE102 test of national standard GJB152A-97.
Technical solution of the present utility model is as follows:
A kind of active spike antenna, comprises telescopic antenna 1, ground connection flat board 2, antenna base 3, and the shell of described antenna base 3 consists of upper cover and casing, described upper cover and casing be physics conducting on circuit, described ground connection flat board 2 is positioned at antenna base 3 tops, and with the shell conducting of antenna base 3
Its special character is: in described antenna base 3, be provided with array signal processing unit, described array signal processing unit comprises signal condition unit 4, power supply unit 5 and charhing unit 6; The afterbody of described telescopic antenna 1 is fixedly connected with signal condition unit 4 through ground connection dull and stereotyped 2;
Described signal condition unit 4 comprises the one-level impedance inverter circuit, secondary impedance inverter circuit and the gain circuitry that connect successively,
Described one-level impedance inverter circuit, secondary impedance inverter circuit and gain circuitry are printed on same impedance inverter circuit plate 41,
Described power supply unit 5 is take battery pack 51 as core, and described charhing unit 6 comprises power module 61, and described battery pack 51 is powered for impedance inverter circuit plate 41, and described power module 61 charges for battery pack 51;
Between described impedance inverter circuit plate 41, battery pack 51, power module 61, do not contact mutually and be individually fixed in antenna base 3 inside, described antenna base 3 is metallic conductor, wherein impedance inverter circuit plate 41 is positioned at antenna base 3 inner upper middle parts, and the two ends of impedance inverter circuit plate 41 are connected with the upper cover of antenna base 3 by conductive component;
Described power supply unit 5 and charhing unit 6 are connected with the bottom half of antenna base 3.
The signal output interface of above-mentioned antenna base 3 is connected with the signal output part of secondary impedance inverter circuit and the signal output part of gain circuitry respectively by single-pole double-throw switch (SPDT) S1.
Above-mentioned one-level impedance inverter circuit comprises signal leading unit, voltage signal converting unit, and described secondary impedance inverter circuit comprises current signal amplifying unit,
Described voltage signal converting unit comprises field effect transistor Q1, for resistance unit, drain resistance unit, the source resistance unit of field effect transistor Q1 quiescent point are set; The other end of described resistance unit and drain resistance unit is connected with power output end respectively, the other end ground connection of described source resistance unit;
One end of described signal leading unit is connected with telescopic antenna 1, and the other end of described signal leading unit is connected with the grid of field effect transistor Q1;
Described current signal amplifying unit comprises transistor Q2, for base resistance unit, collector resistance unit, the emitter resistance unit of quiescent point of transistor Q2 is set; Described base resistance unit is connected with power supply side with the other end of collector resistance unit, the other end ground connection of described emitter resistance unit;
Also comprise the first power filtering capacitor group and second source filter capacitor group, described the first power filtering capacitor group is connected between power supply VCC and resistance unit, and described second source filter capacitor group is connected between power supply VCC and drain resistance unit;
Also comprise the first coupling unit being arranged between field effect transistor Q1 source electrode and transistor Q2 base stage,
Also comprise the second coupling unit being arranged between transistor Q2 emitter and gain circuitry input,
Also comprise the first feedback unit being arranged between field effect transistor Q1 source electrode and resistance unit,
Also comprise the second feedback unit being arranged between transistor Q2 emitter and field effect transistor Q1 drain electrode.
Above-mentioned resistance unit comprises R1, R2, R3, described R1 and R3 series connection, and an end of described R2 is connected between R1 and R3, the other end ground connection of described R2,
Described drain resistance unit comprises resistance R 6,
Described source resistance unit comprises resistance R 5,
Described signal leading unit comprises resistance R 4,
Described base resistance unit comprises resistance R 9 and resistance R 10, and one end of described resistance R 10 is connected with the base stage of transistor Q2, the other end ground connection of described resistance R 10,
Described collector resistance unit comprises resistance R 11,
Described emitter resistance unit comprises resistance R 8,
Described the first power filtering capacitor group comprises two capacitor C 1 and C2 in parallel,
Described second source filter capacitor group comprises two capacitor C 4 and C5 in parallel,
Described the first coupling unit comprises capacitor C 6,
Described the second coupling unit comprises two capacitor C 10 and C11 in parallel,
Described the second feedback unit comprises resistance R 7 and the capacitor C 7 that resistance is cascaded;
Described the first feedback unit comprises capacitor C 3, and described capacitor C 3 is the common port of resistance R 1, resistance R 2, resistance R 3 with the contact of resistance unit.
Above-mentioned gain circuitry is take amplification chip U1 as core, the input of described amplification chip U1 is by the output signal coupling of attenuation units and secondary impedance inverter circuit, between the input of described attenuation units and amplification chip U1, be also connected with resistance R 13, the other end ground connection of described resistance R 13;
The input port of described amplification chip U1 is provided with ac circuit unit, the other end ground connection of described ac circuit unit;
The feeder ear of described amplification chip U1 is connected with power supply by power supply voltage stabilizing chip U3, between described power supply voltage stabilizing chip U3 and the feeder ear of amplification chip U1, be also provided with slide rheostat RP1, the feeder ear of described amplification chip U1 is also provided with the 3rd power filtering capacitor group, the other end ground connection of described the 3rd power filtering capacitor group;
The output of described amplification chip U1 is by the 3rd signal coupling element output signal.
Above-mentioned ac circuit comprises two capacitor C 12 and the C13 that are connected in parallel,
The above the 3rd power filtering capacitor group comprises two capacitor C 18 and the C19 that are connected in parallel,
The above the 3rd signal coupling unit comprises two capacitor C 14 and the C15 that are connected in parallel,
The above attenuation units comprises the resistance R 12 and the R19 that are cascaded.
Above-mentioned field effect transistor Q1 is low noise field effect transistor, and described transistor Q2 is high frequency transistor, and described amplification chip U1 is low noise amplification chip.
Above-mentioned power supply unit 5 also comprises single-pole double-throw switch (SPDT) S2, indicator light L1, and described battery pack 51 is connected with the positive source input of impedance inverter circuit plate 41 and the positive source output of charhing unit 6 respectively by single-pole double-throw switch (SPDT) S2,
Above-mentioned single-pole double-throw switch (SPDT) S2 and indicator light L1 are installed on conduction casing front panel, and one end of described indicator light L1 is connected with the positive source input of impedance inverter circuit plate, other end ground connection;
Described charhing unit 6 also comprises the charging indicator light L2 that is arranged on conduction casing front panel, one end of described charging indicator light L2 with by resistance R and diode D+, be connected with the positive source output of power module 61, the other end ground connection of L2; The 220VAC power input interface 11 of described power module is positioned on conduction cabinet rear panel.
The material of above-mentioned ground connection flat board 2, antenna base, conductive component is aluminium, and described ground connection dull and stereotyped 2 is for passing through two blocks of aluminium sheets of gemel connection.
Above-mentioned single-pole double-throw switch (SPDT) S1 is installed on pedestal front panel, and the common port of described single-pole double-throw switch (SPDT) S1 is connected with the inner wire of coaxial connector J2, and the outer conductor of described coaxial connector J2 connects pedestal casing.
The beneficial effects of the utility model:
1. working frequency range is wide.This active spike antenna is generally used for 10kHz～30MHz frequency range.If any specific demand, active spike antenna working frequency range can be expanded to 1kHz～50MHz(and calibrate realization by antenna factor).
2. back noise is low.Active spike antenna self back noise is extremely low, is less than the 18dB μ V/m of national military standard regulation.
3. antenna factor is low.At 10kHz～10MHz frequency range internal antenna coefficient, be 2.5dB[1/m]～3.1dB[1/m]; At 10MHz～30MHz frequency range internal antenna coefficient, be 3.1dB[1/m]～5.5dB[1/m].
4. antenna factor is smooth, and frequency characteristic is good.In 10kHz～10MHz antenna factor flatness, be 1dB, in 10kHz～20MHz antenna factor flatness, be ± 1dB.
5. highly sensitive.Active spike antenna can sense the electric field signal of 1 μ V/m.
6. the upper limit for height of test.Active spike antenna can Validity Test 120dB μ V/m electric field signal.By configuring inner attenuator circuit, active spike antenna can be tested the upper limit can reach 145dB μ V/m.
Accompanying drawing explanation
The active spike antenna outside drawing of Fig. 1;
Fig. 2 telescopic antenna outside drawing;
Fig. 3 ground connection lithograph;
Fig. 4 antenna base block diagram;
Fig. 5 impedance inverter circuit sheet frame figure;
Fig. 6-1 is impedance inverter circuit block diagram;
Fig. 6 impedance inverter circuit figure;
Fig. 7 gain circuitry figure;
Fig. 8 base interior mounting arrangement figure;
The active spike antenna front panel of Fig. 9 figure;
The active spike antenna rear board of Figure 10 figure;
Wherein Reference numeral is: the input of 1-telescopic antenna, 2-ground connection flat board, 3-antenna base, 4-signal condition unit, 5-power supply unit, 6-charhing unit, 41-impedance inverter circuit plate, 51-battery pack, 61-power module, 7-hinge, 8-adapted seat, 9-foot pad, 10-signal output part, 11-power module.
Embodiment
Below in conjunction with Figure of description, describe embodiment of the present utility model in detail, but execution mode of the present utility model is not limited to this.
A kind of active spike antenna, comprise telescopic antenna, ground connection flat board 2, antenna base 3, telescopic antenna 1 length is adjustable, and after telescopic antenna 1 is fully withdrawn, the effective length being exposed in electric field is 1040mm, the afterbody of telescopic antenna 1 is the long screw thread of 10mm, the upper cover conducting of ground connection dull and stereotyped 2 and antenna base 3, ground connection flat board 2 is comprised of two blocks of identical aluminium sheets, and two blocks of aluminium sheets get up by gemel connection, ground connection flat board 2 is of a size of 600mm × 600mm after launching completely, and dull and stereotyped 2 thicknesss of slab of ground connection are 1.5mm.Dull and stereotyped 2 centres of ground connection have one
the circular hole of 50mm.Directly over ground connection flat board 2, being telescopic antenna 1, is pedestal under ground connection flat board 2.Telescopic antenna 1 is through dull and stereotyped 2 centres of ground connection
after the circular hole of 50mm, by screw thread, be connected with the internal signal conditioning unit 4 of pedestal.?
the circular hole surrounding of 50mm has four
the aperture of 3.5mm, screw is through these four
the aperture of 3.5mm is fixed on ground connection flat board 2 on pedestal.The shell of antenna base 3 consists of upper cover and casing.Described upper cover and casing be physics conducting on circuit.
The utility model, by optimizing the line design of array signal processing unit and rationally carrying out the layout of array signal processing unit in base interior, makes the back noise that active spike antenna is very low.
Array signal processing unit comprises signal condition unit 4, power supply unit 5 and charhing unit 6, and there is rechargeable battery pack 51 power supply unit 5 inside, when active spike antenna carries out electrical field test, by power supply unit 5, for signal condition unit 4, is powered; When power supply unit 5 electric weight are not enough, active spike antenna stops carrying out electrical field test, by charhing unit 6, for power supply unit 5, is charged.
Signal condition unit 4 comprises the one-level impedance inverter circuit, secondary impedance inverter circuit and the gain circuitry that connect successively, one-level impedance inverter circuit, secondary impedance inverter circuit and gain circuitry are printed on same impedance inverter circuit plate 41, the input impedance of one-level impedance inverter circuit is the megaohm order of magnitude, and output impedance is a kilo-ohm order of magnitude; The input impedance of secondary impedance inverter circuit is a kilo-ohm order of magnitude, and output impedance is ohmage magnitude; Gain circuitry is used for carrying out signal amplification.
Between impedance inverter circuit plate 41, battery pack 51, power module 61, do not contact mutually and be individually fixed in antenna base 3 inside, antenna base 3 is metallic conductor, wherein impedance inverter circuit plate 41 is positioned at antenna base 3 inner upper middle parts, and the two ends of impedance inverter circuit plate 41 are connected with the upper cover of antenna base 3 by conductive component; Power supply unit 5 and charhing unit 6 are connected with antenna base 3 bottoms.
For convenience of the use of active spike antenna, adapted seat 8 can be set under antenna base, by this adapted seat 8, active spike antenna can be arranged on antenna holder easily, pedestal below surrounding has four foots pad 9, after test completes, by these foots pad 9, antenna base 3 can be placed in the plane of instrument stan stably.
For making active spike antenna there is large moving band scope, both there is high sensitivity, faint electric field signal can be detected, there is again the high test upper limit, can meet the detection demand of large-signal, signal output interface 10 using BNC coaxial port as antenna base 3, BNC coaxial port is connected with the signal output part (large-signal end points) of secondary impedance inverter circuit and the signal output part (conventional end points) of gain circuitry respectively by single-pole double-throw switch (SPDT) S1.When carrying out conventional faint electric field detection, the public termination conventional end point of single-pole double-throw switch (SPDT) S1, now circuit amplification quantity is larger, can effectively amplify the faint electric field signal detecting; When detecting compared with highfield, the public termination large-signal of single-pole double-throw switch (SPDT) S1 end points, now circuit amplification quantity is less, and circuit output can be unsaturated, can be to effectively amplifying compared with highfield signal of detecting.
For making antenna factor smooth, in one-level impedance inverter circuit of the present utility model and secondary impedance inverter circuit, be all provided with feedback unit, in order to make hardware circuit self-noise little, select low noise electronic devices and components to carry out circuit realization.Introduce the formation of one-level impedance circuit, secondary impedance circuit and gain circuitry below.
As shown in Figure 6, one-level impedance inverter circuit forms take field effect transistor Q1 as core.Resistance R 1, R2, R3, R5, R6 are for arranging the DC offset voltage of Q1.The space electric field signal that telescopic antenna 1 is responded to is coupled to the grid of field effect transistor Q1 by resistance R 4, resistance R 3 is for keeping the high input impedance of field effect transistor impedance inverter circuit.C1, C2, C4, C5 are filter capacitor, and C1, C2 be for the filtering of fet gate direct current biasing, C4, the C5 direct current biasing filtering that is used for draining.Power supply VCC1 is field effect transistor Q1 power supply.After power supply VCC1 series resistance R1, be divided into two-way, lead up to R2 ground connection, the R3 of leading up to is connected with the grid of field effect transistor Q1.Resistance R 4 one end are connected with telescopic antenna 1 by structure installed part, and the other end is connected with the grid of field effect transistor Q1.Resistance R 1 connects power supply VCC1 end and is connected with filter capacitor C1, C2 nearby, the other end ground connection of filter capacitor C1, C2.After power supply VCC1 series resistance R6, be connected with the drain electrode of field effect transistor Q1.Resistance R 6 connects power supply VCC1 end and is connected with filter capacitor C4, C5 nearby, the other end ground connection of filter capacitor C4, C5.The source electrode of field effect transistor Q1 is divided into two-way and connects, and leads up to R5 ground connection, separately leads up to the common port of capacitor C 3 connecting resistance R1, R2, R3, forms feedback network, for improving gain flatness.The earthing of casing of field effect transistor Q1.
Secondary impedance inverter circuit forms take high frequency transistor Q2 as core.Resistance R 8, R9, R10, R11 are for arranging the DC bias voltage of Q2.One-level impedance inverter circuit output signal is coupled to the base stage of Q2 by capacitance C6.C8, C9 are filter capacitor, for the collector electrode direct current biasing filtering of high frequency transistor Q2.The output signal of high frequency transistor Q2 feeds back to one-level impedance inverter circuit by resistance R 7, capacitor C 7, be used for improving gain flatness, the output signal of high frequency transistor Q2 is coupled to gain circuitry by capacitance C10, C11, Attenuation adjustable resistance R 12, R19 simultaneously.Power supply VCC1 is high frequency transistor Q2 power supply.After power supply VCC1 series resistance R9, be divided into two-way, lead up to R10 ground connection, a road is connected with the base stage of high frequency transistor Q2.The common port of the source electrode of capacitor C 6 one termination field effect transistor Q1, capacitor C 3, resistance R 5, the common port of the base stage of another termination high frequency transistor Q2, resistance R 9, R10.After power supply VCC1 series resistance R11, connect the collector electrode of high frequency transistor Q2, the collector electrode of a termination Q2 after capacitor C 8, C9 parallel connection, other end ground connection.The emitter of resistance R 8 one termination Q2, other end ground connection.The emitter of a termination Q2 after capacitor C 7 and resistance R 7 series connection, the drain electrode of another termination field effect transistor Q1.The collector electrode of a termination Q2 after capacitor C 10, C11 parallel connection, connects 6 pin of low noise amplification chip U1 after other end series resistance R12, R19.
As shown in Figure 7, gain circuitry forms take low noise amplification chip U1 as core.U1 is by power supply voltage stabilizing chip U3 power supply.Gain circuitry is inputted the signal from secondary impedance inverter circuit by 6 pin of U1.Signal after amplifying by the 3 pin outputs of U1.After resistance R 12, R19 series connection, 6 pin of a termination U1, the common port of another termination capacitance C10, C11.After capacitance C14, C15 parallel connection, 3 pin of a termination U1, the other end is as signal output interface.The 1 pin ground connection of U1,2 pin of U1,5 pin, 8 pin are unsettled.6 pin of resistance R 13 1 termination U1, other end ground connection, for adjusting signal termination condition.After capacitor C 12, C13 parallel connection, 7 pin of a termination U1, other end ground connection, capacitor C 12, C13 are for arranging the interchange grounded circuit of chip U1.The 1 pin input power VCC1 of voltage stabilizing chip U3, connects 4 pin of U1 after the 3 pin series resistance RP1 of U3.The 2 pin ground connection of U3.
The common port of capacitor C 10, C11 and resistance R 12 is connected with " large-signal " end of single-pole double-throw switch (SPDT) S1 by wire, after capacitance C14, C15 parallel connection, 3 pin of one termination U1, the other end is connected with " routine " end of single-pole double-throw switch (SPDT) S1 by wire, the common port of single-pole double-throw switch (SPDT) S1 is connected with the inner wire (1 pin) of signal output coaxial connector J2 on impedance inverter circuit plate 41, outer conductor (2 pin) ground connection of J2.
The interference bringing for reducing the direct power supply station of common power module, improve the overall performance of antenna, power pack of the present utility model comprises power supply unit and charhing unit, and impedance inverter circuit plate adopts the supply power mode of battery pack, and the circuit of power supply unit and charhing unit is as described below:
Charhing unit, except comprising power module 61, also comprises resistance R, diode D+ and D-, indicator light L2.Power module 61 is inputted 220V, 50Hz alternating current, and output 24V direct current, after the anodal output V+ of power module 61 series resistance R, diode D+, is divided into two-way, and a road is connected with the OFF end of S1, and another road is connected with indicator light L2.Power module 61 negative pole outputs connect casing by diode D-.Indicator light L2 is bright, and expression power module 61 is inputted 220V, 50Hz alternating current, if now single-pole double-throw switch (SPDT) S1 common port is connected with OFF end, power module 61 charges for battery pack 51.
As shown in Figure 9, Figure 10, before test, the telescopic antenna 1 of active spike antenna, ground connection flat board 2, antenna base 3 three parts need to be carried out physical connection, and during test, all settings and wiring are all at operation of front panel.During active spike antenna charging, by the 220VAC power input interface 11 of rear board, power.Single-pole double-throw switch (SPDT) S2 is positioned at the lower right of pedestal front panel, and when single-pole double-throw switch (SPDT) S2 is during in ON position, relay indicating light L1 is bright, and now antenna is in electrical field test state.When single-pole double-throw switch (SPDT) S2 is during in OFF position, relay indicating light L1 goes out, and represents that antenna is in off-mode.When antenna does not use, should make single-pole double-throw switch (SPDT) S2 in OFF position, guarantee that antenna is in off-mode.Single-pole double-throw switch (SPDT) S1 is positioned at the upper right side of pedestal front panel, selects the mode of operation of antenna by single-pole double-throw switch (SPDT) S1.Common army's mark test selection conventionally test pattern.Under conventionally test pattern, antenna has high sensitivity and extremely low back noise.When exceeding standard rectification, Devices to test EMI selects large-signal pattern.Under large-signal pattern, antenna can bear larger input electric field.When single-pole double-throw switch (SPDT) S2 is during in ON position, when relay indicating light, L1 is bright, represents that antenna is in electrical field test state.If when single-pole double-throw switch (SPDT) S2 is during in ON position, relay indicating light L1 does not work, represent battery electric quantity deficiency, need charging.When single-pole double-throw switch (SPDT) S2 is during in OFF position, relay indicating light L1 does not work, and represents that antenna is in off-mode.By BNC output interface, export antenna receiving signal to 50 Ω receivers, spectrum analyzer or radio frequency voltmeter.By rear board battery charging inlet, can to the rechargeable battery set 51 of antenna inside, charge easily.During charging, only single-pole double-throw switch (SPDT) S2 need be set in OFF position, 220V reference power supply line is inserted with to power module 61 inputs on source antenna rear board, to active antenna, provide 220V/50Hz power supply.Attention time must make front panel mains switch in OFF position in charging, otherwise charging circuit do not work, even if provide 220V AC power to active antenna, also cannot charge to inner rechargeable battery set 51.
Claims (10)
1. an active spike antenna, comprise telescopic antenna (1), ground connection flat board (2), antenna base (3), the shell of described antenna base (3) consists of upper cover and casing, described upper cover and casing be physics conducting on circuit, described ground connection flat board (2) is positioned at antenna base (3) top, and with the shell conducting of antenna base (3)
It is characterized in that: described antenna base is provided with array signal processing unit in (3), described array signal processing unit comprises signal condition unit (4), power supply unit (5) and charhing unit (6); The afterbody of described telescopic antenna (1) is fixedly connected with signal condition unit (4) through ground connection flat board (2);
Described signal condition unit (4) comprises the one-level impedance inverter circuit, secondary impedance inverter circuit and the gain circuitry that connect successively,
It is upper that described one-level impedance inverter circuit, secondary impedance inverter circuit and gain circuitry are printed on same impedance inverter circuit plate (41),
Described power supply unit (5) is take battery pack (51) as core, and described charhing unit (6) comprises power module (61), and described battery pack (51) is impedance inverter circuit plate (41) power supply, and described power module (61) is battery pack (51) charging;
Between described impedance inverter circuit plate (41), battery pack (51), power module (61), do not contact mutually and be individually fixed in antenna base (3) inside, described antenna base (3) is metallic conductor, wherein impedance inverter circuit plate (41) is positioned at antenna base (3) inner upper middle part, and the two ends of impedance inverter circuit plate (41) are connected with the upper cover of antenna base (3) by conductive component;
Described power supply unit (5) and charhing unit (6) are connected with the bottom half of antenna base (3).
2. active spike antenna according to claim 1, is characterized in that:
The signal output interface of described antenna base (3) is connected with the signal output part of secondary impedance inverter circuit and the signal output part of gain circuitry respectively by single-pole double-throw switch (SPDT) S1.
3. active spike antenna according to claim 1 and 2, is characterized in that:
Described one-level impedance inverter circuit comprises signal leading unit, voltage signal converting unit, and described secondary impedance inverter circuit comprises current signal amplifying unit,
Described voltage signal converting unit comprises field effect transistor Q1, for resistance unit, drain resistance unit, the source resistance unit of field effect transistor Q1 quiescent point are set; The other end of described resistance unit and drain resistance unit is connected with power output end respectively, the other end ground connection of described source resistance unit;
One end of described signal leading unit is connected with telescopic antenna 1, and the other end of described signal leading unit is connected with the grid of field effect transistor Q1;
Described current signal amplifying unit comprises transistor Q2, for base resistance unit, collector resistance unit, the emitter resistance unit of quiescent point of transistor Q2 is set; Described base resistance unit is connected with power supply side with the other end of collector resistance unit, the other end ground connection of described emitter resistance unit;
Also comprise the first power filtering capacitor group and second source filter capacitor group, described the first power filtering capacitor group is connected between power supply VCC and resistance unit, and described second source filter capacitor group is connected between power supply VCC and drain resistance unit;
Also comprise the first coupling unit being arranged between field effect transistor Q1 source electrode and transistor Q2 base stage,
Also comprise the second coupling unit being arranged between transistor Q2 emitter and gain circuitry input,
Also comprise the first feedback unit being arranged between field effect transistor Q1 source electrode and resistance unit,
Also comprise the second feedback unit being arranged between transistor Q2 emitter and field effect transistor Q1 drain electrode.
4. active spike antenna according to claim 3, is characterized in that: described resistance unit comprises R1, R2, R3, described R1 and R3 series connection, and an end of described R2 is connected between R1 and R3, the other end ground connection of described R2,
Described drain resistance unit comprises resistance R 6,
Described source resistance unit comprises resistance R 5,
Described signal leading unit comprises resistance R 4,
Described base resistance unit comprises resistance R 9 and resistance R 10, and one end of described resistance R 10 is connected with the base stage of transistor Q2, the other end ground connection of described resistance R 10,
Described collector resistance unit comprises resistance R 11,
Described emitter resistance unit comprises resistance R 8,
Described the first power filtering capacitor group comprises two capacitor C 1 and C2 in parallel,
Described second source filter capacitor group comprises two capacitor C 4 and C5 in parallel,
Described the first coupling unit comprises capacitor C 6,
Described the second coupling unit comprises two capacitor C 10 and C11 in parallel,
Described the second feedback unit comprises resistance R 7 and the capacitor C 7 that resistance is cascaded;
Described the first feedback unit comprises capacitor C 3, and described capacitor C 3 is the common port of resistance R 1, resistance R 2, resistance R 3 with the contact of resistance unit.
5. active spike antenna according to claim 4, it is characterized in that: described gain circuitry is take amplification chip U1 as core, the input of described amplification chip U1 is by the output signal coupling of attenuation units and secondary impedance inverter circuit, between the input of described attenuation units and amplification chip U1, be also connected with resistance R 13, the other end ground connection of described resistance R 13;
The input port of described amplification chip U1 is provided with ac circuit unit, the other end ground connection of described ac circuit unit;
The feeder ear of described amplification chip U1 is connected with power supply by power supply voltage stabilizing chip U3, between described power supply voltage stabilizing chip U3 and the feeder ear of amplification chip U1, be also provided with slide rheostat RP1, the feeder ear of described amplification chip U1 is also provided with the 3rd power filtering capacitor group, the other end ground connection of described the 3rd power filtering capacitor group;
The output of described amplification chip U1 is by the 3rd signal coupling element output signal.
6. active spike antenna according to claim 5, is characterized in that:
Described ac circuit comprises two capacitor C 12 and the C13 that are connected in parallel,
Described the 3rd power filtering capacitor group comprises two capacitor C 18 and the C19 that are connected in parallel,
Described the 3rd signal coupling unit comprises two capacitor C 14 and the C15 that are connected in parallel,
Described attenuation units comprises the resistance R 12 and the R19 that are cascaded.
7. active spike antenna according to claim 6, is characterized in that: described field effect transistor Q1 is low noise field effect transistor, and described transistor Q2 is high frequency transistor, and described amplification chip U1 is low noise amplification chip.
8. active spike antenna according to claim 1, it is characterized in that: described power supply unit (5) also comprises single-pole double-throw switch (SPDT) S2, indicator light L1, described battery pack (51) is connected with the positive source input of impedance inverter circuit plate (41) and the positive source output of charhing unit (6) respectively by single-pole double-throw switch (SPDT) S2
Described single-pole double-throw switch (SPDT) S2 and indicator light L1 are installed on conduction casing front panel, and one end of described indicator light L1 is connected with the positive source input of impedance inverter circuit plate, other end ground connection;
Described charhing unit (6) also comprises the charging indicator light L2 that is arranged on conduction casing front panel, one end of described charging indicator light L2 with by resistance R and diode D+, be connected with the positive source output of power module (61), the other end ground connection of L2; The 220VAC power input interface (11) of described power module is positioned on conduction cabinet rear panel.
9. active spike antenna according to claim 1, is characterized in that: the material of described ground connection flat board (2), antenna base, conductive component is aluminium, and described ground connection flat board (2) is for passing through two blocks of aluminium sheets of gemel connection.
10. active spike antenna according to claim 2, it is characterized in that: described single-pole double-throw switch (SPDT) S1 is installed on pedestal front panel, the common port of described single-pole double-throw switch (SPDT) S1 is connected with the inner wire of coaxial connector J2, and the outer conductor of described coaxial connector J2 connects pedestal casing.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320564882.5U CN203574111U (en) | 2013-06-28 | 2013-09-11 | Active rod antenna |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320384483.0 | 2013-06-28 | ||
| CN201320384483 | 2013-06-28 | ||
| CN201320564882.5U CN203574111U (en) | 2013-06-28 | 2013-09-11 | Active rod antenna |
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| CN203574111U true CN203574111U (en) | 2014-04-30 |
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| CN201320564882.5U Expired - Fee Related CN203574111U (en) | 2013-06-28 | 2013-09-11 | Active rod antenna |
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| CF01 | Termination of patent right due to non-payment of annual fee |