CN203572867U

CN203572867U - Input power supply power down detection circuit

Info

Publication number: CN203572867U
Application number: CN201320754590.8U
Authority: CN
Inventors: 梁祥坤; 蒋中为
Original assignee: SHENZHEN GOLD POWER TECHNOLOGY Co Ltd
Current assignee: SHENZHEN GOLD POWER TECHNOLOGY Co Ltd
Priority date: 2013-11-25
Filing date: 2013-11-25
Publication date: 2014-04-30
Anticipated expiration: 2023-11-25

Abstract

The utility model provides an input power supply power down detection circuit comprising a sampling circuit and further comprising a power down signal output circuit. The sampling circuit includes a voltage dividing circuit, a reference voltage and a comparator. A high-voltage end of the voltage dividing circuit is connected with an input power supply, and the lower-voltage end of the voltage dividing circuit and the reference voltage are respectively input to an in-phase end or an out-phase end of the comparator. The power down signal output circuit includes a timer and a multiplier. The timer is triggered by the output end of the comparator, the output of the timer and the output end of the comparator are respectively input to the multiplier when a set time is up, and the output of the multiplier is a power down signal. Compared with the prior art, the input power supply power down detection circuit of the utility model has the advantages of high detection speed, high reliability, low power consumption, and alternating-current/direct-current compatibility.

Description

A kind of input power power-fail detection circuit

Technical field

The utility model relates to a kind of input power power-fail detection circuit.

Background technology

At present, Switching Power Supply, inverter, UPS technical field, often use input power-fail detection circuit, detecting after input power power down, start immediately backup battery, and input power is switched to backup battery formation uninterrupted power source, for equipment provides continual power supply.At present power-fail detection circuit used, exists detection speed slow, poor reliability, power consumption be large, can not compatible AC and DC input etc. technical matters.

Utility model content

In order to overcome existing deficiency, the utility model provides a kind of input power power-fail detection circuit, and AC power or the direct supply of input are detected.

The utility model for the technical scheme that realizes its technical purpose and adopt is: a kind of input power power-fail detection circuit, comprise sample circuit, and also comprise power-off signal output circuit; Described sample circuit comprises bleeder circuit, reference voltage, comparer; The high pressure termination input power of described bleeder circuit, the low pressure end of bleeder circuit and described reference voltage are inputted respectively in-phase end or the out-phase end of described comparer; Described power-off signal output circuit comprises timer and multiplier; Described timer is triggered by the output terminal of described comparer, to output after setting-up time and the output terminal of described comparer, is input to respectively multiplier, and described multiplier is output as power supply power-fail signal.

Further, in above-mentioned input power power-fail detection circuit: described input power is civil power, before described bleeder circuit, also comprise rectification circuit; Described rectification circuit comprises diode D4 and diode D5; The anode of described diode D4, D5 connects the L phase of civil power, and negative electrode connects the input end of described bleeder circuit.

Further, in above-mentioned input power power-fail detection circuit: described bleeder circuit comprises resistance R 4, resistance R 5, resistance R 6, resistance R 7, resistance R 2; Described resistance R 4, resistance R 5, resistance R 6, resistance R 7, resistance R 2 are contacted successively, the output of the rectification circuit described in a termination of resistance R 4, and one end ground connection of resistance R 2, bleeder circuit is output as the tie point of resistance R 7 and resistance R 2.

Further, in above-mentioned input power power-fail detection circuit: in the output of described bleeder circuit and be relatively also provided with current-limiting resistance R9 between the in-phase end of the utmost point.

Further, in above-mentioned input power power-fail detection circuit: be also provided with clamping circuit at described bleeder circuit output terminal, described clamping circuit comprises voltage stabilizing diode ZD1, the plus earth of described voltage stabilizing diode ZD1, and negative electrode is connected on described bleeder circuit output terminal.

Compared with prior art, the beneficial effects of the utility model are: detection speed is fast, high, low in energy consumption, the compatible AC and DC input of reliability.

Below with reference to drawings and Examples, the utility model is described in detail.

Accompanying drawing explanation

Fig. 1 is the utility model theory diagram.

Fig. 2 is the utility model embodiment 1 circuit theory diagrams.

Fig. 3 is whether sequential chart during power down of electric circuit inspection alternating current input power supplying that adopts the utility model embodiment 1.

Fig. 4 is whether sequential chart during power down of electric circuit inspection direct-current input power supplying that adopts the utility model embodiment 1.

Embodiment

Embodiment 1, as Fig. 1, shown in 2, the present embodiment is a kind of for detection of the whether input power power-fail detection circuit of power down of input power, as shown in Figure 1, after access input power, to sample, during sampling, input voltage is passed through to bleeder circuit dividing potential drop as shown in Figure 2, what in the present embodiment, adopt is to detect namely normally used civil power of alternating current, before civil power access, the electric signal that the rectification circuit that adopts diode D4 to form with diode D5 is inputted with N mutually to the L from civil power carries out rectification, then by divider resistance dividing potential drop, to be the lower voltage of comparer input, as shown in Figure 2, the voltage that is input to comparer is R2/(R4+R5+R6+R7+R2).If resistance R 4, resistance R 5, resistance R 6, the resistance of resistance R 7 is 100K, the resistance of resistance R 2 is 8.2K, the peak value that is input to the voltage of the in-phase end of comparer is 220*82/4082=4.42V, consider that electrical network is unstable, at bleeder circuit output terminal, a clamping circuit is also set, as shown in Figure 2, clamping circuit adopts voltage stabilizing diode ZD1, voltage higher than 7.5V is scabbled, the reference voltage VREF that the present embodiment adopts is 5V, when being input to the out-phase end of comparer, reference voltage also adopted bleeder circuit, this bleeder circuit is comprised of resistance R 8 and resistance R 10, the resistance of resistance R 8 is 1K, the resistance of R10 is 0.56K, the voltage that is input to comparer is 5*0.56/1.56=1.8V.As shown in Figure 3, final comparer is exported as shown in Figure 3.When civil power power down, comparer output low level, this low level triggers timer and starts timing, when timer then produces then signal, multiplies each other after anti-phase with the output of comparer and also just can obtain power-off signal.

Fig. 2 is the physical circuit figure of this enforcement, in the present embodiment, adopt a single-chip microcomputer to complete timer, the tasks such as multiplier, as shown in Figure 2, at the anode of the diode D4 as rectification circuit and diode D5, connect respectively and exchange input L, N, exchange input sinusoidal signal after two diode rectifications, in-phase end through divider resistance to voltage comparator U3, fixed reference voltage 5V of out-phase termination of U3, voltage comparator U3 output terminals A CDCT will obtain square-wave signal as shown in Figure 3, the voltage of the reference voltage of U3 is rationally set, make it in full voltage input range, output terminals A CDCT low level time is less than 5mS, this signal is received to single-chip microcomputer U2 the 11st pin, by software, realize following functions, when U2 detects square wave negative edge, start to start timer, if there is no rising edge in 5mS, be judged as power down, U2 the 5th pin ACOUT signal level upset, power-off signal provides.

The present embodiment detects direct supply, and whether power down is also very convenient, need not carry out any change to circuit, direct supply+,-hold, while normally working, d. c. voltage signal is through two diodes and electric resistance partial pressure, the 3 pin voltages of U3 will be followed input voltage, and while normally working, the 3 pin voltages of U3 are higher than 2 pin voltages, ACDCT end will be exported high level, during input power down, the 3 pin voltages of U3 are lower than 2 pin voltages, and negative edge will appear in ACDCT end, be low level afterwards always.When U2 detects negative edge, start to start timer, in 5mS, there is no rising edge, be judged as power down, U2 the 5th pin ACOUT signal level upset, power-off signal provides.The sequential of voltage as shown in Figure 4.

Claims

1. an input power power-fail detection circuit, comprises sample circuit, it is characterized in that: also comprise power-off signal output circuit;

Described sample circuit comprises bleeder circuit, reference voltage, comparer; The high pressure termination input power of described bleeder circuit, the low pressure end of bleeder circuit and described reference voltage are inputted respectively in-phase end or the out-phase end of described comparer;

Described power-off signal output circuit comprises timer and multiplier; Described timer is triggered by the output terminal of described comparer, to output after setting-up time and the output terminal of described comparer, is input to respectively multiplier, and described multiplier is output as power supply power-fail signal.

2. input power power-fail detection circuit according to claim 1, is characterized in that: described input power is civil power, also comprises rectification circuit before described bleeder circuit; Described rectification circuit comprises diode D4 and diode D5; The anode of described diode D4, D5 connects the L phase of civil power, and negative electrode connects the input end of described bleeder circuit.

3. input power power-fail detection circuit according to claim 2, is characterized in that: described bleeder circuit comprises resistance R 4, resistance R 5, resistance R 6, resistance R 7, resistance R 2; Described resistance R 4, resistance R 5, resistance R 6, resistance R 7, resistance R 2 are contacted successively, the output of the rectification circuit described in a termination of resistance R 4, and one end ground connection of resistance R 2, bleeder circuit is output as the tie point of resistance R 7 and resistance R 2.

4. input power power-fail detection circuit according to claim 3, is characterized in that: in the output of described bleeder circuit and be relatively also provided with current-limiting resistance R9 between the in-phase end of the utmost point.

5. input power power-fail detection circuit according to claim 3, it is characterized in that: at described bleeder circuit output terminal, be also provided with clamping circuit, described clamping circuit comprises voltage stabilizing diode ZD1, the plus earth of described voltage stabilizing diode ZD1, negative electrode is connected on described bleeder circuit output terminal.