CN203552521U - Comprehensive experiment system for single chip microcomputer - Google Patents

Comprehensive experiment system for single chip microcomputer Download PDF

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Publication number
CN203552521U
CN203552521U CN201320744372.6U CN201320744372U CN203552521U CN 203552521 U CN203552521 U CN 203552521U CN 201320744372 U CN201320744372 U CN 201320744372U CN 203552521 U CN203552521 U CN 203552521U
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CN
China
Prior art keywords
case
chip microcomputer
hanging box
single chip
module
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Expired - Fee Related
Application number
CN201320744372.6U
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Chinese (zh)
Inventor
曾任贤
莫钊
樊飞燕
陈谣
刘志明
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Nanchang Institute of Technology
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Nanchang Institute of Technology
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Priority to CN201320744372.6U priority Critical patent/CN203552521U/en
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Publication of CN203552521U publication Critical patent/CN203552521U/en
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Abstract

The utility model relates to a comprehensive experiment system for a single chip microcomputer. The system comprises an experiment circuit area formed by a main hanging box and an auxiliary hanging box distributed transversely; at least two single chip microcomputer sockets into which single chip microcomputer modules are plugged are arranged in the main hanging box; a plurality of module sockets into which application modules are plugged are arranged in the auxiliary hanging box; and an expansion bus interface suitable for carrying out data communication with the auxiliary hanging box is arranged in the main hanging box. According to the comprehensive experiment system for a single chip microcomputer, plugging of single chip microcomputer modules of various types can be met via the main hanging box, and plugging of application modules can be met by the auxiliary hanging box, the content of the single chip microcomputer experiment is enriched, a plurality of modules can act together, the design of the complicated system can be met, and as the module sockets in the auxiliary hanging box can also be used for expanding modules, the need of upgrading the system can be met.

Description

A kind of singlechip comprehensive experimental system
Technical field
The utility model relates to a kind of singlechip comprehensive experimental system.
Background technology
In electric specialized courses, experiment is the important component part in teaching process.At present, in domestic Electronics teaching, experimental project is a lot, but integrated level is lower, some is applicable to simulation electronic course, and some is applicable to digital and electronic course, some is also applicable to single chip madine, be the experimental project that relates to of different courses must for different experimental instruments, and each experimental instruments is separate, the wasting of resources is large, automaticity is low, cannot carry out comparatively comprehensive Course Exercise and graduation project.
Utility model content
The technical problems to be solved in the utility model is to provide a kind of singlechip comprehensive experimental system, and this comprehensive experimental system has solved the technical matters that a set of experimental system completes the multinomial experiment of multi-door course.
In order to solve the problems of the technologies described above, the utility model provides a kind of singlechip comprehensive experimental system, comprising: by main extension case, the secondary case of hanging, be the experimental circuit district that left and right distribution forms; In described main extension case, be provided with at least two for the single-chip microcomputer socket of the one-chip computer module of pegging graft, described secondary extension in case is provided with several for the module jack of the application module of pegging graft; Described main extension case is provided with and is suitable for hanging with pair the expansion bus interface that case carries out data communication.
Further, described main extension case, secondary extension in case are respectively equipped with respective switch power supply, and described Switching Power Supply is respectively equipped with multi-channel output, is suitable for providing one-chip computer module or application module corresponding voltage.
Technique scheme of the present utility model has the following advantages compared to existing technology: the utility model has met the grafting of various types of one-chip computer modules by main extension case, and secondary grafting of hanging the application module of case, enriched the content of single chip computer experiment, and a plurality of module actings in conjunction of energy, met the design of complication system, and the secondary module jack of hanging on case can also be for expanding module, to meet the needs of system upgrade.
Accompanying drawing explanation
For content of the present utility model is more likely to be clearly understood, below the specific embodiment by reference to the accompanying drawings of basis, the utility model is described in further detail, wherein
Fig. 1 is main extension case of the present utility model, secondary socket and connection diagram of hanging case;
Fig. 2 is the one-piece construction schematic diagram of described singlechip comprehensive experimental system.
Wherein, the first half 8 of experimental system, main extension case 8-1, secondary case 8-2, the latter half 9 of experimental system, operator's console 9-1, display pallet 9-2, PC cabinet 9-3, keyboard tray 9-4, the module storage area 9-5 of hanging.
Embodiment
Below in conjunction with drawings and Examples, the present invention is described in detail:
See Fig. 1, a kind of singlechip comprehensive experimental system, comprising: by main extension case 8-1, the secondary case 8-2 that hangs, be the experimental circuit district that left and right distribution forms; In described main extension case 8-1, be provided with at least two for the single-chip microcomputer socket of the one-chip computer module of pegging graft, described secondary extension in case 8-2 is provided with several for the module jack of the application module of pegging graft; Described main extension case 8-1 is provided with and is suitable for hanging with pair the expansion bus interface that case 8-2 carries out data communication.Described expansion bus interface is hung being connected of case 8-2 by adopting 20P flat cable interface slot to realize main extension case 8-1 with pair.
At least 4 of described module jacks.
Described one-chip computer module can adopt DIN connector to be connected with single-chip microcomputer socket with application module and module jack.This DIN connector can adopt the technical scheme of Chinese patent literature CN2773938Y DIN connector, also can adopt D type plate connector, i.e. the technical scheme of Chinese patent literature CN201478501UD type plate connector.
Described main extension case 8-1, the secondary case 8-2 that hangs are provided with Switching Power Supply, and described Switching Power Supply is respectively equipped with multi-channel output, is suitable for providing one-chip computer module or application module corresponding voltage.
The described secondary case of hanging also comprises: decoding CPLD, switching value input group, LED light group.
See Fig. 2, described singlechip comprehensive experimental system is mesa structure, adopts upper and lower two parts separation design.Described experimental circuit district is positioned at the first half 8 of experimental system, the latter half 9 of experimental system is support sections, comprise that operator's console 9-1, display pallet 9-2, PC cabinet 9-3, keyboard tray 9-4, module storage area 9-5(are drawer, wherein will have label to need corresponding one by one, convenient management).
Described one-chip computer module can adopt five types of singlechip CPU plates, and five types of singlechip CPU plates comprise: 8 51 serial CPU, 8 CYGAL series CPU, 16 MSP430 series CPU, 16 AVR series CPU, 32 ARM M3 series CPU. 
32 ARM M3 series CPU: can have LM3S615, LM3S2948, LM3S3749, LM3S6952, LM3S9B90 by supporting chip; 16 MSP430 series CPU: can have MSP430F155, MSP430FW427, MSP430F5419 by supporting chip; 8 CYGAL series CPU: can have C8051F021 by supporting chip; 8 serial CPU: can have 89S51/52/53 by supporting chip; 16 AVR series CPU: can have Atmega128 by supporting chip.
On main extension case, also possesses the function that can offer some routines, infrastest, experiment is installed and connects relatively fixing, simple related hardware chip or device, as multiclass memory cell, 8 AD and DA converter, switching value input block, 128*32LCD unit, 8 LED display units, keyboard unit, 8 toggle switch input blocks, hummer driver element, 1 road RS232 interface unit, 1 road RS485 interface unit etc., for completing various single-chip microcomputer beginners' infrastest.
Described application module comprises: timer extension class, interrupt expansion class, keyboard, show extension class (LED lattice display module, LCD MODULE), I/O extension class, 12 AD/DA class (TLC2543, TLV5616), various interface class (232 interface modules, RS485 bus module), communication class, isolation/driven object (light-coupled isolation module), topworks's object (relay module, DC MOTOR CONTROL module, step motor control module, ), sensor class (temperature sensor module, wet sensitive, pressure sensor module, ultrasound wave, photoelectric sensor module, infrared sensor module, infrared tube sensor assembly, inflammable gas detection module) etc.User is these modules of choice for use as required.
Wherein, described application module, one-chip computer module all adopt the bus interface of standard, have increased the extendability of experimental provision.
Obviously, above-described embodiment is only for the utility model example is clearly described, and is not the restriction to embodiment of the present utility model.For those of ordinary skill in the field, can also make other changes in different forms on the basis of the above description.Here exhaustive without also giving all embodiments.And these belong to apparent variation that spirit of the present utility model extended out or change still among protection domain of the present utility model.

Claims (2)

1. a singlechip comprehensive experimental system, is characterized in that comprising: by main extension case, the secondary case of hanging, be the experimental circuit district that left and right distribution forms;
In described main extension case, be provided with at least two for the single-chip microcomputer socket of the one-chip computer module of pegging graft, described secondary extension in case is provided with several for the module jack of the application module of pegging graft;
Described main extension case is provided with and is suitable for hanging with pair the expansion bus interface that case carries out data communication.
2. singlechip comprehensive experimental system according to claim 1, it is characterized in that: described main extension case, secondary extension in case are respectively equipped with respective switch power supply, described Switching Power Supply is respectively equipped with multi-channel output, is suitable for providing one-chip computer module or application module corresponding voltage.
CN201320744372.6U 2013-11-21 2013-11-21 Comprehensive experiment system for single chip microcomputer Expired - Fee Related CN203552521U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201320744372.6U CN203552521U (en) 2013-11-21 2013-11-21 Comprehensive experiment system for single chip microcomputer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201320744372.6U CN203552521U (en) 2013-11-21 2013-11-21 Comprehensive experiment system for single chip microcomputer

Related Child Applications (1)

Application Number Title Priority Date Filing Date
CN201420122693.7U Division CN203786978U (en) 2013-11-21 2013-11-21 Singlechip microcomputer integrated experimental system

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CN203552521U true CN203552521U (en) 2014-04-16

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104575206A (en) * 2015-01-15 2015-04-29 梁璐 Multi-core single chip microcomputer development experiment box

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104575206A (en) * 2015-01-15 2015-04-29 梁璐 Multi-core single chip microcomputer development experiment box

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GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20140416

Termination date: 20141121

EXPY Termination of patent right or utility model