CN203535395U - NTP-format time message output apparatus - Google Patents
NTP-format time message output apparatus Download PDFInfo
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- CN203535395U CN203535395U CN201320699258.6U CN201320699258U CN203535395U CN 203535395 U CN203535395 U CN 203535395U CN 201320699258 U CN201320699258 U CN 201320699258U CN 203535395 U CN203535395 U CN 203535395U
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Abstract
The utility model provides an NTP-format time message output apparatus including a single-chip microcomputer, a FLASH, two SDRAMs, a network control chip, and an isolation transformer. The NTP-format time message output apparatus is characterized in that the ETX0 pin, ETX1 pin, ERX0 pin, and ERX1 pin of the single-chip microcomputer are corresponding to the RXD0 pin, RXD1 pin, TXD0 pin, and TXD1 pin of the network control chip, the output end of the network control chip is connected with the isolation transformer, 16-bit addresses of the two SDRAMs are successively connected with the low 16-bit address of the single-chip microcomputer, the 16-bit address of one of the two SDRAMs is connected with the low 16-bit data bit of the single-chip microcomputer, the 16-bit address of the other of the two SDRAMs is connected with the high 16-bit data bit of the single-chip microcomputer, the 16-bit address of the FLASH is connected to the low 16-bit address of the single-chip microcomputer, and the 16-bit data bit is connected to the high 16-bit data bit of the single-chip microcomputer. The apparatus provides time signals for computers on a network in a one-to-many manner, and greatly improves the use efficiency compared with other time setting manners.
Description
Technical field
The utility model provides a kind of time message output unit of NTP form, belong to satellite synchronizing clock to time technical field.
Background technology
At present to secondary equipment in power system provide to time mostly be pulse, serial ports message, B code, but there is a defect in these three kinds of signals, be exactly they be all point-to-point to time mode, signal give a device provide to time.But often the secondary device of power plant or transformer station is too many, the time signal limited amount that satellite synchronizing clock provides, and NTP network time signal is the mode of a point-to-multipoint.Only need to provide a road NTP time signal to computer network, all computing machines on computer network can time of reception signal, give own to time, this has just greatly reduced the output signal quantity of the satellite synchronizing clock using, and has greatly saved cost.
Utility model content
The purpose of this utility model is to provide and a kind ofly can overcomes above-mentioned defect, for secondary equipment in power system provide easy to time, greatly improve the time message output unit of the NTP form of secondary equipment in power system reliability of operation and accuracy simultaneously.Its technical scheme is:
Comprise single-chip microcomputer, FLASH, 2 SDRAM, network control chip and isolating transformer, it is characterized in that: single-chip microcomputer adopts AT91RM9200PQ208_0, FLASH adopts 28F128J3A, SDRAM adopts HY57V281620, network control chip adopts DM9161AE, isolating transformer adopts WE-SMT16, wherein the P21/RXD1 pin of single-chip microcomputer receives the serial ports message of satellite synchronizing clock, the PA2 pin of single-chip microcomputer receives the PPS of satellite synchronizing clock, the ETX0 pin of single-chip microcomputer and ETX1 pin correspondence connect RXD0 and the RXD1 pin of network control chip, the ERX0 pin of single-chip microcomputer and ERX1 pin correspondence connect TXD0 and the TXD1 pin of network control chip, the TX+ pin of network control chip, TX-pin, RX+ pin, RX-pin correspondence connects the TD+ pin of isolating transformer, TD-pin, RD+ pin and RD-pin, the TX+ pin of isolating transformer, TX-pin, RX+ pin, RX-pin connects output, ADDR2 pin~ADDR11 pin of single-chip microcomputer is the corresponding A0 pin~A9 pin that meets 2 SDRAM respectively, ADDR13 pin~ADDR15 pin of single-chip microcomputer is the corresponding A10 pin~A12 pin that meets 2 SDRAM respectively, ADDR16 pin~ADDR17 pin of single-chip microcomputer is the corresponding BA0 pin~BA1 pin that meets 2 SDRAM respectively, the ADDR0 pin of single-chip microcomputer connects the LDAM pin of a SDRAM, DATA0 pin~DATA15 pin of single-chip microcomputer connects respectively DQ0 pin~DQ15 pin of this SDRAM and DATA0 pin~DATA15 pin of FLASH, the ADDR1 pin of single-chip microcomputer and DATA16 pin~DATA31 pin connect respectively LDAM pin and the DQ0 pin~DQ15 pin of another SDRAM, and ADDR0 pin~ADDR24 pin correspondence of single-chip microcomputer connects A0 pin~A24 pin of FLASH.
Compared with prior art, its advantage is the utility model: this device, for computing machine on network provides time signal, is a point-to-multipoint, with respect to serial ports message point-to-point to time greatly improved service efficiency.Novel in design unique, simple in structure, it is applied widely.
Accompanying drawing explanation
Fig. 1 is the wiring diagram of the utility model embodiment.
In figure: 1, single-chip microcomputer 2, FLASH 3, SDRAM 4, network control chip 5, isolating transformer
Embodiment
In the embodiment shown in fig. 1: single-chip microcomputer 1 adopts AT91RM9200PQ208_0, FLASH2 adopts 28F128J3A, SDRAM3 adopts HY57V281620, network control chip 4 adopts DM9161AE, isolating transformer 5 adopts WE-SMT16, wherein the P21/RXD1 pin of single-chip microcomputer 1 receives the serial ports message of satellite synchronizing clock, the PA2 pin of single-chip microcomputer 1 receives the PPS of satellite synchronizing clock, the ETX0 pin of single-chip microcomputer 1 and ETX1 pin correspondence connect RXD0 and the RXD1 pin of network control chip 4, the ERX0 pin of single-chip microcomputer 1 and ERX1 pin correspondence connect TXD0 and the TXD1 pin of network control chip 4, the TX+ pin of network control chip 4, TX-pin, RX+ pin, RX-pin correspondence connects the TD+ pin of isolating transformer 5, TD-pin, RD+ pin and RD-pin, the TX+ pin of isolating transformer 5, TX-pin, RX+ pin, RX-pin connects output, ADDR2 pin~ADDR11 pin of single-chip microcomputer 1 is the corresponding A0 pin~A9 pin that meets 2 SDRAM3 respectively, ADDR13 pin~ADDR15 pin of single-chip microcomputer 1 is the corresponding A10 pin~A12 pin that meets 2 SDRAM3 respectively, ADDR16 pin~ADDR17 pin of single-chip microcomputer 1 is the corresponding BA0 pin~BA1 pin that meets 2 SDRAM3 respectively, the ADDR0 pin of single-chip microcomputer 1 connects the LDAM pin of a SDRAM3, DATA0 pin~DATA15 pin of single-chip microcomputer 1 connects respectively DQ0 pin~DQ15 pin of this SDRAM3 and DATA0 pin~DATA15 pin of FLASH2, the ADDR1 pin of single-chip microcomputer 1 and DATA16 pin~DATA31 pin connect respectively LDAM pin and the DQ0 pin~DQ15 pin of another SDRAM3, and ADDR0 pin~ADDR24 pin correspondence of single-chip microcomputer 1 connects A0 pin~A24 pin of FLASH2.
Claims (1)
1. the time message output unit of a NTP form, comprise single-chip microcomputer (1), FLASH(2), 2 SDRAM(3), network control chip (4) and isolating transformer (5), it is characterized in that: single-chip microcomputer (1) adopts AT91RM9200PQ208_0, FLASH(2) adopt 28F128J3A, SDRAM(3) adopt HY57V281620, network control chip (4) adopts DM9161AE, isolating transformer (5) adopts WE-SMT16, wherein the P21/RXD1 pin of single-chip microcomputer (1) receives the serial ports message of satellite synchronizing clock, the PA2 pin of single-chip microcomputer (1) receives the PPS of satellite synchronizing clock, the ETX0 pin of single-chip microcomputer (1) and ETX1 pin correspondence connect RXD0 and the RXD1 pin of network control chip (4), the ERX0 pin of single-chip microcomputer (1) and ERX1 pin correspondence connect TXD0 and the TXD1 pin of network control chip (4), the TX+ pin of network control chip (4), TX-pin, RX+ pin, RX-pin correspondence connects the TD+ pin of isolating transformer (5), TD-pin, RD+ pin and RD-pin, the TX+ pin of isolating transformer (5), TX-pin, RX+ pin, RX-pin connects output, ADDR2 pin~ADDR11 pin of single-chip microcomputer (1) respectively correspondence meets 2 SDRAM(3) A0 pin~A9 pin, ADDR13 pin~ADDR15 pin of single-chip microcomputer (1) respectively correspondence meets 2 SDRAM(3) A10 pin~A12 pin, ADDR16 pin~ADDR17 pin of single-chip microcomputer (1) respectively correspondence meets 2 SDRAM(3) BA0 pin~BA1 pin, the ADDR0 pin of single-chip microcomputer (1) meets a SDRAM(3) LDAM pin, DATA0 pin~DATA15 pin of single-chip microcomputer (1) meets respectively this SDRAM(3) DQ0 pin~DQ15 pin and FLASH(2) DATA0 pin~DATA15 pin, the ADDR1 pin of single-chip microcomputer (1) and DATA16 pin~DATA31 pin meet respectively another SDRAM(3) LDAM pin and DQ0 pin~DQ15 pin, ADDR0 pin~ADDR24 pin correspondence of single-chip microcomputer (1) meets FLASH(2) A0 pin~A24 pin.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201320699258.6U CN203535395U (en) | 2013-11-07 | 2013-11-07 | NTP-format time message output apparatus |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201320699258.6U CN203535395U (en) | 2013-11-07 | 2013-11-07 | NTP-format time message output apparatus |
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CN203535395U true CN203535395U (en) | 2014-04-09 |
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CN201320699258.6U Expired - Lifetime CN203535395U (en) | 2013-11-07 | 2013-11-07 | NTP-format time message output apparatus |
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2013
- 2013-11-07 CN CN201320699258.6U patent/CN203535395U/en not_active Expired - Lifetime
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C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CX01 | Expiry of patent term | ||
CX01 | Expiry of patent term |
Granted publication date: 20140409 |