CN203522712U - Continuous multi-bit analog-to-digital converter for digital microphone - Google Patents
Continuous multi-bit analog-to-digital converter for digital microphone Download PDFInfo
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- CN203522712U CN203522712U CN201320465798.8U CN201320465798U CN203522712U CN 203522712 U CN203522712 U CN 203522712U CN 201320465798 U CN201320465798 U CN 201320465798U CN 203522712 U CN203522712 U CN 203522712U
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Abstract
The utility model relates to an analog-to-digital converter in the technical field of signal processing, especially to a continuous multi-bit analog-to-digital converter applied to a digital microphone. The analog-to-digital converter comprises a first functional unit and a second functional unit, wherein the first functional unit converts analog input signals into a multi-bit code stream, and the second functional unit is connected with the first functional unit, and used for converting the multi-bit code stream into a single-bit code stream and outputting the single-bit code stream; the first functional unit receives the analog input signal via the signal input end, and the signal output end of the first functional unit is connected with the signal input end of the second functional unit; and the first functional unit comprises multiple integrators of successive cascade, a multi-bit quantizer, a multi-bit analog-to-digital converter body and an adder , and the adder is positioned at the input end of the first integrator. The continuous multi-bit analog-to-digital converter reduces the order of the integrators, reduces the power consumption and system complexity, and increases the dynamic input range.
Description
Technical field
The utility model relates to signal processing technology field, is specifically related to a kind of analog to digital converter.
Background technology
Along with the requirement more and more higher to audio area of electronic equipment for consumption product, sigma delta modulator, as a kind of effective way that realizes the conversion of high-resolution analog digital, more and more receives publicity, and is widely used in audio signal processing technique field.
The analog to digital converter that is usually used in digital microphone in prior art is single-bit quadravalence sigma delta analog to digital converter, as shown in Figure 1, it comprises the first rank integrator (stg1), second-order integrator (stg2), the 3rd rank integrator (stg3) and the quadravalence integrator (stg4) of cascade successively; Also comprise a single-bit quantification device (1bit_adc), a digital to analog converter (1bit dac) and an adder; Input signal (in) is through above-mentioned analog to digital converter, final output signal (1bit dout) is one-bit digital PDM(Pulse-Density Modulated, pulse density modulated code) code stream, to meet the demand of digital microphone industry standard to single-bit PDM code stream.
Because integrator is the main power consumption unit in analog to digital converter, adopt the integrator of a plurality of exponent numbers certainly will improve power consumption and the complexity of system, cannot meet the requirement of electronic equipment for consumption to the high-resolution analog to digital converter of low-power consumption.
Utility model content
The purpose of this utility model is, a kind of many bit moduli transducer continuous time for digital microphone is provided, and solves above technical problem.
The technical problem that the utility model solves can realize by the following technical solutions:
A kind of many bit moduli transducer continuous time for digital microphone, be applied to digital microphone, wherein, comprise the second functional unit exported for many bit stream being converted into single-bit code stream for analog input signal being converted to the first functional unit of many bit stream and being connected with described the first functional unit, described the first functional unit comprises a signal input part, one signal output part, described the first functional unit receives analog input signal by described signal input part, and by described signal output part, connect the signal input part of described the second functional unit,
Described the first functional unit comprises integrator, multi-bit digital-to-analog converter, the adder of a multi-bit quantizer, for feeding back of a plurality of cascades successively; Described adder is positioned at wherein the input of integrator described in first;
Described multi-bit quantizer is for receiving the output signal of every one-level integrator and being quantified as digital signal; The digital signal that described multi-bit digital-to-analog converter obtains described multi-bit quantizer is converted to analog signal; The analog feedback signal that described adder is changed for receiving described multi-bit digital-to-analog converter, and analog input signal and analog feedback signal are asked to poor, draw error signal.
Preferably, described integrator adopts continuous time integrator.
Preferably, described integrator comprises an operational amplifier, and described operational amplifier is provided with in-phase input end, inverting input, and described in-phase input end connects a reference signal;
The inverting input of described integrator connects the output signal end of described integrator by an electric capacity; And/or the inverting input of described integrator connects the output signal of input signal or upper level integrator by a resistance.
Preferably, described the second functional unit comprises digital integrator, a single-bit encoder, bit encoder more than, a digital adder of a plurality of cascades successively, and described digital adder is positioned at the input of digital integrator described in first;
Described single-bit encoder is for receiving the output signal of each stages of digital integrator and encoding; The digital signal that described many bit encoder obtain single-bit encoder is converted to many bits of encoded signal; Described digital adder receives described many bits of encoded signal, and input signal and code signal are asked to poor, draws error signal.
Preferably, described digital integrator adopts the trigger of D type.
Preferably, described the first functional unit comprises m the integrator of cascade successively; Described multi-bit quantizer is a n multi-bit quantizer; Described multi-bit digital-to-analog converter is a n bit digital-to-analog converter; M wherein, n is respectively one and is more than or equal to 1 positive integer.
Preferably, described the second functional unit comprises m the digital integrator of cascade successively; Described many bit encoder are a n bit encoder;
M wherein, n is respectively one and is more than or equal to 1 positive integer.
Preferably, described the first functional unit comprises 2 integrators of cascade successively;
And/or described multi-bit quantizer is one 4 multi-bit quantizers; Described multi-bit digital-to-analog converter is one 4 bit digital-to-analog converters.
Preferably, described the second functional unit comprises 2 digital integrators of cascade successively; And/or described many bit encoder are one 4 bit encoder.
Beneficial effect: owing to adopting above technical scheme, the utility model has reduced the exponent number of integrator, has reduced power consumption and the system complexity of analog to digital converter has increased the dynamic range that analog to digital converter is inputted simultaneously.
Accompanying drawing explanation
Fig. 1 is the single-bit quadravalence sigma delta analog to digital converter schematic diagram of prior art;
Fig. 2 is the structural representation of the first functional unit of the utility model employing;
Fig. 3 is the schematic diagram of a kind of specific embodiment of Fig. 2;
Fig. 4 is the structural representation of the integrator of the first functional unit of the present utility model;
Fig. 5 is the structural representation of the second functional unit of the utility model employing;
Fig. 6 is that the utility model is for many bit moduli transducer schematic diagram of digital microphone.
Embodiment
Below in conjunction with the accompanying drawing in the utility model embodiment, the technical scheme in the utility model embodiment is clearly and completely described, obviously, described embodiment is only the utility model part embodiment, rather than whole embodiment.Embodiment based in the utility model, the every other embodiment that those of ordinary skills obtain under the prerequisite of not making creative work, belongs to the scope that the utility model is protected.
It should be noted that, in the situation that not conflicting, embodiment and the feature in embodiment in the utility model can combine mutually.
Below in conjunction with the drawings and specific embodiments, the utility model is described in further detail, but not as restriction of the present utility model.
With reference to Fig. 2, Fig. 3, Fig. 5, Fig. 6, a kind of many bit moduli transducer continuous time for digital microphone, be applied to digital microphone, wherein, comprise the first functional unit 1 and the second functional unit 2 being connected with the first functional unit 1, the first functional unit 1 comprises a signal input part, one signal output part, the first functional unit 1 receives analog input signal by signal input part, and by signal output part, connect the signal input part of the second functional unit 2, the first functional unit 1 comprises the integrator of a plurality of cascades successively, one multi-bit quantizer, one multi-bit digital-to-analog converter, one adder, adder is positioned at the input of first integrator, multi-bit quantizer is for receiving the output signal of every one-level integrator and being quantified as digital signal, the digital signal that multi-bit digital-to-analog converter obtains multi-bit quantizer is converted to analog signal, the analog feedback signal that adder is changed for receiving multi-bit digital-to-analog converter, and analog input signal and analog feedback signal are asked to poor, draw error signal, the first functional unit 1 is for being converted to analog input signal many bit stream, the second functional unit 2 is for being converted into many bit stream the output of single-bit code stream.
Because single-bit code stream is compared with many bit stream, all information is included in the data flow of, follow-up processing can directly be carried out signal processing to the data flow of, interference between the inconsistent and data wire of delay while having avoided data multiplex transmission, can improve the processing speed of circuit simultaneously.The utility model adopts many bit stream is converted into into the output of single-bit code stream, to meet the requirement of digital microphone industry standard.
With reference to Fig. 4, the integrator of the utility model the first functional unit adopts continuous time integrator.Above-mentioned integrator mainly comprises an operational amplifier 21, and operational amplifier 21 is provided with in-phase input end, inverting input, and in-phase input end connects a reference signal (Vcm); The inverting input of integrator connects the output signal end of integrator by an electric capacity (C1); And/or integrator connects the output signal of input signal (in) or upper level integrator by a resistance (R1).
The first functional unit adopts continuous time integrator, has realized the many bit moduli conversions that analog input signal realized to continuous time, and has reduced switching noise and the quiescent current of analog to digital converter.Continuous time, the power consumption of sigma delta modulator was conventionally little than discrete time sigma delta modulator, was particularly suitable in the application of high speed, low-power consumption.
The first functional unit of the present utility model also adopts multi-bit quantizer simultaneously, with respect to single-bit quantification device, multi-bit quantizer can reduce and quantize the dependence of gain to input signal, the linearity of feedback control loop is improved, and multi-bit quantizer can improve the saturated input of modulator, when having increased signal input range, also increased the stability of system.
The second functional unit 2 of the present utility model comprises digital integrator, a single-bit encoder (1bit_code), bit encoder more than, a digital adder of a plurality of cascades successively, and digital adder is positioned at the input of first digit integrator; Single-bit encoder is for receiving the output signal of each stages of digital integrator and encoding; The digital signal that many bit encoder obtain single-bit encoder is converted to many bits of encoded signal; Digital adder receives many bits of encoded signal, and input signal and code signal are asked to poor, draws error signal.
With reference to Fig. 2, the first functional unit 1 of the present utility model comprises m the integrator of cascade successively; Be respectively first integrator (stg1), second integral device (stg2).。。, m-1 integrator (stgm-1), m integrator (stgm); One n multi-bit quantizer (nbit_adc); One n bit digital-to-analog converter (nbit dac) and an adder, analog input signal (In) obtains n bit stream (nbit dout) through the first functional unit;
With reference to Fig. 5, the second functional unit 2 comprises m the digital integrator of cascade successively; Be respectively the first digital integrator (stg1 ＇), the second digital integrator (stg ＇).。。, m-1 digital integrator (stgm-1 ＇), m digital integrator (stgm ＇); One single-bit encoder (1bit_code), n bit encoder (nbit_code) and a digital adder; N bit stream (nbit dout) obtains single-bit code stream (1bit dout) through the second functional unit.
Above-mentioned m, n is respectively one and is more than or equal to 1 positive integer.
Above-mentioned digital integrator adopts the trigger (DFF) of D type to realize.
With reference to Fig. 3, be a kind of specific embodiment of the first functional unit 1 of the present utility model, feed-forward type four bit two rank sigma delta analog to digital converters, the first functional unit 1 comprises two integrators (stg1, stg2) of cascade successively; Multi-bit quantizer is one or four multi-bit quantizers (4bit_adc); Many bit encoder are one or four bit encoder (4bit_code).Multi-bit digital-to-analog converter is one or four bit digital-to-analog converters (4bit dac).Analog input signal (In) obtains 4 bit stream (4bit dout) through the first functional unit.
The first functional unit of the present utility model adopts many bits sigma delta analog to digital converter, compares with the single-bit sigma delta analog to digital converter of prior art, has following advantage:
1) realize identical signal to noise ratio, reduced the exponent number of integrator, reduced system power dissipation and complexity;
2) to the susceptibility of clock jitter (jitter), be 2 of single-bit sigma delta analog to digital converter
-Ntimes, thereby relaxed the requirement to system clock;
3) period signal of many bits sigma delta analog to digital converter produces (idle tone) much smaller than single-bit sigma delta analog to digital converter, so can not need the offset voltage that additionally increases analog to digital converter (ADC) input to suppress period signal generation, thereby increase the dynamic range of analog to digital converter input.
The first functional unit of the present utility model is realized in analog domain,, mainly by analog circuit, comprises the realizations such as amplifier, integrator, comparator; The second functional unit of the present utility model is realized in pure digi-tal territory,, mainly by digital circuit, comprises trigger (as the trigger of D type), logic gates (logic gate), adds/realizations such as subtracter.
Sigma delta modulator of the present utility model is not limited only to feed-forward type, can also adopt other configurations, and as feedback-type, MASH type etc., can be used in conjunction with any sigma delta framework.
The foregoing is only the utility model preferred embodiment; not thereby limit execution mode of the present utility model and protection range; to those skilled in the art; should recognize that being equal to that all utilization the utility model specifications and diagramatic content done replace and the resulting scheme of apparent variation, all should be included in protection range of the present utility model.
Claims (9)
1. many bit moduli transducer continuous time for digital microphone, be applied to digital microphone, it is characterized in that, comprise for analog input signal is converted to the first functional unit of many bit stream and be connected with described the first functional unit for many bit stream are converted into single-bit code stream, export the second functional unit, described the first functional unit comprises a signal input part, one signal output part, described the first functional unit receives analog input signal by described signal input part, and by described signal output part, connect the signal input part of described the second functional unit,
Described the first functional unit comprises integrator, multi-bit digital-to-analog converter, the adder of a multi-bit quantizer, for feeding back of a plurality of cascades successively; Described adder is positioned at wherein the input of integrator described in first.
2. a kind of many bit moduli transducer continuous time for digital microphone according to claim 1, is characterized in that, described integrator adopts continuous time integrator.
3. a kind of many bit moduli transducer continuous time for digital microphone according to claim 2, it is characterized in that, described integrator comprises an operational amplifier, and described operational amplifier is provided with in-phase input end, inverting input, and described in-phase input end connects a reference signal;
The inverting input of described integrator connects the output signal end of described integrator by an electric capacity; And/or the inverting input of described integrator connects the output signal of input signal or upper level integrator by a resistance.
4. a kind of many bit moduli transducer continuous time for digital microphone according to claim 1, it is characterized in that, described the second functional unit comprises digital integrator, a single-bit encoder, bit encoder more than, a digital adder of a plurality of cascades successively, and described digital adder is positioned at the input of digital integrator described in first.
5. a kind of many bit moduli transducer continuous time for digital microphone according to claim 4, is characterized in that, described digital integrator adopts the trigger of D type.
6. a kind of many bit moduli transducer continuous time for digital microphone according to claim 1, is characterized in that, described the first functional unit comprises m the integrator of cascade successively; Described multi-bit quantizer is a n multi-bit quantizer; Described multi-bit digital-to-analog converter is a n bit digital-to-analog converter; M wherein, n is respectively one and is more than or equal to 1 positive integer.
7. a kind of many bit moduli transducer continuous time for digital microphone according to claim 4, is characterized in that, described the second functional unit comprises m the digital integrator of cascade successively; Described many bit encoder are a n bit encoder;
M wherein, n is respectively one and is more than or equal to 1 positive integer.
8. a kind of many bit moduli transducer continuous time for digital microphone according to claim 6, is characterized in that, described the first functional unit comprises 2 integrators of cascade successively;
And/or described multi-bit quantizer is one 4 multi-bit quantizers, described multi-bit digital-to-analog converter is one 4 bit digital-to-analog converters.
9. a kind of many bit moduli transducer continuous time for digital microphone according to claim 7, is characterized in that, described the second functional unit comprises 2 digital integrators of cascade successively; And/or described many bit encoder are one 4 bit encoder.
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| CN201320465798.8U CN203522712U (en) | 2013-07-31 | 2013-07-31 | Continuous multi-bit analog-to-digital converter for digital microphone |
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| CN201320465798.8U CN203522712U (en) | 2013-07-31 | 2013-07-31 | Continuous multi-bit analog-to-digital converter for digital microphone |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104348484A (en) * | 2013-07-31 | 2015-02-11 | 上海耐普微电子有限公司 | Continuous time multi-bit analog-to-digital converter for digital microphone |
| CN106788439A (en) * | 2016-11-30 | 2017-05-31 | 上海集成电路研发中心有限公司 | The regulating system and method for integral form digital analog converter transfer characteristic |
| CN107707259A (en) * | 2017-11-01 | 2018-02-16 | 兰州大学 | A kind of method of analog signal sampling and reconstruct |
-
2013
- 2013-07-31 CN CN201320465798.8U patent/CN203522712U/en not_active Expired - Fee Related
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104348484A (en) * | 2013-07-31 | 2015-02-11 | 上海耐普微电子有限公司 | Continuous time multi-bit analog-to-digital converter for digital microphone |
| CN104348484B (en) * | 2013-07-31 | 2018-08-21 | 钰太芯微电子科技（上海）有限公司 | A kind of more bit moduli converters of continuous time for digital microphone |
| CN106788439A (en) * | 2016-11-30 | 2017-05-31 | 上海集成电路研发中心有限公司 | The regulating system and method for integral form digital analog converter transfer characteristic |
| CN106788439B (en) * | 2016-11-30 | 2021-06-15 | 上海集成电路研发中心有限公司 | System and method for adjusting transfer characteristics of integral analog-to-digital converter |
| CN107707259A (en) * | 2017-11-01 | 2018-02-16 | 兰州大学 | A kind of method of analog signal sampling and reconstruct |
| CN107707259B (en) * | 2017-11-01 | 2020-11-03 | 兰州大学 | Method for sampling and reconstructing analog signal |
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Owner name: YUTAIXIN MICROELECTRONIC SCIENCE + TECHNOLOGY (SHA Free format text: FORMER NAME: SHANGHAI SNIPER MICROELECTRONICS CO., LTD. |
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Inventor after: Ye Jinghua Inventor after: Chen Jia Inventor before: Ye Jinghua |
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Address after: 201204, 502A1, room 10, 198 Zhang Heng Road, Zhangjiang hi tech park, Shanghai, Pudong New Area Patentee after: Yu's core microelectronics technology (Shanghai) Co., Ltd. Patentee after: ZILLTEK TECHNOLOGY CORP. Address before: 201204, 601C, Lane 198, Zhang Heng Road, Zhangjiang hi tech park, Shanghai, Pudong New Area, 10 Patentee before: Shanghai Sniper Microelectronics Co.,Ltd. Patentee before: ZILLTEK TECHNOLOGY CORP. |
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| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140402 Termination date: 20190731 |