CN203522663U - Broadband automatic gain amplifier for computer network processor - Google Patents
Broadband automatic gain amplifier for computer network processor Download PDFInfo
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- CN203522663U CN203522663U CN201320676883.9U CN201320676883U CN203522663U CN 203522663 U CN203522663 U CN 203522663U CN 201320676883 U CN201320676883 U CN 201320676883U CN 203522663 U CN203522663 U CN 203522663U
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- resistance
- electric capacity
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- automatic gain
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Abstract
The utility model discloses a broadband automatic gain amplifier for a computer network processor. The broadband automatic gain amplifier comprises a balanced modulator chip, a signal amplifier, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, an eighth capacitor, a ninth capacitor, a tenth capacitor, a first diode and a second diode. According to the broadband automatic gain amplifier for the computer network processor, compared with the prior art, the broadband automatic gain amplifier has the advantages of simple circuit structure, fewer components, low cost, small size and convenient installation, the broadband automatic gain amplifier has an automatic gain function, and the promotion of the broadband automatic gain amplifier is facilitated.
Description
Technical field
The utility model relates to a kind of computer network processor, relates in particular to a kind of broadband automatic gain amplifier for computer network processor.
Background technology
Network processing unit device inside is comprised of several microcode processors and some hardware co-processor conventionally, and a plurality of microcode processors, in the inner parallel processing of network processing unit, are controlled handling process by microcode prepared in advance.For some complicated standard operations (as the congestion avoidance algorithm of internal memory operation, Routing table lookup algorithm, QoS, flow scheduling algorithm etc.), adopt hardware co-processor further to improve handling property, thereby realized service flexibility and high performance combination.And in prior art the circuit structure for the wide-band amplifier of computer network processor complicated, adopt that electronic component is many, with high costs, volume is large, and do not there is automatic gain function, be unfavorable for popularization.
Utility model content
The purpose of this utility model provides a kind of broadband automatic gain amplifier for computer network processor with regard to being in order to address the above problem.
The utility model is achieved through the following technical solutions above-mentioned purpose:
The utility model comprises balanced modulator chip, signal amplifier, the first resistance to the 12 resistance, the first electric capacity to the ten electric capacity, the first diode and the second diode, the first pin of described balanced modulator chip is connected with the first end of described the second resistance, the second end while of described the second resistance and the first end of described the first resistance, the first end of described the second electric capacity, the first end of described the 3rd electric capacity, the first end of described the 3rd resistance is connected with the first end of described the 4th resistance, the 4th pin of described balanced modulator chip is connected with the first end of described the first electric capacity with the second end of described the first resistance simultaneously, the second end of described the first electric capacity is the signal input part of described broadband automatic gain amplifier, described the 5th resistance is series between the second pin of described balanced modulator chip and the 3rd pin of described balanced modulator chip, the tenth pin while of described balanced modulator chip and the second end of described the 4th resistance, the first end of described the 8th resistance, the first end of described the 8th electric capacity, the negative power supply input of described signal amplifier is connected with power cathode, the 5th pin of described balanced modulator chip is connected with the first end of described the 6th resistance, the second end while of described the 6th resistance and the second end of described the second electric capacity, the second end of described the 3rd electric capacity, the second end of described the 3rd resistance, the 6th pin of described balanced modulator chip is connected with the first end of described the 7th resistance, the second end while of described the 7th resistance and the 7th pin of described balanced modulator chip, the second end of described the 8th resistance, the positive pole of described the second diode, the first end of described the 7th electric capacity is connected with the first end of described the 12 resistance, the negative pole of described the first diode, the second end of described the 7th electric capacity, the second end of described the 8th electric capacity, the positive pole of described the second diode, the first end of described the tenth resistance, the equal ground connection of first end of the first end of described the 11 resistance and described the 4th electric capacity, the negative pole of described the second diode is connected with the first end of described the tenth electric capacity with the second end of described the 12 resistance simultaneously, the second end of described the tenth electric capacity is connected with the first signal output of described signal amplifier, the secondary signal output of described signal amplifier is connected with the first end of described the 9th electric capacity, the second end of described the 9th electric capacity is the signal output part of described broadband automatic gain amplifier, cathode power supply input while and the described cathode power supply of described signal amplifier, the second end of described the 4th electric capacity, the first end of described the tenth resistance is connected with the first end of described the 9th resistance, the first signal input of described signal amplifier is connected with the second end of described the tenth resistance with the first end of described the 5th electric capacity simultaneously, the secondary signal input of described signal amplifier links with the second end of described the 11 resistance and the first end of described the 6th electric capacity simultaneously, the second end of described the 5th electric capacity is connected with the second end of described the 9th resistance and the 6th pin of described balanced modulator chip simultaneously, the second end of described the 6th electric capacity is connected with the second end of described the tenth resistance and the 9th pin of described balanced modulator chip simultaneously.
The beneficial effects of the utility model are:
The utility model is a kind of broadband automatic gain amplifier for computer network processor, compared with prior art have advantages of that circuit structure is simple, employing element is few, with low cost, volume is little, be convenient to install, and there is automatic gain function, be conducive to promote.
Accompanying drawing explanation
Fig. 1 is circuit structure schematic diagram of the present utility model.
Embodiment
Below in conjunction with accompanying drawing, the utility model is described in further detail:
As shown in Figure 1: the utility model comprises balanced modulator chip IC 1, signal amplifier IC2, the first resistance R 1 to the 12 resistance R 12, the first capacitor C 1 is to the tenth capacitor C 10, the first diode VD1 and the second diode VD2, the first pin of balanced modulator chip IC 1 is connected with the first end of the second resistance R 2, the second end while of the second resistance R 2 and the first end of the first resistance R 1, the first end of the second capacitor C 2, the first end of the 3rd capacitor C 3, the first end of the 3rd resistance R 3 is connected with the first end of the 4th resistance R 4, the 4th pin of balanced modulator chip IC 1 is connected with the first end of the first capacitor C 1 with the second end of the first resistance R 1 simultaneously, the second end of the first capacitor C 1 is the signal input part Ue of broadband automatic gain amplifier, the 5th resistance R 5 is series between the second pin of balanced modulator chip IC 1 and the 3rd pin of balance modulator chip IC1, the tenth pin while of balanced modulator chip IC 1 and the second end of the 4th resistance R 4, the first end of the 8th resistance R 8, the first end of the 8th capacitor C 8, the negative power supply input of signal amplifier IC2 is connected with power cathode, the 5th pin of balanced modulator chip IC 1 is connected with the first end of the 6th resistance R 6, the second end while of the 6th resistance R 6 and the second end of the second capacitor C 2, the second end of the 3rd capacitor C 3, the second end of the 3rd resistance R 3, the 6th pin of balanced modulator chip IC 1 is connected with the first end of the 7th resistance R 7, the second end while of the 7th resistance R 7 and the 7th pin of balanced modulator chip IC 1, the second end of the 8th resistance R 8, the positive pole of the second diode VD2, the first end of the 7th capacitor C 7 is connected with the first end of the 12 resistance R 12, the negative pole of the first diode VD1, the second end of the 7th capacitor C 7, the second end of the 8th capacitor C 8, the positive pole of the second diode VD2, the first end of the tenth resistance R 10, the equal ground connection of first end of the first end of the 11 resistance R 11 and the 4th capacitor C 4, the negative pole of the second diode VD2 is connected with the first end of the tenth capacitor C 10 with the second end of the 12 resistance R 12 simultaneously, the second end of the tenth capacitor C 10 is connected with the first signal output of signal amplifier IC2, the secondary signal output of signal amplifier IC2 is connected with the first end of the 9th capacitor C 9, the second end of the 9th capacitor C 9 is the signal output part Ua of broadband automatic gain amplifier, cathode power supply input while and the cathode power supply of signal amplifier IC2, the second end of the 4th capacitor C 1, the first end of the tenth resistance R 10 is connected with the first end of the 9th resistance R 9, the first signal input of signal amplifier IC2 is connected with the second end of the tenth resistance R 10 with the first end of the 5th capacitor C 5 simultaneously, the secondary signal input of signal amplifier IC2 links with the second end of the 11 resistance R 11 and the first end of the 6th capacitor C 6 simultaneously, the second end of the 5th capacitor C 5 is connected with the second end of the 9th resistance R 9 and the 6th pin of balance modulator chip IC1 simultaneously, the second end of the 6th capacitor C 6 is connected with the second end of the tenth resistance R 10 and the 9th pin of balance modulator chip IC1 simultaneously.The utility model is a kind of broadband automatic gain amplifier for computer network processor, compared with prior art have advantages of that circuit structure is simple, employing element is few, with low cost, volume is little, be convenient to install, and there is automatic gain function, be conducive to promote.
Claims (1)
1. the broadband automatic gain amplifier for computer network processor, it is characterized in that: comprise balanced modulator chip, signal amplifier, the first resistance to the 12 resistance, the first electric capacity to the ten electric capacity, the first diode and the second diode, the first pin of described balanced modulator chip is connected with the first end of described the second resistance, the second end while of described the second resistance and the first end of described the first resistance, the first end of described the second electric capacity, the first end of described the 3rd electric capacity, the first end of described the 3rd resistance is connected with the first end of described the 4th resistance, the 4th pin of described balanced modulator chip is connected with the first end of described the first electric capacity with the second end of described the first resistance simultaneously, the second end of described the first electric capacity is the signal input part of described broadband automatic gain amplifier, described the 5th resistance is series between the second pin of described balanced modulator chip and the 3rd pin of described balanced modulator chip, the tenth pin while of described balanced modulator chip and the second end of described the 4th resistance, the first end of described the 8th resistance, the first end of described the 8th electric capacity, the negative power supply input of described signal amplifier is connected with power cathode, the 5th pin of described balanced modulator chip is connected with the first end of described the 6th resistance, the second end while of described the 6th resistance and the second end of described the second electric capacity, the second end of described the 3rd electric capacity, the second end of described the 3rd resistance, the 6th pin of described balanced modulator chip is connected with the first end of described the 7th resistance, the second end while of described the 7th resistance and the 7th pin of described balanced modulator chip, the second end of described the 8th resistance, the positive pole of described the second diode, the first end of described the 7th electric capacity is connected with the first end of described the 12 resistance, the negative pole of described the first diode, the second end of described the 7th electric capacity, the second end of described the 8th electric capacity, the positive pole of described the second diode, the first end of described the tenth resistance, the equal ground connection of first end of the first end of described the 11 resistance and described the 4th electric capacity, the negative pole of described the second diode is connected with the first end of described the tenth electric capacity with the second end of described the 12 resistance simultaneously, the second end of described the tenth electric capacity is connected with the first signal output of described signal amplifier, the secondary signal output of described signal amplifier is connected with the first end of described the 9th electric capacity, the second end of described the 9th electric capacity is the signal output part of described broadband automatic gain amplifier, cathode power supply input while and the described cathode power supply of described signal amplifier, the second end of described the 4th electric capacity, the first end of described the tenth resistance is connected with the first end of described the 9th resistance, the first signal input of described signal amplifier is connected with the second end of described the tenth resistance with the first end of described the 5th electric capacity simultaneously, the secondary signal input of described signal amplifier links with the second end of described the 11 resistance and the first end of described the 6th electric capacity simultaneously, the second end of described the 5th electric capacity is connected with the second end of described the 9th resistance and the 6th pin of described balanced modulator chip simultaneously, the second end of described the 6th electric capacity is connected with the second end of described the tenth resistance and the 9th pin of described balanced modulator chip simultaneously.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320676883.9U CN203522663U (en) | 2013-10-30 | 2013-10-30 | Broadband automatic gain amplifier for computer network processor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320676883.9U CN203522663U (en) | 2013-10-30 | 2013-10-30 | Broadband automatic gain amplifier for computer network processor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203522663U true CN203522663U (en) | 2014-04-02 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201320676883.9U Expired - Fee Related CN203522663U (en) | 2013-10-30 | 2013-10-30 | Broadband automatic gain amplifier for computer network processor |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203522663U (en) |
-
2013
- 2013-10-30 CN CN201320676883.9U patent/CN203522663U/en not_active Expired - Fee Related
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140402 Termination date: 20141030 |
|
| EXPY | Termination of patent right or utility model |